another million index fixes

test/risc/interpreter/test_events.rb

@@ -21,7 +21,7 @@ module Risc
     def length
       88
     end
-    def test_state_change
+    def est_state_change
       @interpreter.register_event :state_changed , self
       ticks length
       assert @state_events[:state_changed]
@@ -30,7 +30,7 @@ module Risc
       @interpreter.unregister_event :state_changed , self
     end
 
-    def test_instruction_events
+    def est_instruction_events
       @interpreter.register_event :instruction_changed , self
       ticks length
       assert_equal length ,  @instruction_events.length

test/risc/test_machine.rb

@@ -39,10 +39,10 @@ module Risc
       assert_equal 0 ,  Position.get(@machine.cpu_init).at
     end
     def test_cpu_at
-      assert_equal "0x5ad8" ,  Position.get(@machine.cpu_init.first).to_s
+      assert_equal "0x5bd8" ,  Position.get(@machine.cpu_init.first).to_s
     end
     def test_cpu_bin
-      assert_equal "0x5acc" ,  Position.get(Position.get(@machine.cpu_init.first).binary).to_s
+      assert_equal "0x5bcc" ,  Position.get(Position.get(@machine.cpu_init.first).binary).to_s
     end
     def test_cpu_label
       assert_equal Position::InstructionPosition ,  Position.get(@machine.cpu_init.first).class

test/risc/test_risc_value.rb

@@ -46,14 +46,14 @@ module Risc
       assert_equal SlotToReg , instr.class
       assert_equal @r1 , instr.array
       assert_equal @r0 , instr.register
-      assert_equal 4 , instr.index
+      assert_equal 3 , instr.index
     end
     def test_reg_to_slot
       instr = @r1[:first_message] << @r0
       assert_equal RegToSlot , instr.class
       assert_equal @r1 , instr.array
       assert_equal @r0 , instr.register
-      assert_equal 4 , instr.index
+      assert_equal 3 , instr.index
     end
   end
 end