makes memory a three operand instruction, like add etc. But 3 regs are still undone
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@ -6,8 +6,8 @@ module Arm
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class MemoryInstruction < Vm::MemoryInstruction
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include Arm::Constants
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def initialize(first , attributes)
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super(first , attributes)
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def initialize(result , left , right = nil , attributes = {})
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super(result , left , right , attributes)
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@attributes[:update_status] = 0 if @attributes[:update_status] == nil
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@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
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@operand = 0
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@ -24,13 +24,13 @@ module Arm
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# Build representation for target address
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def build
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arg = @attributes[:right]
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arg = @left
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arg = "r#{arg.register}".to_sym if( arg.is_a? Vm::Word )
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#str / ldr are _serious instructions. With BIG possibilities not half are implemented
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if (arg.is_a?(Symbol)) #symbol is register
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@rn = arg
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if @attributes[:offset]
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@operand = @attributes[:offset]
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if @right
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@operand = @right
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if (@operand < 0)
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@add_offset = 0
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#TODO test/check/understand
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@ -62,6 +62,7 @@ module Arm
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def assemble(io)
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build
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puts inspect
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i = 0 #I flag (third bit)
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#not sure about these 2 constants. They produce the correct output for str r0 , r1
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# but i can't help thinking that that is because they are not used in that instruction and
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@ -77,7 +78,7 @@ module Arm
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val = reg_code(@operand) if @operand.is_a?(Symbol)
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val = shift(val , 0 ) # for the test
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@pre_post_index = 0 if @attributes[:flaggie]
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val |= shift(reg_code(@first) , 12 )
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val |= shift(reg_code(@result) , 12 )
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val |= shift(reg_code(@rn) , 12+4) #16
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val |= shift(@is_load , 12+4 +4)
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val |= shift(w , 12+4 +4+1)
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@ -49,8 +49,10 @@ module Vm
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end
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end
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class MemoryInstruction < Instruction
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def initialize first , options = {}
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@first = first
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def initialize result , left , right = nil , options = {}
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@result = result
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@left = left
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@right = right
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super(options)
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end
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end
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@ -57,7 +57,7 @@ module Vm
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define_instruction_two(inst , CompareInstruction)
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end
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[:strb, :str , :ldrb, :ldr].each do |inst|
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define_instruction_one(inst , MemoryInstruction)
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define_instruction_three(inst , MemoryInstruction)
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end
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[:b, :call , :swi].each do |inst|
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define_instruction_one(inst , CallInstruction)
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@ -126,7 +126,7 @@ module Vm
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# same for three args (result = left right,)
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def define_instruction_three(inst , clazz , defaults = {} )
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clazz = self.class_for(clazz)
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create_method(inst) do |result , left ,right , options = nil|
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create_method(inst) do |result , left ,right = nil , options = nil|
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options = {} if options == nil
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options.merge defaults
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options[:opcode] = inst
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@ -4,30 +4,34 @@ class TestMemory < MiniTest::Test
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include ArmHelper
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def test_ldr
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code = @machine.ldr :r0, right: :r0
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code = @machine.ldr :r0, :r0
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assert_code code, :ldr , [0x00,0x00,0x90,0xe5] #e5 90 00 00
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end
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def test_ldr2
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code = @machine.ldr :r0, right: :r0 , :offset => 4
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def test_ldr_const_offset
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code = @machine.ldr :r0, :r0 , 4
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assert_code code, :ldr , [0x04,0x00,0x90,0xe5] #e5 90 00 04
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end
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def test_ldr_reg_offset
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code = @machine.ldr :r0, :r1 , :r2
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assert_code code, :ldr , [0x02,0x00,0x91,0xe6] #e6 91 00 02
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end
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def test_ldrb
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code = @machine.ldrb :r0, right: :r0
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code = @machine.ldrb :r0, :r0
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assert_code code, :ldrb , [0x00,0x00,0xd0,0xe5] #e5 d0 00 00
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end
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def test_str
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code = @machine.str :r0, right: :r1
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code = @machine.str :r0, :r1
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assert_code code, :str , [0x00,0x00,0x81,0xe5] #e5 81 00 00
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end
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def test_strb_add
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code = @machine.strb :r0, right: :r1 , :offset => 1 , flaggie: 1
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code = @machine.strb :r0, :r1 , 1 , flaggie: 1
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assert_code code, :strb , [0x01,0x00,0xc1,0xe4] #e4 c1 00 01
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end
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def test_strb
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code = @machine.strb :r0, right: :r0
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code = @machine.strb :r0, :r0
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assert_code code, :strb , [0x00,0x00,0xc0,0xe5] #e5 c0 00 00
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end
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end
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