2018-04-23 12:16:46 +02:00
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require_relative "../helper"
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2015-11-08 13:30:28 +01:00
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2017-01-19 08:02:29 +01:00
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module Risc
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2018-03-30 16:09:02 +02:00
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class InterpreterPlusTest < MiniTest::Test
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2017-01-03 21:42:40 +01:00
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include Ticker
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2015-11-08 13:30:28 +01:00
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2017-01-03 21:42:40 +01:00
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def setup
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@string_input = as_main("return 5 + 5")
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super
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end
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2015-11-08 13:30:28 +01:00
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2018-08-06 13:07:17 +02:00
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def test_chain
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2019-08-22 22:10:29 +02:00
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#show_main_ticks # get output of what is
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check_main_chain [LoadConstant, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
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2018-08-12 14:02:23 +02:00
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RegToSlot, RegToSlot, RegToSlot, LoadConstant, SlotToReg, # 10
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2019-08-22 22:10:29 +02:00
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RegToSlot, LoadConstant, SlotToReg, RegToSlot, LoadConstant,
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SlotToReg, RegToSlot, SlotToReg, FunctionCall, LoadConstant, # 20
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SlotToReg, LoadConstant, OperatorInstruction, IsNotZero, SlotToReg,
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RegToSlot, SlotToReg, SlotToReg, SlotToReg, SlotToReg, # 30
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Branch, OperatorInstruction, RegToSlot, RegToSlot, SlotToReg,
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SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot, # 40
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RegToSlot, SlotToReg, SlotToReg, SlotToReg, FunctionReturn,
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SlotToReg, RegToSlot, Branch, SlotToReg, SlotToReg, # 50
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RegToSlot, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
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Branch, SlotToReg, SlotToReg, SlotToReg, FunctionReturn, # 60
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Transfer, SlotToReg, SlotToReg, Syscall, NilClass, ]
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2018-06-19 17:55:47 +02:00
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assert_equal 10 , get_return
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end
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2018-11-24 21:40:22 +01:00
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def base_ticks(num)
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main_ticks(21 + num)
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end
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2018-03-31 18:37:24 +02:00
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def test_load_5
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lod = main_ticks( 12 )
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2018-08-08 14:49:47 +02:00
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assert_load( lod , Parfait::Integer , :r1)
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2018-03-31 18:37:24 +02:00
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assert_equal 5 , lod.constant.value
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end
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def test_load_receiver
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sl = base_ticks( 6 )
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assert_slot_to_reg( sl , :r0 , 2 , :r2)
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2018-05-24 20:20:56 +02:00
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end
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2018-11-24 21:40:22 +01:00
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def test_reduce_receiver
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sl = base_ticks( 7 )
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2018-11-24 21:40:22 +01:00
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assert_slot_to_reg( sl , :r2 , 2 , :r2)
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2018-03-30 17:05:38 +02:00
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end
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def test_slot_args #load args from message
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sl = base_ticks( 8 )
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assert_slot_to_reg( sl , :r0 , 9 , :r3)
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end
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def test_reduce_arg
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sl = base_ticks( 9 )
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assert_slot_to_reg( sl , :r3 , 2 , :r3)
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assert_equal 5 , @interpreter.get_register(:r3)
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end
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def test_op
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op = base_ticks(11)
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assert_equal OperatorInstruction , op.class
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assert_equal :+ , op.operator
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assert_equal :r2 , op.left.symbol
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assert_equal :r3 , op.right.symbol
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assert_equal 10 , @interpreter.get_register(:r2)
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assert_equal 5 , @interpreter.get_register(:r3)
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end
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def test_move_res_to_int
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int = base_ticks( 12 )
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assert_reg_to_slot( int , :r2 , :r1 , 2)
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2018-04-01 11:00:59 +02:00
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end
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2018-11-24 21:40:22 +01:00
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def test_move_int_to_reg
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int = base_ticks( 13 )
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assert_reg_to_slot( int , :r1 , :r0 , 5)
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end
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2018-11-24 21:40:22 +01:00
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def test_move_fix_to_result
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sl = base_ticks( 14 )
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assert_slot_to_reg( sl , :r0 , 5 , :r1)
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end
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2018-11-24 21:40:22 +01:00
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def test_start_return_sequence
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sl = base_ticks( 15 )
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2018-11-24 21:40:22 +01:00
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assert_slot_to_reg( sl , :r0 , 6 , :r2)
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2018-04-01 13:56:01 +02:00
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end
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2015-11-08 14:15:55 +01:00
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end
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2015-11-08 13:30:28 +01:00
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end
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