2016-12-14 12:43:13 +01:00
|
|
|
module Arm
|
2017-01-19 08:02:29 +01:00
|
|
|
class MoveInstruction < Risc::Instruction
|
2016-12-14 12:43:13 +01:00
|
|
|
include Constants
|
|
|
|
include Attributed
|
|
|
|
|
|
|
|
def initialize to , from , options = {}
|
|
|
|
super(nil)
|
|
|
|
@attributes = options
|
2017-01-19 08:02:29 +01:00
|
|
|
if( from.is_a?(Symbol) and Risc::RiscValue.look_like_reg(from) )
|
|
|
|
from = Risc::RiscValue.new(from , :Integer)
|
2016-12-14 12:43:13 +01:00
|
|
|
end
|
|
|
|
@from = from
|
|
|
|
@to = to
|
|
|
|
raise "move must have from set #{inspect}" unless from
|
|
|
|
@attributes[:update_status] = 1 if @attributes[:update_status] == nil
|
|
|
|
@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
|
|
|
|
@attributes[:opcode] = attributes[:opcode]
|
|
|
|
@operand = 0
|
|
|
|
|
|
|
|
@rn = :r0 # register zero = zero bit pattern
|
|
|
|
@extra = nil
|
|
|
|
end
|
|
|
|
attr_accessor :to , :from
|
|
|
|
|
|
|
|
# arm intructions are pretty sensible, and always 4 bytes (thumb not supported)
|
|
|
|
# but not all constants fit into the part of the instruction that is left after the instruction
|
|
|
|
# code, so large moves have to be split into two instructions.
|
|
|
|
# we handle this "transparently", just this instruction looks longer
|
|
|
|
# alas, full transparency is not achieved as we only know when to use 2 instruction once we
|
|
|
|
# know where the other object is, and that position is only set after code positions have been
|
|
|
|
# determined (in link) and so see below in assemble
|
|
|
|
def byte_length
|
|
|
|
@extra ? 8 : 4
|
|
|
|
end
|
|
|
|
|
2016-12-14 20:13:41 +01:00
|
|
|
# don't overwrite instance variables, to make assembly repeatable
|
2016-12-14 12:43:13 +01:00
|
|
|
def assemble(io)
|
2016-12-14 20:53:26 +01:00
|
|
|
rn , operand , right , immediate = @rn , @operand , @from , 1
|
2016-12-15 11:38:22 +01:00
|
|
|
|
2016-12-14 20:13:41 +01:00
|
|
|
case right
|
|
|
|
when Numeric
|
|
|
|
operand = numeric_operand(right)
|
2017-01-19 08:02:29 +01:00
|
|
|
when Risc::RiscValue
|
2016-12-14 12:43:13 +01:00
|
|
|
operand = reg_code(right)
|
|
|
|
immediate = 0 # ie not immediate is register
|
|
|
|
else
|
|
|
|
raise "invalid operand argument #{right.class} , #{self.class}"
|
|
|
|
end
|
|
|
|
op = shift_handling
|
|
|
|
val = shift(operand , 0)
|
|
|
|
val |= shift(op , 0) # any barrel action, is already shifted
|
|
|
|
val |= shift(reg_code(@to) , 12)
|
2016-12-14 18:57:09 +01:00
|
|
|
val |= shift(reg_code(rn) , 12 + 4)
|
|
|
|
val |= shift(@attributes[:update_status] , 12 + 4 + 4)#20
|
|
|
|
val |= shift(op_bit_code , 12 + 4 + 4 + 1)
|
|
|
|
val |= shift(immediate , 12 + 4 + 4 + 1 + 4)
|
2016-12-15 11:38:22 +01:00
|
|
|
val |= instruction_code
|
|
|
|
val |= condition_code
|
2016-12-31 17:45:22 +01:00
|
|
|
io.write_unsigned_int_32 val
|
2016-12-14 20:53:26 +01:00
|
|
|
# by now we have the extra add so assemble that
|
2016-12-14 20:13:41 +01:00
|
|
|
@extra.assemble(io) if(@extra) #puts "Assemble extra at #{val.to_s(16)}"
|
2016-12-14 12:43:13 +01:00
|
|
|
end
|
|
|
|
|
2016-12-14 20:53:26 +01:00
|
|
|
def instuction_class
|
|
|
|
0b00 # OPC_DATA_PROCESSING
|
|
|
|
end
|
2016-12-14 20:13:41 +01:00
|
|
|
def numeric_operand(right)
|
|
|
|
return right if (right.fits_u8?)
|
|
|
|
if (op_with_rot = calculate_u8_with_rr(right))
|
|
|
|
return op_with_rot
|
|
|
|
end
|
|
|
|
raise "No negatives implemented #{right} " if right < 0
|
|
|
|
unless @extra
|
|
|
|
@extra = 1 # puts "RELINK M at #{self.position.to_s(16)}"
|
2017-01-19 08:02:29 +01:00
|
|
|
raise ::Risc::LinkException.new("cannot fit numeric literal argument in operand #{right.inspect}")
|
2016-12-14 20:13:41 +01:00
|
|
|
end
|
|
|
|
# now we can do the actual breaking of instruction, by splitting the operand
|
|
|
|
operand = calculate_u8_with_rr( right & 0xFFFFFF00 )
|
|
|
|
raise "no fit for #{right}" unless operand
|
|
|
|
@extra = ArmMachine.add( to , to , (right & 0xFF) )
|
|
|
|
operand
|
|
|
|
end
|
2016-12-14 12:43:13 +01:00
|
|
|
end
|
|
|
|
end
|