Merge branch 'decode_print' of gitlab.istic.univ-rennes1.fr:simpleos/burritos into decode_print
This commit is contained in:
Baptiste
commit
ab182436a4
@ -13,7 +13,7 @@ const NAMES_OPW: [&str; 8] = ["addw", "sllw", "", "", "", "srw", "", ""];
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const NAMES_OPIW: [&str; 8] = ["addiw", "slliw", "", "", "", "sri", "", ""];
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// Register name mapping
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const REG_X: [&str; 32] = ["zero", "ra", "sp", "gp", "tp", "t0", "t1", "t2", "fp", "s1", // fp ou s0 ?
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const REG_X: [&str; 32] = ["zero", "ra", "sp", "gp", "tp", "t0", "t1", "t2", "s0", "s1", // fp ou s0 ?
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"a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7",
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"s2", "s3", "s4", "s5", "s6", "s7", "s8", "s9", "s10", "s11",
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"t3", "t4", "t5", "t6"];
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@ -62,9 +62,9 @@ pub fn print(ins: Instruction, pc: i32) -> String { //TODO pc should be u64
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format!("srai\t{}, {}, {}", REG_X[rd], REG_X[rs1], ins.shamt)
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}
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} else if ins.funct3 == RISCV_OPI_SLLI {
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format!("{}\t{}, {}, {}", NAMES_OPI[ins.funct3 as usize], REG_X[rd], REG_X[rs1], ins.shamt)
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format!("{}\t{},{},{}", NAMES_OPI[ins.funct3 as usize], REG_X[rd], REG_X[rs1], ins.shamt)
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} else {
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format!("{}\t{}, {}, {}", NAMES_OPI[ins.funct3 as usize], REG_X[rd], REG_X[rs1], ins.imm12_I_signed)
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format!("{}\t{},{},{}", NAMES_OPI[ins.funct3 as usize], REG_X[rd], REG_X[rs1], ins.imm12_I_signed)
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}
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},
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RISCV_LUI => {
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@ -81,24 +81,16 @@ pub fn print(ins: Instruction, pc: i32) -> String { //TODO pc should be u64
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}
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},
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RISCV_JALR => {
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if ins.rd == 0 {
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if ins.rs1 == 1 {
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"ret".to_string()
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} else {
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format!("jr\t{:X}", ins.imm31_12)
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}
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} else {
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format!("jalr\t{}, ({})", ins.imm12_I_signed, REG_X[rs1])
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}
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format!("jalr\t{},{}({})", REG_X[rd], ins.imm12_I_signed, REG_X[rs1])
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},
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RISCV_BR => {
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format!("{}\t{}, {}, {}", NAMES_BR[ins.funct3 as usize], REG_X[rs1], REG_X[rs2], ins.imm13_signed)
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},
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RISCV_LD => {
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format!("{}\t{}, {}({})", NAMES_LD[ins.funct3 as usize], REG_X[rd], ins.imm12_I_signed, REG_X[rs1])
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format!("{}\t{},{}({})", NAMES_LD[ins.funct3 as usize], REG_X[rd], ins.imm12_I_signed, REG_X[rs1])
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},
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RISCV_ST => {
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format!("{}\t{}, {}({})", NAMES_ST[ins.funct3 as usize], REG_X[rs2], ins.imm12_S_signed, REG_X[rs1])
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format!("{}\t{},{}({})", NAMES_ST[ins.funct3 as usize], REG_X[rs2], ins.imm12_S_signed, REG_X[rs1])
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},
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RISCV_OPIW => {
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if ins.funct3 == RISCV_OPIW_SRW {
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@ -118,18 +110,18 @@ pub fn print(ins: Instruction, pc: i32) -> String { //TODO pc should be u64
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format!("{}w\t{}, {}, {}", NAMES_MUL[ins.funct3 as usize], REG_X[rd], REG_X[rs1], REG_X[rs2])
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} else if ins.funct3 == RISCV_OP_ADD {
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if ins.funct7 == RISCV_OPW_ADDSUBW_ADDW {
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format!("addw\t{}, {}, {}", REG_X[rd], REG_X[rs1], REG_X[rs2])
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format!("addw\t{},{},{}", REG_X[rd], REG_X[rs1], REG_X[rs2])
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} else {
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format!("subw\t{}, {}, {}", REG_X[rd], REG_X[rs1], REG_X[rs2])
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format!("subw\t{},{},{}", REG_X[rd], REG_X[rs1], REG_X[rs2])
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}
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} else if ins.funct3 == RISCV_OPW_SRW {
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if ins.funct7 == RISCV_OPW_SRW_SRLW {
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format!("srlw\t{}, {}, {}", REG_X[rd], REG_X[rs1], REG_X[rs2])
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format!("srlw\t{},{},{}", REG_X[rd], REG_X[rs1], REG_X[rs2])
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} else {
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format!("sraw\t{}, {}, {}", REG_X[rd], REG_X[rs1], REG_X[rs2])
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format!("sraw\t{},{},{}", REG_X[rd], REG_X[rs1], REG_X[rs2])
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}
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} else {
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format!("{}\t{}, {}, {}", NAMES_OPW[ins.funct3 as usize], REG_X[rd], REG_X[rs1], REG_X[rs2])
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format!("{}\t{},{},{}", NAMES_OPW[ins.funct3 as usize], REG_X[rd], REG_X[rs1], REG_X[rs2])
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}
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},
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RISCV_SYSTEM => {
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@ -173,13 +165,13 @@ mod test {
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let xori = decode::decode(0b_0000000000010001_100_11100_0010011);
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let ori = decode::decode(0b00000000000_10001_110_11100_0010011);
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let andi = decode::decode(0b000000000000_10001_111_11100_0010011);
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assert_eq!("andi\tt3, a7, 0", print::print(andi, 0));
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assert_eq!("addi\tt3, a7, 0", print::print(addi, 0));
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assert_eq!("slli\tt3, a7, 0", print::print(slli, 0));
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assert_eq!("slti\tt3, a7, 0", print::print(slti, 0));
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assert_eq!("sltiu\tt3, a7, 0", print::print(sltiu, 0));
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assert_eq!("xori\tt3, a7, 0", print::print(xori, 0));
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assert_eq!("ori\tt3, a7, 0", print::print(ori, 0));
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assert_eq!("andi\tt3,a7,0", print::print(andi, 0));
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assert_eq!("addi\tt3,a7,0", print::print(addi, 0));
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assert_eq!("slli\tt3,a7,0", print::print(slli, 0));
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assert_eq!("slti\tt3,a7,0", print::print(slti, 0));
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assert_eq!("sltiu\tt3,a7,0", print::print(sltiu, 0));
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assert_eq!("xori\tt3,a7,0", print::print(xori, 0));
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assert_eq!("ori\tt3,a7,0", print::print(ori, 0));
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}
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#[test]
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@ -201,13 +193,13 @@ mod test {
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let ld = decode::decode(0b010111110000_10001_011_11100_0000011);
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let lwu = decode::decode(0b010111110000_10001_110_11100_0000011);
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assert_eq!("lb\tt3, 1520(a7)", print::print(lb, 0));
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assert_eq!("lh\tt3, 1520(a7)", print::print(lh, 0));
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assert_eq!("lw\tt3, 1520(a7)", print::print(lw, 0));
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assert_eq!("lbu\tt3, 1520(a7)", print::print(lbu, 0));
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assert_eq!("lhu\tt3, 1520(a7)", print::print(lhu, 0));
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assert_eq!("ld\tt3, 1520(a7)", print::print(ld, 0));
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assert_eq!("lwu\tt3, 1520(a7)", print::print(lwu, 0));
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assert_eq!("lb\tt3,1520(a7)", print::print(lb, 0));
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assert_eq!("lh\tt3,1520(a7)", print::print(lh, 0));
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assert_eq!("lw\tt3,1520(a7)", print::print(lw, 0));
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assert_eq!("lbu\tt3,1520(a7)", print::print(lbu, 0));
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assert_eq!("lhu\tt3,1520(a7)", print::print(lhu, 0));
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assert_eq!("ld\tt3,1520(a7)", print::print(ld, 0));
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assert_eq!("lwu\tt3,1520(a7)", print::print(lwu, 0));
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}
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#[test]
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@ -217,10 +209,10 @@ mod test {
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let srlw: decode::Instruction = decode::decode(0b0000000_10000_10001_101_11100_0111011);
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let sraw: decode::Instruction = decode::decode(0b0100000_10000_10001_101_11100_0111011);
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assert_eq!("addw\tt3, a7, a6", print::print(addw, 0));
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assert_eq!("sllw\tt3, a7, a6", print::print(sllw, 0));
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assert_eq!("srlw\tt3, a7, a6", print::print(srlw, 0));
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assert_eq!("sraw\tt3, a7, a6", print::print(sraw, 0));
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assert_eq!("addw\tt3,a7,a6", print::print(addw, 0));
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assert_eq!("sllw\tt3,a7,a6", print::print(sllw, 0));
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assert_eq!("srlw\tt3,a7,a6", print::print(srlw, 0));
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assert_eq!("sraw\tt3,a7,a6", print::print(sraw, 0));
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}
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#[test]
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@ -250,4 +242,45 @@ mod test {
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assert_eq!("beq\ta7, a6, 0", print::print(beq, 0));
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}
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#[test]
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fn test_small_program() {
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/* Code for :
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int a = 0;
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int b = 5;
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a = b;
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a = a * b;
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a = a + b;
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b = a - b;
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*/
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assert_eq!("addi sp,sp,-32", print::print(decode::decode(0xfe010113), 0));
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assert_eq!("sd s0,24(sp)", print::print(decode::decode(0x00813c23), 0));
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assert_eq!("addi s0,sp,32", print::print(decode::decode(0x02010413), 0));
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assert_eq!("sw zero,-20(s0)", print::print(decode::decode(0xfe042623), 0));
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assert_eq!("addi a5,zero,5", print::print(decode::decode(0x00500793), 0));
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assert_eq!("sw a5,-24(s0)", print::print(decode::decode(0xfef42423), 0));
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assert_eq!("lw a5,-24(s0)", print::print(decode::decode(0xfe842783), 0));
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assert_eq!("sw a5,-20(s0)", print::print(decode::decode(0xfef42623), 0));
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assert_eq!("lw a5,-20(s0)", print::print(decode::decode(0xfec42783), 0));
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assert_eq!("addi a4,a5,0", print::print(decode::decode(0x00078713), 0));
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assert_eq!("lw a5,-24(s0)", print::print(decode::decode(0xfe842783), 0));
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//assert_eq!("mulw a5,a4,a5", print::print(decode::decode(0x02f707bb), 0));
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assert_eq!("sw a5,-20(s0)", print::print(decode::decode(0xfef42623), 0));
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assert_eq!("lw a5,-20(s0)", print::print(decode::decode(0xfec42783), 0));
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assert_eq!("addi a4,a5,0", print::print(decode::decode(0x00078713), 0));
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assert_eq!("lw a5,-24(s0)", print::print(decode::decode(0xfe842783), 0));
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assert_eq!("addw a5,a4,a5", print::print(decode::decode(0x00f707bb), 0));
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assert_eq!("sw a5,-20(s0)", print::print(decode::decode(0xfef42623), 0));
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assert_eq!("lw a5,-20(s0)", print::print(decode::decode(0xfec42783), 0));
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assert_eq!("addi a4,a5,0", print::print(decode::decode(0x00078713), 0));
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assert_eq!("lw a5,-24(s0)", print::print(decode::decode(0xfe842783), 0));
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assert_eq!("subw a5,a4,a5", print::print(decode::decode(0x40f707bb), 0));
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assert_eq!("sw a5,-24(s0)", print::print(decode::decode(0xfef42423), 0));
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assert_eq!("addi a5,zero,0", print::print(decode::decode(0x00000793), 0));
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assert_eq!("addi a0,a5,0", print::print(decode::decode(0x00078513), 0));
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assert_eq!("ld s0,24(sp)", print::print(decode::decode(0x01813403), 0));
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assert_eq!("addi sp,sp,32", print::print(decode::decode(0x02010113), 0));
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assert_eq!("jalr zero,0(ra)", print::print(decode::decode(0x00008067), 0));
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}
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}
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