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added the unsigned_addition test and memory mock

This commit is contained in:
amaury 2023-03-15 15:35:28 +01:00
parent 897903344b
commit 8577076f14
4 changed files with 37 additions and 12 deletions
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24
src/simulator/machine.rs
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@ -729,13 +729,11 @@ mod test {
use crate::simulator::{machine::Machine, mem_cmp};
#[test]
#[ignore]
fn test_init_machine() {
let _ = Machine::init_machine();
}
#[test]
#[ignore]
fn test_read_memory() {
let mut m = Machine::init_machine();
m.main_memory[4] = 43;
@ -757,7 +755,6 @@ mod test {
}
#[test]
//#[ignore]
fn test_comp() {
let mut m = Machine::init_machine();
let memory_before = mem_cmp::MemChecker::from("test/machine/memoryComp.txt").unwrap();
@ -772,7 +769,20 @@ mod test {
}
#[test]
//#[ignore]
fn test_add() {
let mut m = Machine::init_machine();
let memory_before = mem_cmp::MemChecker::from("test/machine/memoryAdd.txt").unwrap();
let memory_after = mem_cmp::MemChecker::from("test/machine/memoryAddEnd.txt").unwrap();
mem_cmp::MemChecker::fill_memory_from_mem_checker(&memory_before, &mut m);
Machine::run(&mut m);
let expected_trace = fs::read_to_string("test/machine/reg_traceAdd.txt").unwrap();
assert!(mem_cmp::MemChecker::compare_machine_memory(&memory_after, &m));
assert!(expected_trace.contains(m.registers_trace.as_str()));
}
#[test]
fn test_div() {
let mut m = Machine::init_machine();
let memory_before = mem_cmp::MemChecker::from("test/machine/memoryDiv.txt").unwrap();
@ -787,7 +797,6 @@ mod test {
}
#[test]
//#[ignore]
fn test_if() {
let mut m = Machine::init_machine();
let memory_before = mem_cmp::MemChecker::from("test/machine/memoryIf.txt").unwrap();
@ -802,7 +811,6 @@ mod test {
}
#[test]
//#[ignore]
fn test_jump() {
let mut m = Machine::init_machine();
let memory_before = mem_cmp::MemChecker::from("test/machine/memoryJump.txt").unwrap();
@ -817,7 +825,6 @@ mod test {
}
#[test]
//#[ignore]
fn test_mul() {
let mut m = Machine::init_machine();
let memory_before = mem_cmp::MemChecker::from("test/machine/memoryMult.txt").unwrap();
@ -832,7 +839,6 @@ mod test {
}
#[test]
//#[ignore]
fn test_ret() {
let mut m = Machine::init_machine();
let memory_before = mem_cmp::MemChecker::from("test/machine/memoryRet.txt").unwrap();
@ -847,7 +853,6 @@ mod test {
}
#[test]
//#[ignore]
fn test_sub() {
let mut m = Machine::init_machine();
let memory_before = mem_cmp::MemChecker::from("test/machine/memorySub.txt").unwrap();
@ -862,7 +867,6 @@ mod test {
}
#[test]
//#[ignore]
fn test_switch() {
let mut m = Machine::init_machine();
let memory_before = mem_cmp::MemChecker::from("test/machine/memorySwitch.txt").unwrap();

0
test/machine/memory.txt → test/machine/memoryAdd.txt
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3
test/machine/memoryAddEnd.txt
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@ -5,5 +5,4 @@ fd 01 01 13 02 11 34 23 02 81 30 23 03 01 04 13 fc a4 3c 23 fd 84 37 83 fe f4 34
404000 80
00 09 78 25 00 00 00 00 00 20 20 20 00 00 00 00 00 20 73 25 00 00 00 00 00 00 00 0a 00 00 00 00 6c 75 6e 28 00 00 29 6c 00 40 0e f8 00 40 09 e8 00 40 11 7c 00 40 11 7c 00 40 11 7c 00 40 11 7c 00 40 09 e8 00 40 11 7c 00 40 11 7c 00 40 0b 28 00 40 11 7c 00 40 11 7c 00 40 11 7c 00 40 11 7c 00 40 11 7c 00 40 11 7c 00 40 0f 4c 00 40 11 7c 00 40 11 7c 00 40 11 7c 00 40 11 7c 00 40 0f d0
4010
405270
405270

22
test/machine/reg_traceAdd.txt Normal file
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@ -0,0 +1,22 @@
0 0 4215408 0 0 0 0 0 0 0 -1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 4198400 4215408 0 0 0 0 0 0 0 -1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 16392 4215408 0 0 0 0 0 0 0 -1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 16392 4215376 0 0 0 0 0 0 0 -1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 16392 4215376 0 0 0 0 0 0 0 -1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 16392 4215376 0 0 0 0 0 4215408 0 -1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 16392 4215376 0 0 0 0 0 4215408 0 -1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 16392 4215376 0 0 0 0 0 4215408 0 -1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 16392 4215376 0 0 0 0 0 4215408 0 -1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 16392 4215376 0 0 0 0 0 4215408 0 -1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 16392 4215376 0 0 0 0 0 4215408 0 -1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 16392 4215376 0 0 0 0 0 4215408 0 -1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 16392 4215376 0 0 0 0 0 4215408 0 -1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 16392 4215376 0 0 0 0 0 4215408 0 -1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 16392 4215376 0 0 0 0 0 4215408 0 -1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 16392 4215376 0 0 0 0 0 4215408 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 16392 4215376 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 16392 4215408 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 16392 4215408 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 16392 4215408 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 16400 4215408 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 16400 4215408 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0