Add user_stack_size to Machine and use it for threads sp

This commit is contained in:
Quentin Legot 2023-05-09 17:01:52 +02:00
parent 7d29b92eba
commit 7be0c0accc
6 changed files with 34 additions and 16 deletions

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@ -2,7 +2,7 @@
# BurritOS configuration file # BurritOS configuration file
################################################## ##################################################
NumPhysPages = 400 NumPhysPages = 40000000
UserStackSize = 4096 UserStackSize = 4096
MaxFileNameSize = 256 MaxFileNameSize = 256
NumDirEntries = 30 NumDirEntries = 30

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@ -3,7 +3,7 @@ use std::{cell::RefCell, rc::Rc};
use crate::{simulator::{machine::{ExceptionType, Machine}, error::{MachineOk, MachineError}}}; use crate::{simulator::{machine::{ExceptionType, Machine}, error::{MachineOk, MachineError}}};
use crate::kernel::synch::{Lock, Semaphore}; use crate::kernel::synch::{Lock, Semaphore};
use super::{system::{System, self}, thread::Thread}; use super::{system::System, thread::Thread};
/// The halt system call. Stops Burritos. /// The halt system call. Stops Burritos.
pub const SC_SHUTDOWN: u8 = 0; pub const SC_SHUTDOWN: u8 = 0;
@ -282,7 +282,9 @@ fn sc_new_thread(machine: &mut Machine, system: &mut System) -> Result<MachineOk
}; };
let current_thread = current_thread.borrow_mut(); let current_thread = current_thread.borrow_mut();
if let Some(process) = current_thread.get_process_owner() { if let Some(process) = current_thread.get_process_owner() {
system.get_thread_manager().start_thread(n_thread, Rc::clone(&process), func as u64, current_thread.thread_context.int_registers[2] as u64 + machine.page_size, args); let sp_max = system.get_thread_manager().get_sp_max() + machine.user_stack_size;
system.get_thread_manager().set_sp_max(sp_max);
system.get_thread_manager().start_thread(n_thread, Rc::clone(&process), func as u64, sp_max, args);
// TODO changé la valeur de sp quand on supportera les addresses virtuels // TODO changé la valeur de sp quand on supportera les addresses virtuels
machine.write_int_register(10, tid as i64); machine.write_int_register(10, tid as i64);
Ok(MachineOk::Ok) Ok(MachineOk::Ok)

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@ -118,7 +118,8 @@ pub struct ThreadManager {
/// List of objects created by the thread manager (such as Locks and Semaphores) /// List of objects created by the thread manager (such as Locks and Semaphores)
obj_addrs: ObjAddr, obj_addrs: ObjAddr,
/// If true, enables debug mode /// If true, enables debug mode
debug: bool debug: bool,
sp_max: u64,
} }
impl ThreadManager { impl ThreadManager {
@ -130,7 +131,8 @@ impl ThreadManager {
g_alive: List::default(), g_alive: List::default(),
ready_list: List::default(), ready_list: List::default(),
obj_addrs: ObjAddr::init(), obj_addrs: ObjAddr::init(),
debug debug,
sp_max: 0
} }
} }
@ -423,6 +425,14 @@ impl ThreadManager {
} }
} }
pub fn get_sp_max(&self) -> u64 {
self.sp_max
}
pub fn set_sp_max(&mut self, sp_max: u64) {
self.sp_max = sp_max;
}
} }
#[cfg(test)] #[cfg(test)]

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@ -55,7 +55,10 @@ fn main() {
let owner1 = Process { num_thread: 0 }; let owner1 = Process { num_thread: 0 };
let owner1 = Rc::new(RefCell::new(owner1)); let owner1 = Rc::new(RefCell::new(owner1));
system.get_thread_manager().start_thread(Rc::clone(&thread_exec), owner1, loader.elf_header.entrypoint, ptr + machine.page_size, -1); let sp_max = ptr + machine.user_stack_size;
system.get_thread_manager().set_sp_max(sp_max);
system.get_thread_manager().start_thread(Rc::clone(&thread_exec), owner1, loader.elf_header.entrypoint, sp_max, -1);
let to_run = system.get_thread_manager().find_next_to_run().unwrap(); let to_run = system.get_thread_manager().find_next_to_run().unwrap();
system.get_thread_manager().switch_to(&mut machine, Rc::clone(&to_run)); system.get_thread_manager().switch_to(&mut machine, Rc::clone(&to_run));

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@ -96,6 +96,7 @@ pub struct Machine {
//creer une struct cfg(configuration) qui s'initialise avec valeur dans un fichier cfg //creer une struct cfg(configuration) qui s'initialise avec valeur dans un fichier cfg
num_phy_page: u64, num_phy_page: u64,
pub page_size: u64, pub page_size: u64,
pub user_stack_size: u64,
/// Current machine status /// Current machine status
pub status: MachineStatus pub status: MachineStatus
} }
@ -115,7 +116,8 @@ impl Machine {
let num_phy_page = *settings.get(&MachineSettingKey::NumPhysPages).unwrap(); let num_phy_page = *settings.get(&MachineSettingKey::NumPhysPages).unwrap();
let page_size = *settings.get(&MachineSettingKey::PageSize).unwrap(); let page_size = *settings.get(&MachineSettingKey::PageSize).unwrap();
let mem_size = (page_size*num_phy_page*100_000) as usize; let user_stack_size = *settings.get(&MachineSettingKey::UserStackSize).unwrap();
let mem_size = (page_size*num_phy_page) as usize;
Machine { Machine {
debug, debug,
@ -129,7 +131,8 @@ impl Machine {
registers_trace : String::from(""), registers_trace : String::from(""),
status: MachineStatus::SystemMode, status: MachineStatus::SystemMode,
num_phy_page, num_phy_page,
page_size page_size,
user_stack_size
} }
} }
@ -425,10 +428,10 @@ impl Machine {
RISCV_OPI_XORI => compute(&core::ops::BitXor::bitxor, rs1, imm12), RISCV_OPI_XORI => compute(&core::ops::BitXor::bitxor, rs1, imm12),
RISCV_OPI_ORI => compute(&core::ops::BitOr::bitor, rs1, imm12), RISCV_OPI_ORI => compute(&core::ops::BitOr::bitor, rs1, imm12),
RISCV_OPI_ANDI => compute(&core::ops::BitAnd::bitand, rs1, imm12), RISCV_OPI_ANDI => compute(&core::ops::BitAnd::bitand, rs1, imm12),
RISCV_OPI_SLLI => compute(&core::ops::Shl::shl, rs1, imm12), RISCV_OPI_SLLI => compute(&core::ops::Shl::shl, rs1, shamt),
RISCV_OPI_SRI => if inst.funct7_smaller == RISCV_OPI_SRI_SRLI { RISCV_OPI_SRI => if inst.funct7_smaller == RISCV_OPI_SRI_SRLI {
compute(&|a, b| { (a >> b) & self.shiftmask[inst.shamt as usize] as i64 }, rs1, shamt) compute(&|a, b| { (a >> b) & self.shiftmask[inst.shamt as usize] as i64 }, rs1, shamt)
} else { } else { // SRAI
compute(&core::ops::Shr::shr, rs1, shamt) compute(&core::ops::Shr::shr, rs1, shamt)
} }
_ => Err(format!("Unreachable in opi_instruction match! Instruction was {:?}", inst))? _ => Err(format!("Unreachable in opi_instruction match! Instruction was {:?}", inst))?
@ -501,8 +504,8 @@ impl Machine {
let local_data = self.int_reg.get_reg(inst.rs1); let local_data = self.int_reg.get_reg(inst.rs1);
let result = match inst.funct3 { let result = match inst.funct3 {
RISCV_OPIW_ADDIW => local_data + inst.imm12_I_signed as i64, RISCV_OPIW_ADDIW => local_data + inst.imm12_I_signed as i64,
RISCV_OPIW_SLLIW => local_data << inst.shamt, RISCV_OPIW_SLLIW => local_data << inst.rs2,
RISCV_OPIW_SRW => (local_data >> inst.shamt) & if inst.funct7 == RISCV_OPIW_SRW_SRLIW { self.shiftmask[32 + inst.shamt as usize] as i64 } else { 1 }, RISCV_OPIW_SRW => (local_data >> inst.rs2) & if inst.funct7 == RISCV_OPIW_SRW_SRLIW { self.shiftmask[32 + inst.rs2 as usize] as i64 } else { 1 },
_ => Err(format!("Unreachable in op_instruction match! Instruction was {:?}", inst))? _ => Err(format!("Unreachable in op_instruction match! Instruction was {:?}", inst))?
}; };
self.int_reg.set_reg(inst.rd, result); self.int_reg.set_reg(inst.rd, result);
@ -519,7 +522,7 @@ impl Machine {
// Match case for multiplication operations (in standard extension RV32M) // Match case for multiplication operations (in standard extension RV32M)
match inst.funct3 { match inst.funct3 {
RISCV_OPW_M_MULW => self.int_reg.set_reg(inst.rd, local_data_a * local_data_b), RISCV_OPW_M_MULW => self.int_reg.set_reg(inst.rd, (local_data_a * local_data_b) & 0xffffffff),
RISCV_OPW_M_DIVW => self.int_reg.set_reg(inst.rd, local_data_a / local_data_b), RISCV_OPW_M_DIVW => self.int_reg.set_reg(inst.rd, local_data_a / local_data_b),
RISCV_OPW_M_DIVUW => self.int_reg.set_reg(inst.rd, local_data_a_unsigned / local_data_b_unsigned), RISCV_OPW_M_DIVUW => self.int_reg.set_reg(inst.rd, local_data_a_unsigned / local_data_b_unsigned),
RISCV_OPW_M_REMW => self.int_reg.set_reg(inst.rd, local_data_a % local_data_b), RISCV_OPW_M_REMW => self.int_reg.set_reg(inst.rd, local_data_a % local_data_b),
@ -538,9 +541,9 @@ impl Machine {
}, },
RISCV_OPW_SLLW => self.int_reg.set_reg(inst.rd, local_dataa << (local_datab & 0x1f)), RISCV_OPW_SLLW => self.int_reg.set_reg(inst.rd, local_dataa << (local_datab & 0x1f)),
RISCV_OPW_SRW => if inst.funct7 == RISCV_OPW_SRW_SRLW { RISCV_OPW_SRW => if inst.funct7 == RISCV_OPW_SRW_SRLW {
self.int_reg.set_reg(inst.rd, local_dataa >> (local_datab & 0x1f) & self.shiftmask[32 + local_datab as usize] as i64) self.int_reg.set_reg(inst.rd, local_dataa >> (local_datab /* & 0x1f */) & self.shiftmask[32 + local_datab as usize] as i64)
} else { // SRAW } else { // SRAW
self.int_reg.set_reg(inst.rd, local_dataa >> (local_datab & 0x1f)) self.int_reg.set_reg(inst.rd, local_dataa >> (local_datab /* & 0x1f */))
}, },
_ => Err(format!("Unreachable in opw_instruction match! Instruction was {:?}", inst))? _ => Err(format!("Unreachable in opw_instruction match! Instruction was {:?}", inst))?
} }

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@ -214,7 +214,7 @@ pub mod global {
/// ///
/// Shift left logical immediate /// Shift left logical immediate
/// ///
/// `SLLI rd, rs1, shamt` => `rd <- rs1 >> shamt` /// `SLLI rd, rs1, shamt` => `rd <- rs1 << shamt`
pub const RISCV_OPI_SLLI: u8 = 0x1; pub const RISCV_OPI_SLLI: u8 = 0x1;
/// Shift right immediate, may be SRAI or SRLI /// Shift right immediate, may be SRAI or SRLI
pub const RISCV_OPI_SRI: u8 = 0x5; pub const RISCV_OPI_SRI: u8 = 0x5;