Merge branch 'thread_join' into 'main'

Merge ~~thread_scheduler~~ thread_join to main

See merge request simpleos/burritos!17
This commit is contained in:
Legot Quentin 2023-05-04 22:41:25 +00:00
commit 5f8965b94d
97 changed files with 5741 additions and 1458 deletions

5
.gitignore vendored
View File

@ -1,4 +1,7 @@
/target
/.idea
*.iml
*.txt
/*.txt
/.vscode
*.a
*.o

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@ -1,27 +1,38 @@
default:
image: rust:latest
image: rust:1.68-bookworm
before_script:
- wget -q https://cloud.cuwott.fr/s/9fyrejDxMdNRQNn/download/riscv64-cross-compiler-multilib.tar.gz
- mkdir /opt/riscv
- tar xzf riscv64-cross-compiler-multilib.tar.gz -C /opt/riscv
stages:
- build
- test
build-job:
stage: build
script:
- echo "Compiling the code..."
- cargo build
- echo "Compile complete."
unit-test-job:
stage: test
script:
- echo "Compiling c files"
- make
- echo "Running unit tests..."
- cargo test
unsafe-test-job:
stage: test
script:
- echo "Checking if List is still safe"
- rustup +nightly component add miri
- export MIRIFLAGS="-Zmiri-disable-isolation"
- cargo +nightly miri test utility::list::test
only:
changes:
- "src/utility/list.rs"
lint-test-job:
only:
- merge_requests
refs:
- merge_requests
stage: test
script:
- echo "Linting code..."
- cargo clippy
- rustup component add clippy
- cargo clippy -- -D warnings

380
Cargo.lock generated
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@ -2,6 +2,386 @@
# It is not intended for manual editing.
version = 3
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name = "anstream"
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View File

@ -1,8 +1,14 @@
[package]
name = "burritos"
rust-version = "1.64"
version = "0.1.0"
edition = "2021"
# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
[registries.crates-io]
protocol = "sparse"
[build-dependencies]
cc = "1.0"
[dependencies]
clap = { version = "4.2.1", features = ["derive"] }

31
Makefile Normal file
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@ -0,0 +1,31 @@
TOPDIR=.
include $(TOPDIR)/Makefile.config
all: dumps user_lib instruction_tests syscall
#
# Main targets
#
instruction_tests:
$(MAKE) build -C test/riscv_instructions/
dumps:
$(MAKE) dumps -C test/riscv_instructions/
mkdir -p ${TOPDIR}/target/dumps/
find . -path ${TOPDIR}/target -prune -o -name '*.dump' -exec mv {} ${TOPDIR}/target/dumps/ \;
user_lib:
$(MAKE) -C userlib/
syscall: user_lib
$(MAKE) build -C test/syscall_tests/
$(RM) test/syscall_tests/*.o
mkdir -p ${TOPDIR}/target/guac/
find . -name '*.guac' -exec mv {} ${TOPDIR}/target/guac/ \;
clean:
$(MAKE) clean -C userlib/
$(MAKE) clean -C test/
$(RM) -rf $(TOPDIR)/target

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@ -1,5 +1,11 @@
include $(TOPDIR)/Makefile.config
USERLIB = $(TOPDIR)/userlib
AS = $(RISCV_AS) -c
GCC = $(RISCV_GCC)
LD = $(RISCV_LD)
INCPATH += -I$(TOPDIR) -I$(USERLIB)
LDFLAGS = $(RISCV_LDFLAGS) -T $(USERLIB)/ldscript.lds
ASFLAGS = $(RISCV_ASFLAGS) $(INCPATH)
@ -7,16 +13,19 @@ CFLAGS = $(RISCV_CFLAGS) $(INCPATH)
# Rules
%.o: %.s
$(RISCV_AS) $(ASFLAGS) -c $<
$(AS) $(ASFLAGS) -c $<
%.o: %.c
$(RISCV_GCC) $(CFLAGS) -c $<
$(GCC) $(CFLAGS) -c $<
%.a: %.o
$(AR) $(ARFLAGS) $@ $<
%.dump: %.o
$(RISCV_OBJCOPY) -j .text -O $(DUMP_FORMAT) $< $@
%.guac: %.o
$(RISCV_LD) $(LDFLAGS) $+ -o $@
$(LD) $(LDFLAGS) $+ -o $@
# Dependencies
.%.d: %.s
@ -31,6 +40,9 @@ CFLAGS = $(RISCV_CFLAGS) $(INCPATH)
| sed '\''s/\($*\)\.o[ :]*/\1.o $@ : /g'\'' > $@; \
[ -s $@ ] || rm -f $@'
$(PROGRAMS):
$(LD) $(LDFLAGS) $+ -o $@
# Targets
#clean:
# rm -rf *.o 2> /dev/null

40
burritos.cfg Executable file
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@ -0,0 +1,40 @@
##################################################
# BurritOS configuration file
##################################################
NumPhysPages = 400
UserStackSize = 4096
MaxFileNameSize = 256
NumDirEntries = 30
NumPortLoc = 32009
NumPortDist = 32010
ProcessorFrequency = 100
SectorSize = 128
PageSize = 128
MaxVirtPages = 200000
# String values
###############
# WARNING: Copying can be very slow
# because the system transferts data
# by 10 byte chunks. The transfer file
# can be set by changing the transfersize
# constant in fstest.rs.
TargetMachineName = localhost
FileToCopy = test/halt /halt
FileToCopy = test/hello /hello
FileToCopy = test/sort /sort
FileToCopy = test/shell /shell
# Boolean values
################
UseACIA = None
PrintStat = 1
FormatDisk = 1
ListDir = 1
PrintFileSyst = 0
ProgramToRun = /sort

390
src/kernel/exception.rs Normal file
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@ -0,0 +1,390 @@
use std::{cell::RefCell, rc::Rc};
use crate::{simulator::{machine::{ExceptionType, Machine}, error::{MachineOk, MachineError}}};
use crate::kernel::synch::{Lock, Semaphore};
use super::{system::{System, self}, thread::Thread};
/// The halt system call. Stops Burritos.
pub const SC_SHUTDOWN: u8 = 0;
/// The exit system call
///
/// Ends the calling thread
pub const SC_EXIT: u8 = 1;
/// The exec system call
///
/// Creates a new process (thread+address space)
pub const SC_EXEC: u8 = 2;
/// The join system call
///
/// Wait for the thread idThread to finish
pub const SC_JOIN: u8 = 3;
/// The create system call
///
/// Create a new file in nachos file system
pub const SC_CREATE: u8 = 4;
/// The open system call
///
/// Opens a file and returns an openfile identifier
pub const SC_OPEN: u8 = 5;
/// The read system call
///
/// Read in a file or the console
pub const SC_READ: u8 = 6;
/// The write system call
///
/// Write in a file or at the console
pub const SC_WRITE: u8 = 7;
/// Seek to a given position in an opened file
pub const SC_SEEK: u8 = 8;
/// The close system call
///
/// Close a file
pub const SC_CLOSE: u8 = 9;
/// The newThread system call
///
/// Create a new thread in the same address space
pub const SC_NEW_THREAD: u8 = 10;
/// The Yield System call
///
/// Relinquish the CPU if any other thread is runnable
pub const SC_YIELD: u8 = 11;
/// the PError system call
///
/// print the last error message
pub const SC_PERROR: u8 = 12;
/// carry out P() on the semaphore
pub const SC_P: u8 = 13;
/// carry out V() on the semaphore
pub const SC_V: u8 = 14;
/// create a semaphore and add it in g_objects_addrs
pub const SC_SEM_CREATE: u8 = 15;
/// destroy the semaphore corresponding to the id
pub const SC_SEM_DESTROY: u8 = 16;
/// create a lock and add it to g_object_addrs
pub const SC_LOCK_CREATE: u8 = 17;
/// destroy the lock corresponding to the id
pub const SC_LOCK_DESTROY: u8 = 18;
/// carry out acquire() on the lock
pub const SC_LOCK_ACQUIRE: u8 = 19;
/// carry out release() on the lock
pub const SC_LOCK_RELEASE: u8 = 20;
/// create a condition variable and add it to g_object_addrs
pub const SC_COND_CREATE: u8 = 21;
/// destroy the condition variable corresponding to the id
pub const SC_COND_DESTROY: u8 = 22;
/// carry out wait() on the condition
pub const SC_COND_WAIT: u8 = 23;
/// carry out signal() on the condition
pub const SC_COND_SIGNAL: u8 = 24;
/// carry out broadcast() on the condition
pub const SC_COND_BROADCAST: u8 = 25;
/// the TtySend system call
///
/// Sends some char by the serial line emulated
pub const SC_TTY_SEND: u8 = 26;
/// the TtyReceive system call
///
/// read some char on the serial line
pub const SC_TTY_RECEIVE: u8 = 27;
/// the Mkdir system call
///
/// make a new directory in the file system
pub const SC_MKDIR: u8 = 28;
/// the Rmdir system call
///
/// remove a directory from the file system
pub const SC_RMDIR: u8 = 29;
/// The Remove system call
///
/// Remove a file from the file system
pub const SC_REMOVE: u8 = 30;
/// The FSList system call
///
/// Lists all the file and directories in the filesystem
pub const SC_FSLIST: u8 = 31;
// The systime system call. Gets the system time
pub const SC_SYS_TIME: u8 = 32;
/// Map a file in memory
pub const SC_MMAP: u8 = 33;
/// Behaviour undefined and currently unused
pub const SC_DEBUG: u8 = 34;
pub const CONSOLE_OUTPUT: u8 = 1;
// todo : returns new types, not just machine errors and machine ok
pub fn call(exception: &ExceptionType, machine: &mut Machine, system: &mut System) -> Result<MachineOk, MachineError> {
match exception {
ExceptionType::NoException => Err("No Exception no yet implemented")?,
ExceptionType::SyscallException => syscall(machine, system),
ExceptionType::PagefaultException => Err("Page Fault Exception not yet implemented")?,
ExceptionType::ReadOnlyException => Err("Read Only Exception not yet implemented")?,
ExceptionType::BusErrorException => Err("Bus Error Exception not yet implemented")?,
ExceptionType::AddressErrorException => Err("AddressErrorException not yet implemented")?,
ExceptionType::OverflowException => Err("OverflowException not yet implemented")?,
ExceptionType::IllegalInstrException => Err("IllegalInstrException not yet implemented")?,
ExceptionType::NumExceptionTypes => Err("NumExceptionTypes not yet implemented")?,
}
}
fn syscall(machine: &mut Machine, system: &mut System) -> Result<MachineOk, MachineError> {
let call_type = machine.read_int_register(17) as u8;
match call_type {
SC_SHUTDOWN => Ok(MachineOk::Shutdown),
SC_EXIT => {
let th = match &system.get_thread_manager().g_current_thread {
Some(th) => th.clone(),
None => Err("Current thread is None")?
};
system.get_thread_manager().thread_finish(machine, th);
Ok(MachineOk::Ok)
},
SC_EXEC => todo!(),
SC_JOIN => sc_join(machine, system),
SC_CREATE => todo!(),
SC_OPEN => todo!(),
SC_READ => todo!(),
SC_WRITE => {
let address = machine.read_int_register(10);
let size = machine.read_int_register(11);
// openfileid or 1 (console)
let f = machine.read_int_register(12);
// load buffer
let mut buffer = "".to_string();
for i in 0..size {
buffer.push((machine.read_memory(1, (address + i) as usize)) as u8 as char);
}
if f as u8 == CONSOLE_OUTPUT {
println!("{}", buffer); // todo replace with console driver in the future
Ok(MachineOk::Ok)
} else {
Err("SC_WRITE to file is not yet implemented")?
}
},
SC_SEEK => todo!(),
SC_CLOSE => todo!(),
SC_NEW_THREAD => sc_new_thread(machine, system),
SC_YIELD => todo!(),
SC_PERROR => todo!(),
SC_P => sc_p(machine, system),
SC_V => sc_v(machine, system),
SC_SEM_CREATE => sc_sem_create(machine, system),
SC_SEM_DESTROY => sc_sem_remove(machine, system),
SC_LOCK_CREATE => sc_lock_create(machine, system),
SC_LOCK_DESTROY => sc_lock_destroy(machine, system),
SC_LOCK_ACQUIRE => sc_lock_acquire(machine, system),
SC_LOCK_RELEASE => todo!(),
SC_COND_CREATE => todo!(),
SC_COND_DESTROY => todo!(),
SC_COND_WAIT => todo!(),
SC_COND_SIGNAL => todo!(),
SC_COND_BROADCAST => todo!(),
SC_TTY_SEND => todo!(),
SC_TTY_RECEIVE => todo!(),
SC_MKDIR => todo!(),
SC_RMDIR => todo!(),
SC_REMOVE => todo!(),
SC_FSLIST => todo!(),
SC_SYS_TIME => todo!(),
SC_MMAP => todo!(),
SC_DEBUG => todo!(),
_ => todo!()
}
}
fn sc_lock_release(machine: &mut Machine, system: &mut System) -> Result<MachineOk, MachineError>{
let id = machine.read_int_register(10) as i32;
system.get_thread_manager().lock_release(id, machine)
}
fn sc_lock_acquire(machine: &mut Machine, system: &mut System) -> Result<MachineOk, MachineError> {
let id = machine.read_int_register(10) as i32;
system.get_thread_manager().lock_acquire(id, machine)
}
fn sc_lock_create(machine: &mut Machine, system: &mut System) -> Result<MachineOk, MachineError> {
let addr_name = machine.read_int_register(10) as usize;
let size = get_length_param(addr_name, machine);
let _name = get_string_param(addr_name, size, machine);
let lock = Lock::new();
let id = system.get_thread_manager().get_obj_addrs().add_lock(lock);
machine.write_int_register(10, id as i64);
Ok(MachineOk::Ok)
}
fn sc_lock_destroy(machine: &mut Machine, system: &mut System) -> Result<MachineOk, MachineError> {
let id = machine.read_int_register(10) as i32;
system.get_thread_manager().get_obj_addrs().remove_lock(id);
Ok(MachineOk::Ok)
}
fn sc_p(machine: &mut Machine, system: &mut System) -> Result<MachineOk, MachineError> {
let id_sema = machine.int_reg.get_reg(10);
system.get_thread_manager().sem_p(id_sema as i32, machine)
}
fn sc_v(machine: &mut Machine, system: &mut System) -> Result<MachineOk, MachineError> {
let id_sema = machine.int_reg.get_reg(10);
system.get_thread_manager().sem_v(id_sema as i32, machine)
}
fn sc_sem_create(machine: &mut Machine, system: &mut System) -> Result<MachineOk, MachineError> {
let addr_name = machine.read_int_register(10) as usize;
let initial_count = machine.read_int_register(11) as i32;
let size = get_length_param(addr_name, machine);
let _name = get_string_param(addr_name, size, machine);
match initial_count < 0 {
true => Err(format!("Initial_count < 0"))?,
false => {
let id = system.get_thread_manager().get_obj_addrs().add_semaphore(Semaphore::new(initial_count));
machine.write_int_register(10, id as i64);
Ok(MachineOk::Ok)
}
}
}
fn sc_sem_remove(machine: &mut Machine, system: &mut System) -> Result<MachineOk, MachineError>{
let id = machine.read_int_register(10) as i32;
system.get_thread_manager().get_obj_addrs().remove_semaphore(id);
Ok(MachineOk::Ok)
}
fn sc_new_thread(machine: &mut Machine, system: &mut System) -> Result<MachineOk, MachineError> {
// Get the address of the string for the name of the thread
let name_addr = machine.read_int_register(10) as usize;
// Get the pointer of the function to be executed in the new thread
let func = machine.read_int_register(11);
// Get function parameters
let args = machine.read_int_register(12);
// get string name
let name_size = get_length_param(name_addr, machine);
let thread_name: String = get_string_param(name_addr, name_size, machine).into_iter().collect();
let n_thread = Thread::new(thread_name.as_str());
let n_thread = Rc::new(RefCell::new(n_thread));
let tid = system.get_thread_manager().get_obj_addrs().add_thread(Rc::clone(&n_thread));
let current_thread = match system.get_thread_manager().get_g_current_thread() {
Some(th) => {
Rc::clone(th)
},
None => {
return Err("Current thread is none")?;
}
};
let current_thread = current_thread.borrow_mut();
if let Some(process) = current_thread.get_process_owner() {
system.get_thread_manager().start_thread(n_thread, Rc::clone(&process), func as u64, current_thread.thread_context.int_registers[2] as u64 + machine.page_size, args);
// TODO changé la valeur de sp quand on supportera les addresses virtuels
machine.write_int_register(10, tid as i64);
Ok(MachineOk::Ok)
} else {
return Err("Process owner of current thread is none")?;
}
}
fn sc_join(machine: &mut Machine, system: &mut System) -> Result<MachineOk, MachineError> {
let tid = machine.read_int_register(10);
let p_thread = system.get_thread_manager().get_obj_addrs().search_thread(tid as i32);
match p_thread {
Some(waiting_for) => {
let rc_waiting_for = Rc::clone(waiting_for);
if let Some(current_thread) = system.get_thread_manager().get_g_current_thread() {
let rc_curr = Rc::clone(current_thread);
system.get_thread_manager().thread_join(machine, rc_curr, rc_waiting_for);
Ok(MachineOk::Ok)
} else {
Err("Current should not be None")?
}
},
None => {
// Thread already terminated (type set to INVALID_TYPE) or call on an object
// that is not a thread
// Exit with no error code since we cannot separate the two cases
Ok(MachineOk::Ok)
}
}
}
fn get_length_param(addr: usize, machine: & Machine) -> usize {
let mut i = 0;
let mut c = 1;
while c != 0 {
c = machine.read_memory(1, addr + i);
i += 1;
}
i + 1
}
fn get_string_param(addr: usize, maxlen: usize, machine: &Machine) -> Vec<char> {
let mut dest = Vec::with_capacity(maxlen);
let mut i: usize = 0;
let mut c = 1;
while c != 0 && i < maxlen {
c = machine.read_memory(1, addr + i) as u8;
dest.push(c as char);
i += 1;
}
dest
}
#[cfg(test)]
mod test {
use crate::kernel::exception::{SC_SHUTDOWN, SC_WRITE};
use crate::kernel::system::System;
use crate::simulator::machine::Machine;
use crate::utility::cfg::get_debug_configuration;
#[test]
fn test_sc_shutdown() {
let mut machine = Machine::new(true, get_debug_configuration());
machine.write_int_register(17, SC_SHUTDOWN as i64); // Set type to shutdown
// let ecall = Instruction::new(0b000000000000_00000_000_00000_1110011);
machine.write_memory(4, 0, 0b000000000000_00000_000_00000_1110011); // ecall
machine.write_memory(4, 4, 0b000000001010_00000_000_00001_0010011); // r1 <- 10
let mut system = System::new(true);
machine.run(&mut system);
// If the machine was stopped with no error, the shutdown worked
assert_ne!(machine.read_int_register(1), 10); // Check if the next instruction was executed
}
// This test print HELLO in the console
#[test]
#[ignore]
fn test_sc_print() {
let mut machine = Machine::new(true, get_debug_configuration());
let _address = machine.read_int_register(10);
// Write string 'HELLO' in memory
machine.write_memory(1, 4000, 72);
machine.write_memory(1, 4001, 69);
machine.write_memory(1, 4002, 76);
machine.write_memory(1, 4003, 76);
machine.write_memory(1, 4004, 79);
machine.write_int_register(10, 4000); // String address
machine.write_int_register(11, 5); // String size
machine.write_int_register(12, 1); // Console output
machine.write_memory(4, 0, 0b000000000000_00000_000_00000_1110011); // ecall
machine.write_int_register(17, SC_WRITE as i64); // Set type to write
machine.write_memory(4, 4, 0b000000000000_00000_000_10001_0010011); // r17 <- SC_SHUTDOWN
machine.write_memory(4, 8, 0b000000000000_00000_000_00000_1110011); // ecall
let mut system = System::new(true);
machine.run(&mut system);
}
}

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#![allow(unused, clippy::missing_docs_in_private_items)]
/// Error enum, use it with Result<YourSucessStruct, **ErrorCode**>
pub enum ErrorCode {
IncError,
OpenfileError,
ExecFileFormatError,
OutOfMemory,
OutOfDisk,
AlreadyInDirectory,
InexistFileError,
InexistDirectoryError,
NospaceInDirectory,
NotAFile,
NotADirectory,
DirectoryNotEmpty,
InvalidCounter,
/* Invalid typeId fields: */
InvalidSemaphoreId,
InvalidLockId,
InvalidConditionId,
InvalidFileId,
InvalidThreadId,
/* Other messages */
WrongFileEndianess,
NoAcia,
NumMsgError /* Must always be last */
}

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pub mod process;
pub mod thread;
pub mod mgerror;
pub mod system;
pub mod synch;
mod thread_manager;
pub mod exception;

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#[derive(PartialEq, Debug)]
pub struct Process {
pub num_thread: usize,
}

292
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use crate::utility::list::List;
use crate::kernel::thread::Thread;
use crate::simulator::interrupt::InterruptStatus::InterruptOff;
use crate::simulator::machine::Machine;
use std::cell::RefCell;
use std::rc::Rc;
use super::thread_manager::ThreadManager;
/// Structure of a Semaphore used for synchronisation
#[derive(PartialEq)]
pub struct Semaphore {
/// Counter of simultanous Semaphore
pub counter:i32,
/// QUeue of Semaphore waiting to be exucated
pub waiting_queue:List<Rc<RefCell<Thread>>>,
}
impl Semaphore {
/// Initializes a semaphore, so that it can be used for synchronization.
///
/// ### Parameters
/// - *counter* initial value of counter
/// - *thread_manager* Thread manager which managing threads
pub fn new(counter: i32) -> Semaphore{
Semaphore { counter, waiting_queue: List::default() }
}
}
/// Lock used for synchronisation, can be interpreted has a Semaphore with a
/// counter of 1
/// It's used for critical parts
#[derive(PartialEq)]
#[derive(Clone)]
pub struct Lock {
/// Thread owning the lock
pub owner: Option<Rc<RefCell<Thread>>>,
/// The queue of threads waiting for execution
pub waiting_queue:List<Rc<RefCell<Thread>>>,
/// A boolean definig if the lock is free or not
pub free: bool
}
impl Lock {
/// Initialize a Lock, so that it can be used for synchronization.
/// The lock is initialy free
///
/// ### Parameters
/// - **thread_manager** Thread manager which managing threads
pub fn new() -> Lock {
Lock { owner: None, waiting_queue: List::default(), free: true }
}
/// Wait until the lock become free. Checking the
/// state of the lock (free or busy) and modify it must be done
/// atomically, so we need to disable interrupts before checking
/// the value of free.
///
/// Note that thread_manager::thread_seep assumes that interrupts are disabled
/// when it is called.
///
/// ### Parameters
/// - **current_thread** the current thread
/// - **machine** the machine where the threads are executed
pub fn acquire(&mut self, machine: &mut Machine, thread_manager: &mut ThreadManager) {
let old_status = machine.interrupt.set_status(InterruptOff);
if self.free {
self.free = false;
self.owner = Option::Some(match thread_manager.get_g_current_thread() {
Some(th) => {
Rc::clone(&th)
},
None => unreachable!()
});
} else {
match thread_manager.get_g_current_thread() {
Some(x) => {
let x = Rc::clone(&x);
self.waiting_queue.push(Rc::clone(&x));
thread_manager.thread_sleep(machine, Rc::clone(&x));
},
None => unreachable!("Current thread should not be None")
}
}
machine.interrupt.set_status(old_status);
}
/// Wake up a waiter if necessary, or release it if no thread is waiting.
/// We check that the lock is held by the g_current_thread.
/// As with Acquire, this operation must be atomic, so we need to disable
/// interrupts. scheduler::ready_to_run() assumes that threads
/// are disabled when it is called.
///
/// ### Parameters
/// - **machine** the machine where the code is executed
/// - **scheduler** the scheduler which determine which thread to execute
pub fn release(&mut self, machine: &mut Machine, thread_manager: &mut ThreadManager) {
let old_status = machine.interrupt.set_status(InterruptOff);
match thread_manager.get_g_current_thread() {
Some(_) => {
if self.held_by_current_thread(thread_manager) {
match self.waiting_queue.pop() {
Some(thread) => {
self.owner = Some(thread);
match &self.owner {
Some(x) => thread_manager.ready_to_run(Rc::clone(&x)),
None => ()
}
},
None => {
self.free = true;
self.owner = None;
}
}
}
}
None => ()
}
machine.interrupt.set_status(old_status);
}
/// True if the current thread holds this lock.
/// Useful for checking in Release, and in Condition operations below.
pub fn held_by_current_thread(&mut self, thread_manager: &mut ThreadManager) -> bool {
match &self.owner {
Some(x) =>
match thread_manager.get_g_current_thread() {
Some(thread) => Rc::ptr_eq(x, thread),
None => false
}
None => false
}
}
}
/// Structure of a condition used for synchronisation
#[allow(unused)] // -> No enough time to implement it
pub struct Condition{
/// The queue of threads waiting for execution
waiting_queue:List<Rc<RefCell<Thread>>>,
}
impl Condition {
/// Initializes a Condition, so that it can be used for synchronization.
///
/// ### Parameters
/// - *thread_manager* Thread manager which managing threads
#[allow(unused)]
pub fn new() -> Condition {
Condition{ waiting_queue: List::default()}
}
/// Block the calling thread (put it in the wait queue).
/// This operation must be atomic, so we need to disable interrupts.
///
/// ### Parameters
/// - **current_thread** the current thread
/// - **machine** the machine where threads are executed
#[allow(unused)]
pub fn wait(&mut self, machine: &mut Machine, thread_manager: &mut ThreadManager) {
let old_status = machine.interrupt.set_status(InterruptOff);
match thread_manager.get_g_current_thread() {
Some(thread) => {
let rc1 = Rc::clone(thread);
let rc2 = Rc::clone(thread);
self.waiting_queue.push(rc1);
thread_manager.thread_sleep(machine, rc2);
},
None => unreachable!()
}
machine.interrupt.set_status(old_status);
}
/// Wake up the first thread of the wait queue (if any).
/// This operation must be atomic, so we need to disable interrupts.
///
/// ### Parameters
/// - **machine** the machine where the code is executed
/// - **scheduler** the scheduler which determine which thread to execute
#[allow(unused)]
pub fn signal(&mut self, machine: &mut Machine, thread_manager: &mut ThreadManager) {
let old_status = machine.interrupt.set_status(InterruptOff);
match self.waiting_queue.pop() {
Some(thread) => thread_manager.ready_to_run(thread),
None => ()
}
machine.interrupt.set_status(old_status);
}
/// Wake up all threads waiting in the waitqueue of the condition
/// This operation must be atomic, so we need to disable interrupts.
///
/// ### Parameters
/// - **machine** the machine where the code is executed
/// - **scheduler** the scheduler which determine which thread to execute
#[allow(unused)]
pub fn broadcast(&mut self, machine: &mut Machine, thread_manager: &mut ThreadManager) {
let old_status = machine.interrupt.set_status(InterruptOff);
match self.waiting_queue.pop() {
Some(thread) => thread_manager.ready_to_run(thread),
None => ()
}
machine.interrupt.set_status(old_status);
}
}
#[cfg(test)]
mod test {
use std::{rc::Rc, cell::RefCell};
use crate::{kernel::{thread::Thread, synch::Lock, thread_manager::ThreadManager}, simulator::machine::Machine, utility::cfg::get_debug_configuration};
#[test]
fn test_lock_simple() {
let mut machine = Machine::new(true, get_debug_configuration());
let mut tm = ThreadManager::new(true);
let thread = Rc::new(RefCell::new(Thread::new("test_lock")));
tm.ready_to_run(Rc::clone(&thread));
tm.set_g_current_thread(Some(Rc::clone(&thread)));
let mut lock = Lock::new();
assert!(lock.free);
lock.acquire(&mut machine, &mut tm);
assert!(lock.held_by_current_thread(&mut tm));
assert!(!lock.free);
lock.release(&mut machine, &mut tm);
assert!(!lock.held_by_current_thread(&mut tm));
assert!(lock.free);
}
#[test]
fn test_lock_multiple() {
let thread1 = Rc::new(RefCell::new(Thread::new("test_lock1")));
let thread2 = Rc::new(RefCell::new(Thread::new("test_lock2")));
let mut machine = Machine::new(true, get_debug_configuration());
let mut tm = ThreadManager::new(true);
tm.ready_to_run(Rc::clone(&thread1));
tm.ready_to_run(Rc::clone(&thread2));
tm.set_g_current_thread(Some(Rc::clone(&thread1)));
let mut lock = Lock::new();
assert!(lock.free);
lock.acquire(&mut machine, &mut tm);
assert!(lock.held_by_current_thread(&mut tm));
assert!(!lock.free);
tm.set_g_current_thread(Some(Rc::clone(&thread2)));
lock.acquire(&mut machine, &mut tm);
tm.set_g_current_thread(Some(Rc::clone(&thread1)));
assert!(lock.held_by_current_thread(&mut tm));
assert!(lock.waiting_queue.iter().count() == 1);
assert!(!lock.free);
lock.release(&mut machine, &mut tm);
assert!(!lock.held_by_current_thread(&mut tm));
tm.set_g_current_thread(Some(Rc::clone(&thread2)));
assert!(lock.held_by_current_thread(&mut tm));
assert!(!lock.free);
lock.release(&mut machine, &mut tm);
assert!(!lock.held_by_current_thread(&mut tm));
assert!(lock.free);
}
}

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//! # System module
//!
//! Module containing structs and methods pertaining to the state of the operating system
use super::{thread_manager::ThreadManager};
/// # System
///
/// This structure represents the state of the threads running on the operating system.
/// It contains references to the following:
///
/// - The simulated machine
/// - The current running thread
/// - The list of active threads
/// - The thread to be destroyed next
/// - The scheduler which acts upon these threads
pub struct System {
thread_manager: ThreadManager
}
impl System {
pub fn new(debug: bool) -> Self {
Self { thread_manager: ThreadManager::new(debug) }
}
// GETTERS
pub fn get_thread_manager(&mut self) -> &mut ThreadManager {
&mut self.thread_manager
}
}

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use std::{rc::Rc, cell::RefCell};
use super::{process::Process, thread_manager::ThreadRef};
use crate::{simulator::machine::{NUM_INT_REGS, NUM_FP_REGS, STACK_REG}, utility::list::List};
const STACK_FENCEPOST: u32 = 0xdeadbeef;
/// Polymorphic macro to get thread without passing a name by default
#[macro_export]
macro_rules! get_new_thread {
() => { Thread::new(DEFAULT_THREAD_NAME) };
($a:literal) => {
Thread::new(&$a.to_string())
};
}
#[derive(PartialEq, Debug)]
pub struct ThreadContext {
pub int_registers: [i64; NUM_INT_REGS],
pub float_registers: [f32; NUM_FP_REGS],
pub pc: u64,
}
#[derive(PartialEq, Debug)]
pub struct Thread {
name: String,
pub process: Option<Rc<RefCell<Process>>>,
pub thread_context: ThreadContext,
pub join_thread: List<ThreadRef>,
}
impl Thread {
/// Thread constructor
pub fn new(name: &str) -> Self {
Self {
name: String::from(name),
process: None,
// simulation_context: UContextT::new(),
thread_context: ThreadContext {
int_registers: [0; NUM_INT_REGS],
float_registers: [0f32; NUM_FP_REGS],
pc: 0,
},
join_thread: List::default(),
}
}
pub fn init_thread_context(&mut self, initial_pc_reg: u64, initial_sp: u64, arg: i64) {
self.thread_context.pc = initial_pc_reg;
self.thread_context.int_registers[10] = arg;
self.thread_context.int_registers[STACK_REG] = initial_sp as i64;
}
/// Check if a thread has overflowed its stack
///
/// This assertion doesn't catch all stack overflow conditions and your program may still crash because of an overflow.
///
pub fn check_overflow(&self) {
// if self.simulator_context.stackBottom != STACK_FENCEPOST {
// panic!("thread {} has overflowed", self.get_name())
// }
}
pub fn get_name(&self) -> String {
self.name.clone()
}
/// Return reference to an optional Process
/// can be None if Thread hasn't been initialize
pub fn get_process_owner(&self) -> &Option<Rc<RefCell<Process>>> {
&self.process
}
}
#[cfg(test)]
mod test {
use super::{Thread, ThreadContext, NUM_INT_REGS, NUM_FP_REGS};
const DEFAULT_THREAD_NAME: &str = "test_thread";
/// This macro allows for getting a Thread for which we've ensured proper initial state
/// in case a commit further down the line changes the initial state of threads generated
/// from Thread::new
macro_rules! expected_initial_state {
() => { expected_initial_state!(DEFAULT_THREAD_NAME) };
($a:expr) => { {
let mut x = Thread::new($a);
x.name = $a.to_string();
x.process = Option::None;
x.thread_context = ThreadContext {
int_registers: [0; NUM_INT_REGS],
float_registers: [0f32; NUM_FP_REGS],
pc: 0
};
x }
};
}
#[test]
fn test_macro() {
let t = get_new_thread!("hello");
assert_eq!(t.get_name(), "hello");
let t = get_new_thread!(1);
assert_eq!(t.get_name(), "1");
}
#[test]
fn check_init() {
let t = get_new_thread!();
let expected_state = expected_initial_state!();
assert_eq!(t, expected_state)
}
}

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//! # Thread manager
//!
//! This module describes the data structure and the methods used for thread scheduling
//! in the BurritOS operating system. A struct named [`ThreadManager`] holds the list of
//! all existing [`Thread`] instances and synchronization objects, such as
//! [`Lock`](crate::kernel::synch::Lock),
//! [`Semaphore`](crate::kernel::synch::Semaphore) and
//! [`Condition`](crate::kernel::synch::Condition).
//!
//! ## Purpose
//!
//! [`ThreadManager`] holds the state of the system processes using the following subcomponents:
//!
//! ### Two lists of threads
//!
//! - **ready_list**: The list of threads ready to be executed
//! - **g_alive**: The list of currently executing threads
//!
//! The difference between the two above lists lies in the state of the threads in question.
//! Ready threads have just been enqueued. They are not being executed yet. The second list is
//! needed because many threads may be executing at a given time. However, only a single thread
//! can be handled by the machine at a time. The system thus needs to keep in memory the alive
//! threads in case the currently running thread finishes or gets rescheduled.
//!
//! ### A list of synchronization objects
//!
//! Locks, Semaphores and Conditions allow resource sharing among running threads. Since resources
//! can only be accessed by a single thread at a time, we need data structures to signal other
//! threads that a resource may be busy or unavailable; say for example that:
//!
//! - Thread **A** wants to write to a file while **B** is currently reading said file.
//! - Thread **A** mutating the state of the file could cause issues for **B**.
//! - Therefore **B** needs to lock the file in question to avoid such issues.
//! - Thread **A** will have to wait for **B** to finish reading the file.
//!
//! These synchronization objects are held in an instance of the ObjAddr structure held by
//! ThreadManager. Their state is mutated depending on the actions of the currently running thread
//! through methods such as [`ThreadManager::sem_p`].
//!
//! ## Usage
//!
//! [`ThreadManager`] is thought as a subcomponent of the [`System`](crate::kernel::system::System) struct.
//! Instanciating [`System`](crate::kernel::system::System) will automatically instanciate a [`ThreadManager`]
//!
//! Manually loading a [`Thread`] into [`ThreadManager`] to execute a program with BurritOS could look like
//! this:
//!
//! ```
//! fn load_thread_manually(args: ...) {
//! let mut system = System::new(args.debug);
//!
//! let thread_exec = Thread::new(args.executable.as_str());
//! let thread_exec = Rc::new(RefCell::new(thread_exec));
//! system.get_thread_manager().get_g_alive().push(Rc::clone(&thread_exec));
//!
//! let owner1 = Process { num_thread: 0 };
//! let owner1 = Rc::new(RefCell::new(owner1));
//! system.get_thread_manager().start_thread(Rc::clone(&thread_exec), owner1, loader.elf_header.entrypoint, ptr, -1);
//!
//! let to_run = system.get_thread_manager().find_next_to_run().unwrap();
//! system.get_thread_manager().switch_to(&mut machine, Rc::clone(&to_run));
//!
//! machine.run(&mut system);
//! }
//! ```
//!
//! ## Imports
//!
//! The [`List`] and [`ObjAddr`] submodules used in this module are defined in the utility
//! module. The source code of [`ObjAddr`] has been decoupled from thread_manager in an effort
//! to keep this module concise.
use std::{
rc::Rc,
cell::{
RefCell,
Ref
}
};
use crate::{
utility::{
list::List,
objaddr::ObjAddr
},
simulator::{
machine::{
NUM_INT_REGS,
NUM_FP_REGS,
Machine
},
interrupt::InterruptStatus,
error::{
MachineOk,
MachineError
}
},
kernel::{
thread::Thread,
process::Process
}
};
/// Using this type alias to simplify struct and method definitions
pub type ThreadRef = Rc<RefCell<Thread>>;
/// # Thread manager
///
/// An instance of this struct is responsible for managing threads on behalf of the system
#[derive(PartialEq)]
pub struct ThreadManager {
/// Current running thread
pub g_current_thread: Option<ThreadRef>,
/// The list of alive threads
pub g_alive: List<ThreadRef>,
/// Thread in ready state waiting to become active
ready_list: List<ThreadRef>,
/// List of objects created by the thread manager (such as Locks and Semaphores)
obj_addrs: ObjAddr,
/// If true, enables debug mode
debug: bool
}
impl ThreadManager {
/// Thread manager constructor
pub fn new(debug: bool) -> Self {
Self {
g_current_thread: Option::None,
g_alive: List::default(),
ready_list: List::default(),
obj_addrs: ObjAddr::init(),
debug
}
}
/// Mark a thread as aready, but not necessarily running yet.
///
/// Put it in the ready list, for later scheduling onto the CPU.
///
/// ## Pamameter
///
/// **thread** is the thread to be put on the read list
pub fn ready_to_run(&mut self, thread: ThreadRef) {
self.ready_list.push(thread);
}
/// Return the next thread to be scheduled onto the CPU.
/// If there are no ready threads, return Option::None
///
/// Thread is removed from the ready list.
///
/// **return** Thread thread to be scheduled
pub fn find_next_to_run(&mut self) -> Option<ThreadRef> {
self.ready_list.pop()
}
/// Dispatch the CPU to next_thread. Save the state of the old thread
/// and load the state of the new thread.
///
/// We assume the state of the previously running thread has already been changed from running to blocked or ready.
///
/// Global variable g_current_thread become next_thread
///
/// ## Parameter
///
/// **next_thread** thread to dispatch to the CPU
pub fn switch_to(&mut self, machine: &mut Machine, next_thread: ThreadRef) {
if let Some(old_thread) = self.get_g_current_thread() {
let old_thread = old_thread.clone();
self.thread_save_processor_state(machine, old_thread.clone());
// old_thread.save_simulator_state();
if old_thread != next_thread {
self.debug(format!("switching from \"{}\" to \"{}\"", old_thread.borrow().get_name(), next_thread.borrow().get_name()));
self.thread_restore_processor_state(machine, Rc::clone(&next_thread));
// next_thread.restore_simulator_state();
debug_assert!(!self.ready_list.contains(&next_thread));
self.set_g_current_thread(Some(next_thread));
}
} else {
self.thread_restore_processor_state(machine, Rc::clone(&next_thread));
// next_thread.restore_simulator_state();
self.set_g_current_thread(Some(next_thread));
}
}
/// Start a thread, attaching it to a process
pub fn start_thread(&mut self, thread: ThreadRef, owner: Rc<RefCell<Process>>, func_pc: u64, sp_loc: u64, argument: i64) {
self.debug(format!("starting thread \"{}\"", thread.borrow().get_name()));
let mut thread_m = thread.borrow_mut();
assert_eq!(thread_m.process, Option::None);
thread_m.process = Option::Some(Rc::clone(&owner));
let ptr = sp_loc; // todo addrspace
thread_m.init_thread_context(func_pc, ptr, argument);
owner.borrow_mut().num_thread += 1;
self.get_g_alive().push(Rc::clone(&thread));
self.ready_to_run(Rc::clone(&thread));
}
/// Wait for another thread to finish its execution
pub fn thread_join(&mut self, machine: &mut Machine, waiter: ThreadRef, waiting_for: ThreadRef) {
let waiting_for = Rc::clone(&waiting_for);
if self.get_g_alive().contains(&waiting_for) {
waiting_for.borrow_mut().join_thread.push(Rc::clone(&waiter));
self.thread_yield(machine, Rc::clone(&waiter), false);
}
}
/// Relinquish the CPU if any other thread is runnable.
///
/// Cannot use yield as a function name -> reserved name in rust
///
/// ## Parameters
///
/// **is_ready** true if **thread** should be readded to ready_to_run list, false otherwise. Typically false when joining per example
pub fn thread_yield(&mut self, machine: &mut Machine, thread: ThreadRef, is_ready: bool) {
let old_status = machine.interrupt.set_status(crate::simulator::interrupt::InterruptStatus::InterruptOff);
self.debug(format!("Yeilding thread: \"{}\"", thread.borrow().get_name()));
debug_assert_eq!(&Option::Some(Rc::clone(&thread)), self.get_g_current_thread());
let next_thread = self.find_next_to_run();
if let Some(next_thread) = next_thread {
if is_ready {
self.ready_to_run(thread);
}
self.switch_to(machine, next_thread);
}
machine.interrupt.set_status(old_status);
}
/// Put the thread to sleep and relinquish the processor
pub fn thread_sleep(&mut self, machine: &mut Machine, thread: ThreadRef) {
debug_assert_eq!(Option::Some(Rc::clone(&thread)), self.g_current_thread);
debug_assert_eq!(machine.interrupt.get_status(), InterruptStatus::InterruptOff);
self.debug(format!("Sleeping thread {}", thread.borrow().get_name()));
let mut next_thread = self.find_next_to_run();
while next_thread.is_none() {
eprintln!("Nobody to run => idle");
machine.interrupt.idle();
next_thread = self.find_next_to_run();
}
self.switch_to(machine, Rc::clone(&next_thread.unwrap()));
}
/// Finish the execution of the thread and prepare its deallocation
pub fn thread_finish(&mut self, machine: &mut Machine, thread: ThreadRef) {
let old_status = machine.interrupt.set_status(InterruptStatus::InterruptOff);
assert!(self.g_alive.remove(Rc::clone(&thread)));
self.debug(format!("Finishing thread {}", thread.borrow().get_name()));
// g_objets_addrs->removeObject(self.thread) // a ajouté plus tard
for (_, el) in thread.borrow().join_thread.iter().enumerate() {
self.ready_to_run(Rc::clone(&el));
}
self.thread_sleep(machine, Rc::clone(&thread));
machine.interrupt.set_status(old_status);
}
/// Save the CPU state of a user program on a context switch.
pub fn thread_save_processor_state(&mut self, machine: &mut Machine, thread: ThreadRef) {
let mut t = thread.borrow_mut();
for i in 0..NUM_INT_REGS {
t.thread_context.int_registers[i] = machine.read_int_register(i);
}
for i in 0..NUM_FP_REGS {
t.thread_context.float_registers[i] = machine.read_fp_register(i);
}
t.thread_context.pc = machine.pc;
}
/// Restore the CPU state of a user program on a context switch.
pub fn thread_restore_processor_state(&self, machine: &mut Machine, thread: ThreadRef) {
let t: Ref<_> = thread.borrow();
for i in 0..NUM_INT_REGS {
machine.write_int_register(i, t.thread_context.int_registers[i]);
}
machine.pc = t.thread_context.pc;
}
/// Decrement the value, and wait if it becomes < 0. Checking the
/// value and decrementing must be done atomically, so we
/// need to disable interrupts before checking the value.
///
/// Note that thread_manager::thread_sleep assumes that interrupts are disabled
/// when it is called.
///
/// ### Parameters
/// - *id_sema* id of the semaphore, stored in [`ObjAddr`], id given by user program thought exceptions
/// - *machine* Current state of the machine
pub fn sem_p(&mut self, id_sema: i32, machine: &mut Machine) -> Result<MachineOk, MachineError> {
let old_status = machine.interrupt.set_status(InterruptStatus::InterruptOff);
let thread = match self.get_g_current_thread() {
Some(thread) => Rc::clone(thread),
None => Err("sem_p error: current thread should not be None")?
};
let sema = match self.get_obj_addrs().search_semaphore(id_sema) {
Some(sema) => sema,
None => Err("sem_p error: cannot find semaphore")?
};
sema.counter -= 1;
if sema.counter < 0 {
sema.waiting_queue.push(thread.clone());
self.thread_sleep(machine, thread);
}
machine.interrupt.set_status(old_status);
Ok(MachineOk::Ok)
}
/// Increment semaphore value, waking up a waiting thread if any.
/// As with P(), this operation must be atomic, so we need to disable
/// interrupts.
///
/// scheduler::ready_to_run() assumes that interrupts
/// are disabled when it is called.
///
/// ### Parameters
/// - *id_sema* id of the semaphore, stored in [`ObjAddr`], id given by user program thought exceptions
/// - **machine** the machine where the threads are executed
pub fn sem_v(&mut self, id_sema: i32, machine: &mut Machine) -> Result<MachineOk, MachineError> {
let sema = match self.get_obj_addrs().search_semaphore(id_sema) {
Some(sema) => sema,
None => Err("sem_v error: cannot find semaphore")?
};
let old_status = machine.interrupt.set_status(InterruptStatus::InterruptOff);
sema.counter += 1;
if let Some(thread) = sema.waiting_queue.pop() {
self.ready_to_run(thread)
}
machine.interrupt.set_status(old_status);
Ok(MachineOk::Ok)
}
/// Wait until the lock become free. Checking the
/// state of the lock (free or busy) and modify it must be done
/// atomically, so we need to disable interrupts before checking
/// the value of free.
///
/// Note that thread_manager::thread_seep assumes that interrupts are disabled
/// when it is called.
///
/// ### Parameters
/// - **id** id of the lock, stored in [`ObjAddr`], id given by user program thought exceptions
/// - **machine** the machine where the threads are executed
pub fn lock_acquire(&mut self, id: i32, machine: &mut Machine) -> Result<MachineOk, MachineError> {
let current_thread = match self.get_g_current_thread() {
Some(thread) => Rc::clone(thread),
None => Err("lock_acquire error: current_thread should not be None.")?
};
let old_status = machine.interrupt.set_status(InterruptStatus::InterruptOff);
if let Some(lock) = self.get_obj_addrs().search_lock(id) {
if lock.free {
lock.free = false;
lock.owner = Some(current_thread)
} else {
lock.waiting_queue.push(current_thread.clone());
self.thread_sleep(machine, current_thread);
}
} else {
Err("lock_acquire error: cannot find Lock.")?
}
machine.interrupt.set_status(old_status);
Ok(MachineOk::Ok)
}
/// Wake up a waiter if necessary, or release it if no thread is waiting.
pub fn lock_release(&mut self, id: i32, machine: &mut Machine) -> Result<MachineOk, MachineError> {
let old_status = machine.interrupt.set_status(InterruptStatus::InterruptOff);
let current_thread = match self.get_g_current_thread() {
Some(thread) => Rc::clone(thread),
None => Err(String::from("lock_release error: current_thread should not be None."))?
};
let mut lock = match self.get_obj_addrs().search_lock(id) {
Some(lock) => lock,
None => Err(String::from("lock_release error: cannot find lock."))?
};
if let Some(lock_owner) = &lock.owner {
if current_thread.eq(lock_owner) { // is_held_by_current_thread
match lock.waiting_queue.pop() {
Some(th) => {
lock.owner = Some(Rc::clone(&th));
self.ready_to_run(Rc::clone(&th));
},
None => {
lock.free = true;
lock.owner = None;
}
}
}
};
// self.get_obj_addrs().update_lock(id, lock);
machine.interrupt.set_status(old_status);
Ok(MachineOk::Ok)
}
/// Currently running thread
pub fn get_g_current_thread(&mut self) -> &Option<ThreadRef> {
&self.g_current_thread
}
/// List of alive threads
pub fn get_g_alive(&mut self) -> &mut List<ThreadRef> {
&mut self.g_alive
}
/// Set currently running thread
pub fn set_g_current_thread(&mut self, thread: Option<ThreadRef>) {
self.g_current_thread = thread
}
/// Returns a mutable reference to the ObjAddr field of this thread_manager
pub fn get_obj_addrs(&mut self) -> &mut ObjAddr {
&mut self.obj_addrs
}
/// Prints debug messages if self.debug is set to true.
fn debug(&self, message: String) {
if self.debug {
println!("{}", message);
}
}
}
#[cfg(test)]
mod test {
use std::{rc::Rc, cell::RefCell};
use crate::{simulator::{machine::Machine, loader}, kernel::{system::System, thread::Thread, process::Process, thread_manager::ThreadManager, synch::Semaphore}, utility::cfg::get_debug_configuration};
use crate::kernel::synch::Lock;
#[test]
fn test_thread_context() {
let mut machine = Machine::new(true, get_debug_configuration());
let (loader, ptr) = loader::Loader::new("./target/guac/halt.guac", &mut machine, 0).expect("IO Error");
let start_pc = loader.elf_header.entrypoint;
let system = &mut System::new(true);
let thread1 = Thread::new("th1");
let thread1 = Rc::new(RefCell::new(thread1));
system.get_thread_manager().get_g_alive().push(Rc::clone(&thread1));
let owner1 = Process { num_thread: 0 };
let owner1 = Rc::new(RefCell::new(owner1));
system.get_thread_manager().start_thread(Rc::clone(&thread1), owner1, loader.elf_header.entrypoint, ptr + machine.page_size, -1);
debug_assert_eq!(thread1.borrow_mut().thread_context.pc, start_pc);
debug_assert!(system.get_thread_manager().get_g_alive().contains(&Rc::clone(&thread1)));
let to_run = system.get_thread_manager().find_next_to_run().unwrap();
debug_assert_eq!(to_run, Rc::clone(&thread1));
system.get_thread_manager().switch_to(&mut machine, Rc::clone(&to_run));
debug_assert_eq!(system.get_thread_manager().g_current_thread, Option::Some(Rc::clone(&thread1)));
debug_assert_eq!(machine.pc, loader.elf_header.entrypoint);
machine.run(system);
}
#[test]
fn test_lock_single(){
let mut machine = Machine::new(true, get_debug_configuration());
let mut thread_manager = ThreadManager::new(true);
let lock = Lock::new();
let lock_id = thread_manager.get_obj_addrs().add_lock(lock);
let thread = Rc::new(RefCell::new(Thread::new("test_lock")));
let thread_test = thread.clone();
thread_manager.ready_to_run(Rc::clone(&thread));
thread_manager.set_g_current_thread(Some(thread));
thread_manager.lock_acquire(lock_id, &mut machine).expect("lock acquire return an error: ");
{
let lock = thread_manager.get_obj_addrs().search_lock(lock_id).unwrap();
assert_eq!(lock.owner,Some(thread_test));
assert!(!lock.free);
assert!(lock.waiting_queue.is_empty());
}
thread_manager.lock_release(lock_id, &mut machine).expect("lock release return an error: ");
{
let lock = thread_manager.get_obj_addrs().search_lock(lock_id).unwrap();
assert_eq!(lock.owner, None);
assert!(lock.free);
assert!(lock.waiting_queue.is_empty());
}
}
#[test]
fn test_lock_multiple() {
let mut machine = Machine::new(true, get_debug_configuration());
let mut thread_manager = ThreadManager::new(true);
let lock = Lock::new();
let lock_id = thread_manager.get_obj_addrs().add_lock(lock);
let thread_1 = Rc::new(RefCell::new(Thread::new("test_lock_1")));
let thread_2 = Rc::new(RefCell::new(Thread::new("test_lock_2")));
thread_manager.ready_to_run(thread_1.clone());
thread_manager.ready_to_run(thread_2.clone());
thread_manager.set_g_current_thread(Some(thread_1.clone()));
thread_manager.lock_acquire(lock_id, &mut machine).expect("lock acquire return an error at first iteration: ");
{
let lock = thread_manager.get_obj_addrs().search_lock(lock_id).unwrap();
assert_eq!(lock.owner,Some(thread_1.clone()));
assert!(!lock.free);
assert!(lock.waiting_queue.is_empty());
}
thread_manager.set_g_current_thread(Some(thread_2.clone()));
thread_manager.lock_acquire(lock_id, &mut machine).expect("lock acquire return an error at second iteration: ");
{
let lock = thread_manager.get_obj_addrs().search_lock(lock_id).unwrap();
assert_eq!(lock.owner,Some(thread_1.clone()));
assert!(!lock.free);
assert_eq!(lock.waiting_queue.iter().count(),1);
}
thread_manager.lock_release(lock_id, &mut machine).expect("lock release return an error at first iteration: ");
{
let lock = thread_manager.get_obj_addrs().search_lock(lock_id).unwrap();
assert_eq!(lock.owner, Some(thread_2.clone()));
assert!(!lock.free);
assert!(lock.waiting_queue.is_empty());
}
thread_manager.set_g_current_thread(Some(thread_2.clone()));
thread_manager.lock_release(lock_id, &mut machine).expect("lock release return an error at second iteration: ");
{
let lock = thread_manager.get_obj_addrs().search_lock(lock_id).unwrap();
assert!(lock.waiting_queue.is_empty());
assert_eq!(lock.owner, None);
assert!(lock.free);
}
}
#[test]
fn test_semaphore_single() {
// Init
let mut machine = Machine::new(true, get_debug_configuration());
let mut thread_manager = ThreadManager::new(true);
let semaphore = Semaphore::new(1);
let sema_id = thread_manager.get_obj_addrs().add_semaphore(semaphore);
let thread = Rc::new(RefCell::new(Thread::new("test_semaphore")));
thread_manager.ready_to_run(Rc::clone(&thread));
thread_manager.set_g_current_thread(Some(thread));
// P
thread_manager.sem_p(sema_id, &mut machine).expect("semaphore P return an error: ");
{
let semaphore = thread_manager.get_obj_addrs().search_semaphore(sema_id).unwrap();
assert_eq!(semaphore.counter, 0);
assert!(semaphore.waiting_queue.is_empty());
}
// V
thread_manager.sem_v(sema_id, &mut machine).expect("semaphore V return an error: ");
{
let semaphore = thread_manager.get_obj_addrs().search_semaphore(sema_id).unwrap();
assert_eq!(semaphore.counter, 1);
assert!(semaphore.waiting_queue.is_empty());
}
}
#[test]
fn test_semaphore_multiple() {
// Init
let mut tm = ThreadManager::new(true);
let mut machine = Machine::new(true, get_debug_configuration());
let semaphore = Semaphore::new(2);
let sema_id = tm.get_obj_addrs().add_semaphore(semaphore);
let thread1 = Rc::new(RefCell::new(Thread::new("test_semaphore_1")));
let thread2 = Rc::new(RefCell::new(Thread::new("test_semaphore_2")));
let thread3 = Rc::new(RefCell::new(Thread::new("test_semaphore_3")));
// let mut borrow_tm = tm.borrow_mut();
// let scheduler = &mut tm.g_scheduler;
tm.ready_to_run(Rc::clone(&thread1));
tm.ready_to_run(Rc::clone(&thread2));
tm.ready_to_run(Rc::clone(&thread3));
// P
tm.set_g_current_thread(Some(Rc::clone(&thread1)));
tm.sem_p(sema_id, &mut machine).expect("semaphore P return an error: ");
{
let semaphore = tm.get_obj_addrs().search_semaphore(sema_id).unwrap();
assert_eq!(semaphore.counter, 1);
assert!(semaphore.waiting_queue.is_empty());
}
tm.set_g_current_thread(Some(Rc::clone(&thread2)));
tm.sem_p(sema_id, &mut machine).expect("semaphore P return an error: ");
{
let semaphore = tm.get_obj_addrs().search_semaphore(sema_id).unwrap();
assert_eq!(semaphore.counter, 0);
assert!(semaphore.waiting_queue.is_empty());
}
tm.set_g_current_thread(Some(Rc::clone(&thread3)));
tm.sem_p( sema_id, &mut machine).expect("semaphore P return an error: ");
{
let semaphore = tm.get_obj_addrs().search_semaphore(sema_id).unwrap();
assert_eq!(semaphore.counter, -1);
assert!(semaphore.waiting_queue.iter().count() == 1);
}
// V
tm.sem_v(sema_id, &mut machine).expect("semaphore V return an error: ");
{
let semaphore = tm.get_obj_addrs().search_semaphore(sema_id).unwrap();
assert_eq!(semaphore.counter, 0);
assert!(semaphore.waiting_queue.is_empty());
}
tm.sem_v(sema_id, &mut machine).expect("semaphore V return an error: ");
{
let semaphore = tm.get_obj_addrs().search_semaphore(sema_id).unwrap();
assert_eq!(semaphore.counter, 1);
assert!(semaphore.waiting_queue.is_empty());
}
tm.sem_v(sema_id, &mut machine).expect("semaphore V return an error: ");
{
let semaphore = tm.get_obj_addrs().search_semaphore(sema_id).unwrap();
assert_eq!(semaphore.counter, 2);
assert!(semaphore.waiting_queue.is_empty());
}
}
}

View File

@ -1,14 +1,64 @@
mod simulator;
use simulator::machine::Machine;
use simulator::mem_cmp;
#![warn(missing_docs)]
#![warn(clippy::missing_docs_in_private_items)]
//! Crate burritos ((BurritOS Using Rust Really Improves The Operating System)
//!
//! Burritos is an educational operating system written in Rust
//! running on RISC-V emulator.
/// Contain hardware simulated part of the machine
mod simulator;
mod kernel;
/// module containing useful tools which can be use in most part of the OS to ease the development of the OS
pub mod utility;
use std::{rc::Rc, cell::RefCell};
use kernel::{system::System, thread::Thread, process::Process};
use simulator::{machine::Machine, loader};
use clap::Parser;
use utility::cfg::read_settings;
#[derive(Parser, Debug)]
#[command(name = "BurritOS", author, version, about = "Burritos (BurritOS Using Rust Really Improves The Operating System)
Burritos is an educational operating system written in Rust
running on RISC-V emulator.", long_about = None)]
/// Launch argument parser
struct Args {
/// Enable debug mode.
/// 0 to disable debug,
/// 1 to enable machine debug,
/// 2 to enable system debug,
/// 3 to enable all debug
#[arg(short, long, value_parser = clap::value_parser!(u8).range(0..=3), default_value_t = 0)]
debug: u8,
/// Path to the executable binary file to execute
#[arg(short = 'x', long, value_name = "PATH")]
executable: String
}
fn main() {
let mut m = Machine::_init_machine();
let path = "memoryComp.txt".to_string();
let checker = mem_cmp::MemChecker::from(&path);
mem_cmp::MemChecker::fill_memory_from_mem_checker(&checker, &mut m);
//mem_cmp::Mem_Checker::print_Mem_Checker(&checker);
//Machine::print_memory(&mut m, 0x400000, 0x405000);
Machine::run(&mut m);
let args = Args::parse();
let mut machine = Machine::new(args.debug & 1 != 0, read_settings().unwrap());
let (loader, ptr) = loader::Loader::new(args.executable.as_str(), &mut machine, 0).expect("An error occured while parsing the program");
let mut system = System::new(args.debug & 2 != 0);
let thread_exec = Thread::new(args.executable.as_str());
let thread_exec = Rc::new(RefCell::new(thread_exec));
system.get_thread_manager().get_g_alive().push(Rc::clone(&thread_exec));
let owner1 = Process { num_thread: 0 };
let owner1 = Rc::new(RefCell::new(owner1));
system.get_thread_manager().start_thread(Rc::clone(&thread_exec), owner1, loader.elf_header.entrypoint, ptr + machine.page_size, -1);
let to_run = system.get_thread_manager().find_next_to_run().unwrap();
system.get_thread_manager().switch_to(&mut machine, Rc::clone(&to_run));
machine.run(&mut system);
}

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@ -1,95 +0,0 @@
use core::num::Wrapping; // Permet d'autoriser les overflow pour les opérations voulues
#[allow(non_snake_case)] // supprimer le warning snake case (quand les noms de variables ont des majuscules)
#[derive(Debug)]
pub struct Instruction {
pub value : u64,
pub opcode : u8,
pub rs1 : u8,
pub rs2 : u8,
pub rs3 : u8,
pub rd : u8,
pub funct7 : u8,
pub funct7_smaller : u8,
pub funct3 : u8,
pub shamt : u8, // shamt = imm[5:0] or imm[4:0] (depend of opcode)
pub imm12_I : u16,
pub imm12_S : u16,
pub imm12_I_signed : i16,
pub imm12_S_signed : i16,
pub imm13 : i16,
pub imm13_signed : i16,
pub imm31_12 : u32,
pub imm21_1 : u32,
pub imm31_12_signed : i32,
pub imm21_1_signed : i32,
}
#[allow(non_snake_case)]
pub fn decode(val : u64) -> Instruction {
let value = val;
let opcode = (val & 0x7f) as u8;
let rs1 = ((val >> 15) & 0x1f) as u8;
let rs2 = ((val >> 20) & 0x1f) as u8;
let rs3 = ((val >> 27) & 0x1f) as u8;
let rd = ((val >> 7) & 0x1f) as u8;
let funct7 = ((val >> 25) & 0x7f) as u8;
let funct7_smaller = funct7 & 0x3e;
let funct3 = ((val >> 12) & 0x7) as u8;
let imm12_I = ((val >> 20) & 0xfff) as u16;
let imm12_S = (((val >> 20) & 0xfe0) + ((val >> 7) & 0x1f)) as u16;
let imm12_I_signed = if imm12_I >= 2048 { (Wrapping(imm12_I) - Wrapping(4096)).0 } else { imm12_I } as i16;
let imm12_S_signed = if imm12_S >= 2048 { (Wrapping(imm12_S) - Wrapping(4096)).0 } else { imm12_S } as i16;
let imm13 = (((val >> 19) & 0x1000) + ((val >> 20) & 0x7e0) +
((val >> 7) & 0x1e) + ((val << 4) & 0x800)) as i16;
let imm13_signed = if imm13 >= 4096 { imm13 - 8192 } else { imm13 };
let imm31_12 = (val & 0xfffff000) as u32;
let imm31_12_signed = imm31_12 as i32;
let imm21_1 = ((val & 0xff000) + ((val >> 9) & 0x800) +
((val >> 20) & 0x7fe) + ((val >> 11) & 0x100000)) as u32;
let imm21_1_signed = if imm21_1 >= 1048576 { (Wrapping(imm21_1) - Wrapping(2097152)).0 } else { imm21_1 } as i32;
let shamt = ((val >> 20) & 0x3f) as u8;
Instruction {
value,
opcode,
rs1,
rs2,
rs3,
rd,
funct7,
funct7_smaller,
funct3,
imm12_I,
imm12_S,
imm12_I_signed,
imm12_S_signed,
imm13,
imm13_signed,
imm31_12,
imm31_12_signed,
imm21_1,
imm21_1_signed,
shamt
}
}

60
src/simulator/error.rs Normal file
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@ -0,0 +1,60 @@
//! # Error
//!
//! This module contains the definition of the MachineError struct,
//! for error management in the Machine module.
//!
//! Basic usage:
//!
//! ```
//! fn example(x: bool) -> Result<(), MachineError> {
//! match x {
//! true => Ok(()),
//! _ => Err(MachineError::new("Machine failed because of ..."));
//! }
//! }
//! ```
use std::fmt;
/// Machine Error
/// This error serves as a specific exception handler for the Machine struct
#[derive(Debug, Clone)]
pub struct MachineError {
/// The error message
message: String
}
pub enum MachineOk {
Ok,
Shutdown
}
/// This impl allows this MachineError to be formatted into an empty format.
///
/// ```
/// // Result of printing a MachineError
/// let m = MachineError::new("Lorem Ipsum");
/// println!("Example: {}", m);
/// ```
///
/// Console output:Error}
/// ```
/// example Lorem Ipsum
/// ```
impl fmt::Display for MachineError {
fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
write!(f, "Machine error: {}", &self.message)
}
}
impl From<&str> for MachineError {
fn from(value: &str) -> Self {
MachineError { message: value.to_string() }
}
}
impl From<String> for MachineError {
fn from(value: String) -> Self {
MachineError { message: value }
}
}

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@ -0,0 +1,532 @@
//! # Instruction
//!
//! This module describes the internal representation of a RISC-V Instruction,
//! its constructor from raw data, and a debug print method.
#![allow(clippy::missing_docs_in_private_items, non_snake_case)]
use core::num::Wrapping; // Permet d'autoriser les overflow pour les opérations voulues
use super::global::*;
/// OP instruction name mapping
const NAMES_OP: [&str; 8] = ["add", "sll", "slt", "sltu", "xor", "sr", "or", "and"];
/// OPI instruction name mapping
const NAMES_OPI: [&str; 8] = ["addi", "slli", "slti", "sltiu", "xori", "slri", "ori", "andi"];
/// OPW instruction name mapping
const NAMES_OPW: [&str; 8] = ["addw", "sllw", "", "", "", "srw", "", ""];
/// OPIW instruction name mapping
const NAMES_OPIW: [&str; 8] = ["addiw", "slliw", "", "", "", "sri", "", ""];
/// MUL instruction name mapping
const NAMES_MUL: [&str; 8] = ["mul", "mulh", "mulhsu", "mulhu", "div", "divu", "rem", "remu"];
/// BR instruction name mapping
const NAMES_BR: [&str; 8] = ["beq", "bne", "", "", "blt", "bge", "bltu", "bgeu"];
/// ST instruction name mapping
const NAMES_ST: [&str; 4] = ["sb", "sh", "sw", "sd"];
/// LD instruction name mapping
const NAMES_LD: [&str; 7] = ["lb", "lh", "lw", "ld", "lbu", "lhu", "lwu"];
/// Integer register name mapping
pub const REG_X: [&str; 32] = ["zero", "ra", "sp", "gp", "tp", "t0", "t1", "t2", "s0", "s1",
"a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7",
"s2", "s3", "s4", "s5", "s6", "s7", "s8", "s9", "s10", "s11",
"t3", "t4", "t5", "t6"];
/// Floating-point register name mapping
const REG_F: [&str; 32] = ["ft0", "ft1", "ft2", "ft3", "ft4", "ft5", "ft6", "ft7", "fs0", "fs1",
"fa0", "fa1", "fa2", "fa3", "fa4", "fa5", "fa6", "fa7",
"fs2", "fs3", "fs4", "fs5", "fs6", "fs7", "fs8", "fs9", "fs10", "fs11",
"ft8", "ft9", "ft10", "ft11"];
/// RISC-V Instruction
#[derive(Debug)]
pub struct Instruction {
/// Original value used to construct self
pub value : u64,
pub opcode : u8,
pub rs1 : u8,
pub rs2 : u8,
pub rs3 : u8,
pub rd : u8,
pub funct7 : u8,
pub funct7_smaller : u8,
pub funct3 : u8,
pub shamt : u8, // shamt = imm[5:0] or imm[4:0] (depend of opcode)
pub imm12_I : u16,
pub imm12_S : u16,
pub imm12_I_signed : i16,
pub imm12_S_signed : i16,
pub imm13 : i16,
pub imm13_signed : i16,
pub imm31_12 : u32,
pub imm21_1 : u32,
pub imm31_12_signed : i32,
pub imm21_1_signed : i32,
}
impl Instruction {
/// Construct a new instruction from a big endian raw binary instruction
pub fn new(value : u64) -> Self {
let opcode = (value & 0x7f) as u8;
let rs1 = ((value >> 15) & 0x1f) as u8;
let rs2 = ((value >> 20) & 0x1f) as u8;
let rs3 = ((value >> 27) & 0x1f) as u8;
let rd = ((value >> 7) & 0x1f) as u8;
let funct7 = ((value >> 25) & 0x7f) as u8;
let funct7_smaller = funct7 & 0x3e;
let funct3 = ((value >> 12) & 0x7) as u8;
let imm12_I = ((value >> 20) & 0xfff) as u16;
let imm12_S = (((value >> 20) & 0xfe0) + ((value >> 7) & 0x1f)) as u16;
let imm12_I_signed = if imm12_I >= 2048 { (Wrapping(imm12_I) - Wrapping(4096)).0 } else { imm12_I } as i16;
let imm12_S_signed = if imm12_S >= 2048 { (Wrapping(imm12_S) - Wrapping(4096)).0 } else { imm12_S } as i16;
let imm13 = (((value >> 19) & 0x1000) + ((value >> 20) & 0x7e0) +
((value >> 7) & 0x1e) + ((value << 4) & 0x800)) as i16;
let imm13_signed = if imm13 >= 4096 { imm13 - 8192 } else { imm13 };
let imm31_12 = (value & 0xfffff000) as u32;
let imm31_12_signed = imm31_12 as i32;
let imm21_1 = ((value & 0xff000) + ((value >> 9) & 0x800) +
((value >> 20) & 0x7fe) + ((value >> 11) & 0x100000)) as u32;
let imm21_1_signed = if imm21_1 >= 1048576 { (Wrapping(imm21_1) - Wrapping(2097152)).0 } else { imm21_1 } as i32;
let shamt = ((value >> 20) & 0x3f) as u8;
Instruction {
value,
opcode,
rs1,
rs2,
rs3,
rd,
funct7,
funct7_smaller,
funct3,
imm12_I,
imm12_S,
imm12_I_signed,
imm12_S_signed,
imm13,
imm13_signed,
imm31_12,
imm31_12_signed,
imm21_1,
imm21_1_signed,
shamt
}
}
}
/// Converts an Instruction to a prettified debug String
///
/// ### Usage
///
/// ```
/// let m = Machine::new();
/// let i = Instruction::new(inst);
/// println!("{}", instruction_debug(i, m.pc));
/// ```
pub fn instruction_debug(ins: &Instruction, pc: i32) -> String {
let rd = ins.rd as usize;
let rs1 = ins.rs1 as usize;
let rs2 = ins.rs2 as usize;
let rs3 = ins.rs3 as usize;
match ins.opcode {
RISCV_OP => {
let name: &str;
if ins.funct7 == 1 { // Use mul array
name = NAMES_MUL[ins.funct3 as usize]
} else if ins.funct3 == RISCV_OP_ADD {
// Add or Sub
if ins.funct7 == RISCV_OP_ADD_ADD {
name = "add";
} else {
name = "sub";
}
} else if ins.funct3 == RISCV_OP_SR {
// Srl or Sra
if ins.funct7 == RISCV_OP_SR_SRL {
name = "srl";
} else {
name = "sra";
}
} else {
name = NAMES_OP[ins.funct3 as usize];
}
format!("{}\t{},{},{}", name, REG_X[rd], REG_X[rs1], REG_X[rs2])
},
RISCV_OPI => {
// SHAMT OR IMM
if ins.funct3 == RISCV_OPI_SRI {
if ins.funct7 == RISCV_OPI_SRI_SRLI {
format!("srli\t{},{},{}", REG_X[rd], REG_X[rs1], ins.shamt)
} else {
format!("srai\t{},{},{}", REG_X[rd], REG_X[rs1], ins.shamt)
}
} else if ins.funct3 == RISCV_OPI_SLLI {
format!("{}\t{},{},{}", NAMES_OPI[ins.funct3 as usize], REG_X[rd], REG_X[rs1], ins.shamt)
} else {
format!("{}\t{},{},{}", NAMES_OPI[ins.funct3 as usize], REG_X[rd], REG_X[rs1], ins.imm12_I_signed)
}
},
RISCV_LUI => {
format!("lui\t{},{:x}", REG_X[rd], ins.imm31_12)
},
RISCV_AUIPC => {
format!("auipc\t{},{:x}", REG_X[rd], ins.imm31_12)
},
RISCV_JAL => {
format!("jal\t{},{:x}", REG_X[rd], (pc + ins.imm21_1_signed))
},
RISCV_JALR => {
format!("jalr\t{},{:x}({})", REG_X[rd], ins.imm12_I_signed, REG_X[rs1])
},
RISCV_BR => {
format!("{}\t{},{},{:x}", NAMES_BR[ins.funct3 as usize], REG_X[rs1], REG_X[rs2], pc + (ins.imm13_signed as i32))
},
RISCV_LD => {
format!("{}\t{},{}({})", NAMES_LD[ins.funct3 as usize], REG_X[rd], ins.imm12_I_signed, REG_X[rs1])
},
RISCV_ST => {
format!("{}\t{},{}({})", NAMES_ST[ins.funct3 as usize], REG_X[rs2], ins.imm12_S_signed, REG_X[rs1])
},
RISCV_OPIW => {
if ins.funct3 == RISCV_OPIW_SRW {
if ins.funct7 == RISCV_OPIW_SRW_SRLIW {
format!("srliw\t{},{},{}", REG_X[rd], REG_X[rs1], REG_X[rs2])
} else {
format!("sraiw\t{},{},{}", REG_X[rd], REG_X[rs1], REG_X[rs2])
}
} else {
format!("{}\t{},{},0x{:x}", NAMES_OPIW[ins.funct3 as usize], REG_X[rd], REG_X[rs1], ins.imm12_I_signed)
}
},
RISCV_OPW => {
if ins.funct7 == 1 {
format!("{}w\t{},{},{}", NAMES_MUL[ins.funct3 as usize], REG_X[rd], REG_X[rs1], REG_X[rs2])
} else if ins.funct3 == RISCV_OP_ADD {
if ins.funct7 == RISCV_OPW_ADDSUBW_ADDW {
format!("addw\t{},{},{}", REG_X[rd], REG_X[rs1], REG_X[rs2])
} else {
format!("subw\t{},{},{}", REG_X[rd], REG_X[rs1], REG_X[rs2])
}
} else if ins.funct3 == RISCV_OPW_SRW {
if ins.funct7 == RISCV_OPW_SRW_SRLW {
format!("srlw\t{},{},{}", REG_X[rd], REG_X[rs1], REG_X[rs2])
} else {
format!("sraw\t{},{},{}", REG_X[rd], REG_X[rs1], REG_X[rs2])
}
} else {
format!("{}\t{},{},{}", NAMES_OPW[ins.funct3 as usize], REG_X[rd], REG_X[rs1], REG_X[rs2])
}
},
// RV32F Standard Extension
RISCV_FLW => {
format!("flw\t{},{},({})", REG_F[rd], ins.imm12_I_signed, REG_F[rs1])
},
RISCV_FSW => {
format!("fsw\t{},{},({})", REG_F[rs2], "OFFSET TODO", REG_F[rs1]) // TODO Offset in decode
},
RISCV_FMADD => {
format!("fmadd\t{}{}{}{}", REG_F[rd], REG_F[rs1], REG_F[rs2], REG_F[rs3])
},
RISCV_FMSUB => {
format!("fmsub\t{}{}{}{}", REG_F[rd], REG_F[rs1], REG_F[rs2], REG_F[rs3])
},
RISCV_FNMSUB => {
format!("fnmsub\t{}{}{}{}", REG_F[rd], REG_F[rs1], REG_F[rs2], REG_F[rs3])
},
RISCV_FNMADD => {
format!("fnmadd\t{}{}{}{}", REG_F[rd], REG_F[rs1], REG_F[rs2], REG_F[rs3])
},
RISCV_FP => {
match ins.funct7 {
RISCV_FP_ADD => {
format!("{}\t{}{}{}", "fadd", REG_F[rd], REG_F[rs1], REG_F[rs2])
},
RISCV_FP_SUB => {
format!("{}\t{}{}{}", "fsub.s", REG_F[rd], REG_F[rs1], REG_F[rs2])
},
RISCV_FP_MUL => {
format!("{}\t{}{}{}", "fmul.s", REG_F[rd], REG_F[rs1], REG_F[rs2])
},
RISCV_FP_DIV => {
format!("{}\t{}{}{}", "fdiv.s", REG_F[rd], REG_F[rs1], REG_F[rs2])
},
RISCV_FP_SQRT => {
format!("{}\t{}{}", "fsqrt.s", REG_F[rd], REG_F[rs1])
},
RISCV_FP_FSGN => {
match ins.funct3 {
RISCV_FP_FSGN_J => {
format!("{}\t{}{}{}", "fsgnj.s", REG_F[rd], REG_F[rs1], REG_F[rs2])
},
RISCV_FP_FSGN_JN => {
format!("{}\t{}{}{}", "fsgnn.s", REG_F[rd], REG_F[rs1], REG_F[rs2])
},
RISCV_FP_FSGN_JX => {
format!("{}\t{}{}{}", "fsgnx.s", REG_F[rd], REG_F[rs1], REG_F[rs2])
},
_ => todo!("Unknown code")
}
},
RISCV_FP_MINMAX => {
if ins.funct3 == 0 {
format!("{}\t{}{}{}", "fmin.s", REG_F[rd], REG_F[rs1], REG_F[rs2])
} else {
format!("{}\t{}{}{}", "fmax.s", REG_F[rd], REG_F[rs1], REG_F[rs2])
}
},
RISCV_FP_FCVTW => {
if rs2 == 0 {
format!("{}\t{}{}", "fcvt.w.s", REG_F[rd], REG_F[rs1])
} else {
format!("{}\t{}{}", "fcvt.wu.s", REG_F[rd], REG_F[rs1])
}
},
RISCV_FP_FMVXFCLASS => {
if ins.funct3 == 0 {
format!("{}\t{}{}", "fmv.x.w", REG_F[rd], REG_F[rs1])
} else {
format!("{}\t{}{}", "fclass.s", REG_F[rd], REG_F[rs1])
}
},
RISCV_FP_FCMP => {
if ins.funct3 == 0 {
format!("{}\t{}{}{}", "fle.s", REG_F[rd], REG_F[rs1], REG_F[rs2])
} else if ins.funct3 == 1 {
format!("{}\t{}{}{}", "flt.s", REG_F[rd], REG_F[rs1], REG_F[rs2])
} else {
format!("{}\t{}{}{}", "feq.s", REG_F[rd], REG_F[rs1], REG_F[rs2])
}
},
RISCV_FP_FCVTS => {
if rs2 == 0 {
format!("{}\t{}{}", "fcvt.s.w", REG_F[rd], REG_F[rs1])
} else {
format!("{}\t{}{}", "fcvt.s.wu", REG_F[rd], REG_F[rs1])
}
},
RISCV_FP_FMVW => {
format!("{}\t{}{}", "fmv.w.x", REG_F[rd], REG_F[rs1])
},
_ => todo!("Unknown code")
}
},
RISCV_SYSTEM => {
"ecall".to_string()
},
_ => todo!("{:x} opcode non géré pc : {:x}, value : {:x}", ins.opcode, pc, ins.value) // Change todo! to panic! in the future, I put todo! because there's a lot of opcode currently not implemented
}
}
#[cfg(test)]
mod test {
#![allow(clippy::unusual_byte_groupings)]
use crate::simulator::instruction::*;
#[test]
fn test_op() {
let sub = Instruction::new(0b0100000_10000_10001_000_11100_0110011);
let add = Instruction::new(0b0000000_10000_10001_000_11100_0110011);
let xor = Instruction::new(0b0000000_10000_10001_100_11100_0110011);
let slr = Instruction::new(0b0000000_10000_10001_101_11100_0110011);
let sra = Instruction::new(0b0100000_10000_10001_101_11100_0110011);
assert_eq!("sub\tt3,a7,a6", instruction_debug(&sub, 0));
assert_eq!("xor\tt3,a7,a6", instruction_debug(&xor, 0));
assert_eq!("srl\tt3,a7,a6", instruction_debug(&slr, 0));
assert_eq!("sra\tt3,a7,a6", instruction_debug(&sra, 0));
assert_eq!("add\tt3,a7,a6", instruction_debug(&add, 0));
}
#[test]
fn test_opi() {
let addi = Instruction::new(0b0000000000_10001_000_11100_0010011);
let slli = Instruction::new(0b0000000000_10001_001_11100_0010011);
let slti = Instruction::new(0b0000000000_10001_010_11100_0010011);
let sltiu = Instruction::new(0b0000000000_10001_011_11100_0010011);
let xori = Instruction::new(0b_0000000000010001_100_11100_0010011);
let ori = Instruction::new(0b00000000000_10001_110_11100_0010011);
let andi = Instruction::new(0b000000000000_10001_111_11100_0010011);
assert_eq!("andi\tt3,a7,0", instruction_debug(&andi, 0));
assert_eq!("addi\tt3,a7,0", instruction_debug(&addi, 0));
assert_eq!("slli\tt3,a7,0", instruction_debug(&slli, 0));
assert_eq!("slti\tt3,a7,0", instruction_debug(&slti, 0));
assert_eq!("sltiu\tt3,a7,0", instruction_debug(&sltiu, 0));
assert_eq!("xori\tt3,a7,0", instruction_debug(&xori, 0));
assert_eq!("ori\tt3,a7,0", instruction_debug(&ori, 0));
}
#[test]
fn test_lui() {
let lui = Instruction::new(0b01110001000011111000_11100_0110111);
let lui_negatif = Instruction::new(0b11110001000011111000_11100_0110111);
assert_eq!("lui\tt3,710f8000", instruction_debug(&lui, 0));
assert_eq!("lui\tt3,f10f8000", instruction_debug(&lui_negatif, 0));
}
#[test]
fn test_ld() {
// imm rs1 f3 rd opcode
let lb = Instruction::new(0b010111110000_10001_000_11100_0000011);
let lh = Instruction::new(0b010111110000_10001_001_11100_0000011);
let lw = Instruction::new(0b010111110000_10001_010_11100_0000011);
let lbu = Instruction::new(0b010111110000_10001_100_11100_0000011);
let lhu = Instruction::new(0b010111110000_10001_101_11100_0000011);
let ld = Instruction::new(0b010111110000_10001_011_11100_0000011);
let lwu = Instruction::new(0b010111110000_10001_110_11100_0000011);
assert_eq!("lb\tt3,1520(a7)", instruction_debug(&lb, 0));
assert_eq!("lh\tt3,1520(a7)", instruction_debug(&lh, 0));
assert_eq!("lw\tt3,1520(a7)", instruction_debug(&lw, 0));
assert_eq!("lbu\tt3,1520(a7)", instruction_debug(&lbu, 0));
assert_eq!("lhu\tt3,1520(a7)", instruction_debug(&lhu, 0));
assert_eq!("ld\tt3,1520(a7)", instruction_debug(&ld, 0));
assert_eq!("lwu\tt3,1520(a7)", instruction_debug(&lwu, 0));
}
#[test]
fn test_opw() {
let addw: Instruction = Instruction::new(0b0000000_10000_10001_000_11100_0111011);
let sllw: Instruction = Instruction::new(0b0000000_10000_10001_001_11100_0111011);
let srlw: Instruction = Instruction::new(0b0000000_10000_10001_101_11100_0111011);
let sraw: Instruction = Instruction::new(0b0100000_10000_10001_101_11100_0111011);
assert_eq!("addw\tt3,a7,a6", instruction_debug(&addw, 0));
assert_eq!("sllw\tt3,a7,a6", instruction_debug(&sllw, 0));
assert_eq!("srlw\tt3,a7,a6", instruction_debug(&srlw, 0));
assert_eq!("sraw\tt3,a7,a6", instruction_debug(&sraw, 0));
}
#[test]
fn test_opwi() {
let addiw: Instruction =Instruction::new(0b000000000000_10001_000_11100_0011011);
let slliw: Instruction = Instruction::new(0b0000000_10000_10001_001_11100_0011011);
let srai: Instruction = Instruction::new(0b010000010001_10001_101_11100_0010011);
assert_eq!("addiw\tt3,a7,0x0", instruction_debug(&addiw, 0));
assert_eq!("slliw\tt3,a7,0x10", instruction_debug(&slliw, 0));
assert_eq!("srai\tt3,a7,17", instruction_debug(&srai, 0));
}
#[test]
fn test_br() {
let beq: Instruction = Instruction::new(0b0000000_10000_10001_000_00000_1100011);
let bne: Instruction = Instruction::new(0b0000000_10000_10001_001_00000_1100011);
let blt: Instruction = Instruction::new(0b0000000_10000_10001_100_00000_1100011);
let bge: Instruction = Instruction::new(0b0000000_10000_10001_101_00000_1100011);
let bge2: Instruction = Instruction::new(0x00f75863);
let bltu: Instruction = Instruction::new(0b0000000_10000_10001_110_00000_1100011);
let bgeu: Instruction = Instruction::new(0b0000000_10000_10001_111_00000_1100011);
assert_eq!("blt\ta7,a6,0", instruction_debug(&blt, 0));
assert_eq!("bge\ta7,a6,0", instruction_debug(&bge, 0));
assert_eq!("bge\ta4,a5,104d4", instruction_debug(&bge2, 0x104c4));
assert_eq!("bltu\ta7,a6,0", instruction_debug(&bltu, 0));
assert_eq!("bgeu\ta7,a6,0", instruction_debug(&bgeu, 0));
assert_eq!("bne\ta7,a6,0", instruction_debug(&bne, 0));
assert_eq!("beq\ta7,a6,0", instruction_debug(&beq, 0));
}
#[test]
fn test_small_program() {
/* Code for :
int a = 0;
int b = 5;
a = b;
a = a * b;
a = a + b;
b = a - b;
*/
assert_eq!("addi sp,sp,-32", instruction_debug(&Instruction::new(0xfe010113), 0));
assert_eq!("sd s0,24(sp)", instruction_debug(&Instruction::new(0x00813c23), 0));
assert_eq!("addi s0,sp,32", instruction_debug(&Instruction::new(0x02010413), 0));
assert_eq!("sw zero,-20(s0)", instruction_debug(&Instruction::new(0xfe042623), 0));
assert_eq!("addi a5,zero,5", instruction_debug(&Instruction::new(0x00500793), 0));
assert_eq!("sw a5,-24(s0)", instruction_debug(&Instruction::new(0xfef42423), 0));
assert_eq!("lw a5,-24(s0)", instruction_debug(&Instruction::new(0xfe842783), 0));
assert_eq!("sw a5,-20(s0)", instruction_debug(&Instruction::new(0xfef42623), 0));
assert_eq!("lw a5,-20(s0)", instruction_debug(&Instruction::new(0xfec42783), 0));
assert_eq!("addi a4,a5,0", instruction_debug(&Instruction::new(0x00078713), 0));
assert_eq!("lw a5,-24(s0)", instruction_debug(&Instruction::new(0xfe842783), 0));
assert_eq!("mulw a5,a4,a5", instruction_debug(&Instruction::new(0x02f707bb), 0));
assert_eq!("sw a5,-20(s0)", instruction_debug(&Instruction::new(0xfef42623), 0));
assert_eq!("lw a5,-20(s0)", instruction_debug(&Instruction::new(0xfec42783), 0));
assert_eq!("addi a4,a5,0", instruction_debug(&Instruction::new(0x00078713), 0));
assert_eq!("lw a5,-24(s0)", instruction_debug(&Instruction::new(0xfe842783), 0));
assert_eq!("addw a5,a4,a5", instruction_debug(&Instruction::new(0x00f707bb), 0));
assert_eq!("sw a5,-20(s0)", instruction_debug(&Instruction::new(0xfef42623), 0));
assert_eq!("lw a5,-20(s0)", instruction_debug(&Instruction::new(0xfec42783), 0));
assert_eq!("addi a4,a5,0", instruction_debug(&Instruction::new(0x00078713), 0));
assert_eq!("lw a5,-24(s0)", instruction_debug(&Instruction::new(0xfe842783), 0));
assert_eq!("subw a5,a4,a5", instruction_debug(&Instruction::new(0x40f707bb), 0));
assert_eq!("sw a5,-24(s0)", instruction_debug(&Instruction::new(0xfef42423), 0));
assert_eq!("addi a5,zero,0", instruction_debug(&Instruction::new(0x00000793), 0));
assert_eq!("addi a0,a5,0", instruction_debug(&Instruction::new(0x00078513), 0));
assert_eq!("ld s0,24(sp)", instruction_debug(&Instruction::new(0x01813403), 0));
assert_eq!("addi sp,sp,32", instruction_debug(&Instruction::new(0x02010113), 0));
assert_eq!("jalr zero,0(ra)", instruction_debug(&Instruction::new(0x00008067), 0));
}
#[test]
fn test_fibo() {
assert_eq!("jal zero,10504", instruction_debug(&Instruction::new(0x0500006f), 0x104b4));
assert_eq!("blt a4,a5,104b8", instruction_debug(&Instruction::new(0xfaf740e3), 0x10518));
}
#[test]
fn test_mul_prog() {
assert_eq!("addi sp,sp,-32", instruction_debug(&Instruction::new(0xfe010113), 0));
assert_eq!("sd s0,24(sp)", instruction_debug(&Instruction::new(0x00813c23), 0));
assert_eq!("addi s0,sp,32", instruction_debug(&Instruction::new(0x02010413), 0));
assert_eq!("addi a5,zero,5", instruction_debug(&Instruction::new(0x00500793), 0));
assert_eq!("sw a5,-20(s0)", instruction_debug(&Instruction::new(0xfef42623), 0));
assert_eq!("lw a5,-20(s0)", instruction_debug(&Instruction::new(0xfec42783), 0));
assert_eq!("addi a4,a5,0", instruction_debug(&Instruction::new(0x00078713), 0));
assert_eq!("addi a5,a4,0", instruction_debug(&Instruction::new(0x00070793), 0));
assert_eq!("slliw a5,a5,0x2", instruction_debug(&Instruction::new(0x0027979b), 0));
assert_eq!("addw a5,a5,a4", instruction_debug(&Instruction::new(0x00e787bb), 0));
assert_eq!("sw a5,-24(s0)", instruction_debug(&Instruction::new(0xfef42423), 0));
assert_eq!("lw a5,-20(s0)", instruction_debug(&Instruction::new(0xfec42783), 0));
assert_eq!("addi a4,a5,0", instruction_debug(&Instruction::new(0x00078713), 0));
assert_eq!("lw a5,-24(s0)", instruction_debug(&Instruction::new(0xfe842783), 0));
assert_eq!("mulw a5,a4,a5", instruction_debug(&Instruction::new(0x02f707bb), 0));
assert_eq!("sw a5,-28(s0)", instruction_debug(&Instruction::new(0xfef42223), 0));
assert_eq!("lw a5,-28(s0)", instruction_debug(&Instruction::new(0xfe442783), 0));
assert_eq!("addi a4,a5,0", instruction_debug(&Instruction::new(0x00078713), 0));
assert_eq!("lw a5,-24(s0)", instruction_debug(&Instruction::new(0xfe842783), 0));
assert_eq!("divw a5,a4,a5", instruction_debug(&Instruction::new(0x02f747bb), 0));
assert_eq!("sw a5,-20(s0)", instruction_debug(&Instruction::new(0xfef42623), 0));
assert_eq!("addi a5,zero,0", instruction_debug(&Instruction::new(0x00000793), 0));
assert_eq!("addi a0,a5,0", instruction_debug(&Instruction::new(0x00078513), 0));
assert_eq!("ld s0,24(sp)", instruction_debug(&Instruction::new(0x01813403), 0));
assert_eq!("addi sp,sp,32", instruction_debug(&Instruction::new(0x02010113), 0));
assert_eq!("jalr zero,0(ra)", instruction_debug(&Instruction::new(0x00008067), 0));
}
}

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@ -0,0 +1,42 @@
#[derive(PartialEq)]
pub struct Interrupt {
level: InterruptStatus
}
impl Interrupt {
pub fn new() -> Self {
Self {
level: InterruptStatus::InterruptOff
}
}
pub fn set_status(&mut self, new_status: InterruptStatus) -> InterruptStatus {
let old = self.level;
self.level = new_status;
if new_status == InterruptStatus::InterruptOn && old == InterruptStatus::InterruptOff {
self.one_tick(1);
}
old
}
fn one_tick(&self, nb_cycle: i32) {
todo!();
}
pub fn get_status(&self) -> InterruptStatus {
self.level
}
pub fn idle(&self) {
// todo!();
}
}
#[derive(PartialEq, Clone, Copy, Debug)]
pub enum InterruptStatus {
InterruptOff,
InterruptOn
}

View File

@ -1,34 +1,627 @@
use crate::Machine;
use std::fs;
use std::io;
use std::io::BufRead;
use std::io::Read;
/// The elf header defines principes aspects of the binary files, it's place at the start of the file
/// see <https://en.wikipedia.org/wiki/Executable_and_Linkable_Format#File_header> for more informations
pub struct ElfHeader {
/// Defines whether the file is big or little endian
/// true correspond to big endian, false otherwise
///
/// Offset: 0x05, size: 1 byte
pub endianess: bool,
/// Defines whether the file is 32 bits or 64 bits
///
/// Offset: 0x04, size: 1 byte
pub is_32bits: bool,
/// Version of the elf file, current version is 1
///
/// Offset: 0x06, size: 1 byte
pub version: u8,
/// Identifies the target ABI.
///
/// In this implementation: Defines if the target abi is system V compliant
///
/// Offset: 0x07, size: 1 byte
pub sys_v_abi: bool,
/// Identifies target ISA, 0xF3 correspond to RISC-V
///
/// In this implementatio, true if target isa is RISC-V, false otherwise
///
/// Offset: 0x12, size: 2 bytes
pub is_riscv_target: bool,
/// Memory address of the entry point from w<here the process starts its execution.
/// If the program doesn't have an entrypoint (i.e. not an executable), the value is 0
///
/// Offset: 0x18, size: 4 (32 bits) or 8 (64 bits)
pub entrypoint: u64,
/// Size of the elf header, 64 bytes for 64 bits and 52 for 32 bits
///
/// Offset: 0x28(32 bits) or 0x34 (64 bits), size: 2 bytes
pub elf_header_size: u16,
/// Position of the first program header entry
///
/// Offset: 0x1C (32 bits) or 0x20 (64 bits), size: 4 (32 bits) or 8 (64 bits) bytes
pub program_header_location: u64,
/// Number of entries in the progream header table
///
/// Offset: 0x2C (32 bits) or 0x38 (64 bits), size: 2 bytes
pub program_header_entries: u16,
/// Size of a program header entry
///
/// Offset: 0x2A (32 bits) or 0x36 (64 bits), size: 2 bytes
pub program_header_size: u16,
/// Position of the first section header entry
///
/// Offset: 0x20 (32 bits) or 0x28 (64 bits), size: 4 (32 bits) or 8 (64 bits) bytes
pub section_header_location: u64,
/// Number of entries in the section header table
///
/// Offset: 0x30 (32 bits) or 0x3C (64 bits), size: 2 bytes
pub section_header_entries: u16,
/// Size of a section header entry
///
/// Offset: 0x2E (32 bits) or 0x36 (64 bits), size: 2 bytes
pub section_header_size: u16,
}
impl ElfHeader {
/// return true if the 4 first bytes constitude the elf magic number
fn is_elf(instructions: &[u8]) -> bool {
instructions.get(0..4) == Option::Some(&[0x7f, 0x45, 0x4c, 0x46])
}
/// Load a file into a new machine
///
/// `panic!` when size is not 1, 2, 4 or 8
/// `panic!` when the text does not represents instructions in hexadecimal
///
/// ### Parameters
///
/// - **path** the path of the file to load
/// - **size** the number of bytes to write (1, 2, 4 or 8)
pub fn _load(path : &str, instruction_size: i32) -> Machine {
let file = fs::File::open(path).expect("Wrong filename");
let reader = io::BufReader::new(file);
let mut machine = Machine::_init_machine();
/// return true if big endian, false otherwise
fn check_endianess(instructions: &[u8]) -> bool {
instructions.get(5) == Option::Some(&2)
}
for (i,line) in reader.lines().enumerate() {
let res = u64::from_str_radix(&line.unwrap(), 16);
match res {
Ok(value) => {
Machine::write_memory(&mut machine, instruction_size, i*instruction_size as usize, value);
},
_ => panic!()
/// return true if file is 32 bits, false if 64 bits
fn is_32bits(instructions: &[u8]) -> bool {
instructions.get(4) == Option::Some(&1)
}
/// return the version of the elf file (should be 1)
/// Can be None if the file is smaller than 7 bytes -> the file is invalid
fn get_version(instructions: &[u8]) -> Option<u8> {
instructions.get(6).copied() // work as primitives implements Copy
}
/// return true if target abi of the binary file is System V, false otherwise
fn is_system_v_elf(instructions: &[u8]) -> bool {
instructions.get(7) == Option::Some(&0)
}
/// return true if specified target instruction set architecture is RISCV
fn is_riscv_isa(instructions: &[u8]) -> bool {
Self::get_u16_value(instructions, 0x12) == Option::Some(0xf3)
}
/// memory address of the entry point from where the process starts its execution
///
/// ## Paramters:
///
/// **instructions** List of bytes of the loaded binary file
/// **is_32bits** defines whether the binary file is 32 bits or 64 bits
fn get_entrypoint(instructions: &[u8], is_32bits: bool) -> Option<u64> {
if is_32bits {
get_address_point(instructions, 0x18, true)
} else {
get_address_point(instructions, 0x18, false)
}
}
println!("{:x}", Machine::read_memory(& mut machine, 4, 0));
machine
/// Memory address of the start of the program header table
///
/// ## Paramters:
///
/// **instructions** List of bytes of the loaded binary file
/// **is_32bits** defines whether the binary file is 32 bits or 64 bits
fn get_program_header_table_location(instructions: &[u8], is_32bits: bool) -> Option<u64> {
if is_32bits {
get_address_point(instructions, 0x1c, true)
} else {
get_address_point(instructions, 0x20, false)
}
}
/// Memory address of the start of the section header table
///
/// ## Paramters:
///
/// **instructions** List of bytes of the loaded binary file
/// **is_32bits** defines whether the binary file is 32 bits or 64 bits
fn get_section_header_table_location(instructions: &[u8], is_32bits: bool) -> Option<u64> {
if is_32bits {
get_address_point(instructions, 0x20, true)
} else {
get_address_point(instructions, 0x28, false)
}
}
/// Return the size of the header, normally, 0x40 for 64 bits bin and 0x34 for 32 bits
///
/// ## Paramters:
///
/// **instructions** List of bytes of the loaded binary file
/// **is_32bits** defines whether the binary file is 32 bits or 64 bits
fn get_elf_header_size(instructions: &[u8], is_32bits: bool) -> Option<u16> {
let address = if is_32bits { 0x28 } else { 0x34 };
Self::get_u16_value(instructions, address)
}
/// return the size of a program header table entry
///
/// ## Paramters:
///
/// **instructions** List of bytes of the loaded binary file
/// **is_32bits** defines whether the binary file is 32 bits or 64 bits
fn get_program_header_size(instructions: &[u8], is_32bits: bool) -> Option<u16> {
let address = if is_32bits { 0x2a } else { 0x36 };
Self::get_u16_value(instructions, address)
}
/// return the number of entries in the program header
///
/// ## Paramters:
///
/// **instructions** List of bytes of the loaded binary file
/// **is_32bits** defines whether the binary file is 32 bits or 64 bits
fn get_number_entries_program_header(instructions: &[u8], is_32bits: bool) -> Option<u16> {
let address = if is_32bits { 0x2c } else { 0x38 };
Self::get_u16_value(instructions, address)
}
/// Return the size of a section header table entry
///
/// ## Paramters:
///
/// **instructions** List of bytes of the loaded binary file
/// **is_32bits** defines whether the binary file is 32 bits or 64 bits
fn get_section_header_size(instructions: &[u8], is_32bits: bool) -> Option<u16> {
let address = if is_32bits { 0x2e } else { 0x3a };
Self::get_u16_value(instructions, address)
}
/// Return the number of entries in the section header
///
/// ## Paramters:
///
/// **instructions** List of bytes of the loaded binary file
/// **is_32bits** defines whether the binary file is 32 bits or 64 bits
fn get_section_header_num_entries(instructions: &[u8], is_32bits: bool) -> Option<u16> {
let address = if is_32bits { 0x30 } else { 0x3c };
Self::get_u16_value(instructions, address)
}
/// Return a u16 value, usually for the size or the number of entries inside a header
///
/// This method retrieve 2 bytes and concatenate them assuming the file is little endian
///
/// ## Paramters:
///
/// **instructions** List of bytes of the loaded binary file
/// **address** Position of the first byte
fn get_u16_value(instructions: &[u8], address: usize) -> Option<u16> {
let mut bytes: [u8; 2] = [0; 2];
bytes[0] = instructions.get(address).copied()?;
bytes[1] = instructions.get(address + 1).copied()?;
Option::Some(u16::from_le_bytes(bytes))
}
}
impl TryFrom<&Vec<u8>> for ElfHeader {
type Error = String;
fn try_from(instructions: &Vec<u8>) -> Result<Self, Self::Error> {
if Self::is_elf(instructions) {
let format = Self::is_32bits(instructions);
let endianess = Self::check_endianess(instructions);
let version = Self::get_version(instructions).ok_or("Cannot retrieve version")?;
let is_sys_v_abi = Self::is_system_v_elf(instructions);
let is_rv_target = Self::is_riscv_isa(instructions);
let entrypoint = Self::get_entrypoint(instructions, format).ok_or("Cannot get entrypoint")?;
let elf_header_size = Self::get_elf_header_size(instructions, format).ok_or("Cannot get elf header size")?;
let program_header_location = Self::get_program_header_table_location(instructions, format).ok_or("Cannot get program header table location")?;
let program_header_entries = Self::get_number_entries_program_header(instructions, format).ok_or("Cannot get number of entries in program header table")? ;
let program_header_size = Self::get_program_header_size(instructions, format).ok_or("Cannot get program header entry size")?;
let section_header_location = Self::get_section_header_table_location(instructions, format).ok_or("Cannot get section header table location")?;
let section_header_entries = Self::get_section_header_num_entries(instructions, format).ok_or("Cannot get number of entries of section header")?;
let section_header_size = Self::get_section_header_size(instructions, format).ok_or("Cannot get size of section header entry")?;
Ok(ElfHeader {
endianess,
is_32bits: format,
version,
sys_v_abi: is_sys_v_abi,
is_riscv_target: is_rv_target,
entrypoint,
elf_header_size,
program_header_location,
program_header_entries,
program_header_size,
section_header_location,
section_header_entries,
section_header_size
})
} else {
Err("File doesn't have elf magic number")?
}
}
}
/// Flag of a section, a section can have multiples flags by adding the values
#[allow(clippy::enum_variant_names)]
#[allow(dead_code)]
pub enum FlagValue {
/// The section is writable
ShfWrite = 0x1,
/// The section need to be allocate/occupe memory during execution
ShfAlloc = 0x2,
/// The section need to be executable
ShfExecinstr = 0x4,
/// Section might ber merged
ShfMerge = 0x10,
/// Contain null-terminated (\0) strings
ShfStrings = 0x20,
// There is others but are unrelevant (I think)
}
/// Section header entry, contains useful informations for each sections of the binary file
///
/// see <https://en.wikipedia.org/wiki/Executable_and_Linkable_Format#Section_header>
#[derive(Debug)]
pub struct SectionHeader {
/// Offset to a string in .shstrtab section that represent the name of this section
///
/// Offset: 0x0, size: 4 bytes
pub name_offset: u32,
/// Identify the type of this header
///
/// Offset: 0x4, size: 4 bytes
pub header_type: u32,
/// Identify the atributes of this section
///
/// see `Self::does_flag_contains_key(self, FlagValue)`
///
/// Offset: 0x8, size: 4 (32 bits) or 8 (64 bits) bytes
pub flags: u64,
/// Virtual address of the section in memory if section is loaded, 0x0 otherwise
///
/// Offset: 0x0C (32 bits) or 0x10 (64 bits), size: 4 (32 bits) or 8 (64 bits) bytes
pub virt_addr: u64,
/// Offset of the section in the file image (binary file)
///
/// Offset: 0x10 (32 bits) or 0x18 (64 bits), size: 4 (32 bits) or 8 (64 bits) bytes
pub image_offset: u64,
/// Size of the section in the file image, may be 0
///
/// Offset: 0x14 (32 bits) or 0x20 (64 bits), size: 4 (32 bits) or 8 (64 bits) bytes
pub section_size: u64,
pub section_link: u32,
pub section_info: u32,
/// Contain the required alignment of the section, must be a power of 2
///
/// Offset: 0x20 (32 bits) or 0x30 (64 bits), size: 4 (32 bits) or 8 (64 bits) bytes
pub required_align: u64,
/// Contain the size of each entry, for sections that contain fixed size entries, otherwise 0
///
/// Offset: 0x24 (32 bits) or 0x38 (64 bits), size: 4 (32 bits) or 8 (64 bits) bytes
pub entry_size: u64
}
impl SectionHeader {
/// return true if flag of this section contains / have `key`, false otherwise
pub fn does_flag_contains_key(&self, key: FlagValue) -> bool {
self.flags & key as u64 != 0
}
/// Return the offset to a string in .shstrtab that represents the name of this section
fn get_name_offset(instructions: &[u8], address: usize) -> Option<u32> {
get_address_point(instructions, address, true).map(|v| { v as u32 })
// set true to return a u32
}
/// Return the type of header of the section
fn get_header_type(instructions: &[u8], address: usize) -> Option<u32> {
get_address_point(instructions, address + 0x4, true).map(|v| { v as u32 })
}
/// Return the flags of the section, can hold multiples values, see [`FlagValue`]
fn get_flags(instructions: &[u8], address: usize, is_32bits: bool) -> Option<u64> {
get_address_point(instructions, address + 0x8, is_32bits)
}
/// Return the virtual address of the section in memory if the sectino is loaded(see section flag), otherwise 0
fn get_virtual_address(instructions: &[u8], address: usize, is_32bits: bool) -> Option<u64> {
get_address_point(instructions, address + if is_32bits { 0x0C } else { 0x10 }, is_32bits)
}
/// Return the offset of the section in the file image (binary file)
fn get_image_offset(instructions: &[u8], address: usize, is_32bits: bool) -> Option<u64> {
get_address_point(instructions, address + if is_32bits { 0x10 } else { 0x18 }, is_32bits)
}
/// Return the size of the section in the file image (binary file), may be 0
fn get_section_size(instructions: &[u8], address: usize, is_32bits: bool) -> Option<u64> {
get_address_point(instructions, address + if is_32bits { 0x14 } else { 0x20 }, is_32bits)
}
fn get_section_link(instructions: &[u8], address: usize, is_32bits: bool) -> Option<u32> {
get_address_point(instructions, address + if is_32bits { 0x18 } else { 0x28 }, false).map(|v| { v as u32 })
}
fn get_section_info(instructions: &[u8], address: usize, is_32bits: bool) -> Option<u32> {
get_address_point(instructions, address + if is_32bits { 0x1C } else { 0x2C }, false).map(|v| { v as u32 })
}
/// Return the required alignment of the section, must be a power of 2
fn get_required_align(instructions: &[u8], address: usize, is_32bits: bool) -> Option<u64> {
get_address_point(instructions, address + if is_32bits { 0x20 } else { 0x30 }, is_32bits)
}
/// Contain the size of each entry for sections that contain fixed-size entries, otherwise 0
fn get_entry_size(instructions: &[u8], address: usize, is_32bits: bool) -> Option<u64> {
get_address_point(instructions, address + if is_32bits { 0x24 } else { 0x38 }, is_32bits)
}
}
impl TryFrom<(&[u8], u64, bool)> for SectionHeader {
type Error = ();
fn try_from(value: (&[u8], u64, bool)) -> Result<Self, Self::Error> {
let instructions = value.0;
let address = value.1 as usize;
let is_32bits = value.2;
let name_offset = Self::get_name_offset(instructions, address).ok_or(())?;
let header_type = Self::get_header_type(instructions, address).ok_or(())?;
let attribute = Self::get_flags(instructions, address, is_32bits).ok_or(())?;
let virt_addr = Self::get_virtual_address(instructions, address, is_32bits).ok_or(())?;
let image_offset = Self::get_image_offset(instructions, address, is_32bits).ok_or(())?;
let section_size = Self::get_section_size(instructions, address, is_32bits).ok_or(())?;
let section_link = Self::get_section_link(instructions, address, is_32bits).ok_or(())?;
let section_info = Self::get_section_info(instructions, address, is_32bits).ok_or(())?;
let required_align = Self::get_required_align(instructions, address, is_32bits).ok_or(())?;
let entry_size = Self::get_entry_size(instructions, address, is_32bits).ok_or(())?;
Ok(Self { name_offset,
header_type,
flags: attribute,
virt_addr,
image_offset,
section_size,
section_link,
section_info,
required_align,
entry_size
})
}
}
/// Error enum for [`Loader`]
#[derive(Debug)]
pub enum LoaderError {
/// Correspond to std IO error
IOError(std::io::Error),
/// Others errors
ParsingError(String)
}
/// Global structure of the loader, one instance per loaded files
pub struct Loader {
/// List of bytes inside the binary file
bytes: Vec<u8>,
/// Elf header, see [`ElfHeader`] for more informations
pub elf_header: ElfHeader,
/// Section header table entries, see [`SectionHeader`] for more informations
pub sections: Vec<SectionHeader>
}
impl Loader {
/// # Loader constructor
///
/// Load the binary file given in parameter, parse it and load inside the machine memory
/// return the loader instance and the location of the end of the last a allocated section in memory
///
/// ## Parameters
///
/// **path**: location of the binary file on disk
/// **machine**: well, the risc-v simulator
/// **start_index**: The position at which you want to start to allocate the program
pub fn new(path: &str, machine: &mut Machine, start_index: usize) -> Result<(Self, u64), LoaderError> {
let loader = Self::load_and_parse(path)?;
let end_alloc = loader.load_into_machine(machine, start_index)?;
Ok((loader, end_alloc))
}
/// Try to load the binary file in memory after it been parsed
///
/// Binary file is loaded according to sections order and rules, see [`SectionHeader`]
///
/// Return the location of the end of the last a allocated section in memory
fn load_into_machine(&self, machine: &mut Machine, start_index: usize) -> Result<u64, LoaderError> {
let mut end_index = 0;
for i in 0..self.sections.len() {
let section = &self.sections[i];
if section.does_flag_contains_key(FlagValue::ShfAlloc) {
end_index = section.virt_addr + section.section_size;
// Can allocate to machine memory
for j in (0..section.section_size as usize).step_by(4) {
let mut buf: [u8; 4] = [0; 4];
#[allow(clippy::needless_range_loop)]
for k in 0..buf.len() {
if section.does_flag_contains_key(FlagValue::ShfWrite) {
// flag WA, on doit allouer des données initialisés à 0
// généralement, ce signifie que le compilateur à ajouter une section .bss
buf[k] = 0;
} else {
buf[k] = self.bytes.get(section.image_offset as usize + j + k).copied().ok_or(LoaderError::ParsingError(format!("index 0x{:x} is out of bound because list have a size of 0x{:x} (image offset 0x{:x}, j 0x{:x}, k 0x{:x})", section.image_offset as usize + j + k, self.bytes.len(), section.image_offset, j, k)))?;
}
}
machine.write_memory(4, start_index + section.virt_addr as usize + j, u32::from_le_bytes(buf) as u64);
}
}
}
Ok(start_index as u64 + end_index + 4)
}
/// Load the binary file and store it inside an array and try to parse it,
/// useful for a lot of thing like to know which sections to allocate memory and where
fn load_and_parse(path: &str) -> Result<Self, LoaderError> {
let file = fs::File::open(path);
match file {
Ok(mut file) => {
let mut instructions: Vec<u8> = Default::default();
loop {
let mut buf: [u8; 1] = [0; 1];
let res = file.read(&mut buf);
match res {
Ok(res) => {
if res == 0 {
break; // eof
} else {
instructions.push(buf[0]);
}
},
Err(err) => {
return Err(LoaderError::IOError(err))
}
}
}
let elf_header = match ElfHeader::try_from(&instructions) {
Ok(header) => {
header
},
Err(err) => {
return Err(LoaderError::ParsingError(format!("Cannot parse elf header : {}", err)));
}
};
let section_header = match Self::parse_section_header(&instructions, elf_header.is_32bits, elf_header.section_header_location, elf_header.section_header_entries, elf_header.section_header_size) {
Ok(header) => {
header
},
Err(_) => {
return Err(LoaderError::ParsingError("Cannot parse section header".to_string()));
}
};
// #[cfg(debug_assertions)]
// println!("{:04x?}", instructions); // only print loaded program in debug build
Ok(Self { bytes: instructions, elf_header, sections: section_header })
},
Err(err) => {
Err(LoaderError::IOError(err))
}
}
}
/// Try to parse sections header table
///
/// Create one instance of [`SectionHeader`] for each entry and store it inside an array
///
/// ## Parameters
///
/// **instructions**: array of bytes of the binary file
/// **is_32bits**: contain whether the binary file is 32 bits or 64 bits
/// **header_location**: represent the position of the first entry of the header
/// **num_of_entries**: defines the number of section header entries
/// **entry_size**: Defines the size of an entry (each entry have the exact same size), value vary depending of if this binary file is 32 or 64 bits
fn parse_section_header(instructions: &[u8], is_32bits: bool, header_location: u64, num_of_entries: u16, entry_size: u16) -> Result<Vec<SectionHeader>, ()> {
let mut sections: Vec<SectionHeader> = Default::default();
for i in 0..num_of_entries as u64 {
sections.push(Self::parse_section_entry(instructions, is_32bits, header_location + i * entry_size as u64)?);
}
Ok(sections)
}
/// Parse one entry of the section header
///
/// ## Parameters:
///
/// **instructions**: array of bytes of the binary file
/// **is_32bits**: contain whether the binary file is 32 bits or 64 bits
/// **location**: represent the position of the entry on the file image
fn parse_section_entry(instructions: &[u8], is_32bits: bool, location: u64) -> Result<SectionHeader, ()> {
SectionHeader::try_from((instructions, location, is_32bits))
}
}
/// return the memory address of something stored at address
/// Can return None if the file is smaller than adress + 3 (or 7 if 64 bits), in this case, the elf header is incorrect
fn get_address_point(instructions: &[u8], address: usize, is_32bits: bool) -> Option<u64> {
if is_32bits {
let mut bytes: [u8; 4] = [0; 4];
bytes[0] = instructions.get(address).copied()?;
bytes[1] = instructions.get(address + 1).copied()?;
bytes[2] = instructions.get(address + 2).copied()?;
bytes[3] = instructions.get(address + 3).copied()?;
Option::Some(u32::from_le_bytes(bytes) as u64)
} else {
let mut bytes: [u8; 8] = [0; 8];
bytes[0] = instructions.get(address).copied()?;
bytes[1] = instructions.get(address + 1).copied()?;
bytes[2] = instructions.get(address + 2).copied()?;
bytes[3] = instructions.get(address + 3).copied()?;
bytes[4] = instructions.get(address + 4).copied()?;
bytes[5] = instructions.get(address + 5).copied()?;
bytes[6] = instructions.get(address + 6).copied()?;
bytes[7] = instructions.get(address + 7).copied()?;
Option::Some(u64::from_le_bytes(bytes))
}
}
/// Tests has been made for C program compiled with RISC-V GCC 12.2.0, target: riscv64-unknown-elf
///
/// It may not pass in the future if future gcc version modify order of the binary or something else
#[cfg(test)]
mod test {
use crate::{simulator::{loader::{Loader, SectionHeader}, machine::Machine}, utility::cfg::get_debug_configuration};
#[test]
fn test_parse_elf() {
let mut machine = Machine::new(true, get_debug_configuration());
let loader = Loader::load_and_parse("./target/guac/unsigned_addition.guac").expect("IO Error");
loader.load_into_machine(&mut machine, 0).expect("Parsing error");
assert!(!loader.elf_header.is_32bits);
assert!(!loader.elf_header.endianess);
assert!(loader.elf_header.sys_v_abi);
assert!(loader.elf_header.is_riscv_target);
assert_eq!(1, loader.elf_header.version);
assert_eq!(0x4000, loader.elf_header.entrypoint);
assert_eq!(64, loader.elf_header.elf_header_size);
assert_eq!(64, loader.elf_header.program_header_location);
assert_eq!(18992, loader.elf_header.section_header_location);
assert_eq!(56, loader.elf_header.program_header_size);
assert_eq!(64, loader.elf_header.section_header_size);
assert_eq!(4, loader.elf_header.program_header_entries);
assert_eq!(9, loader.elf_header.section_header_entries);
println!("{:#x?}", loader.sections);
}
#[test]
fn test_parse_section() {
let mut machine = Machine::new(true, get_debug_configuration());
let loader = Loader::load_and_parse("./target/guac/unsigned_addition.guac").expect("IO Error");
loader.load_into_machine(&mut machine, 0).expect("Parsing error");
assert_eq!(9, loader.sections.len());
let n = loader.sections.iter().filter(|p| { p.does_flag_contains_key(crate::simulator::loader::FlagValue::ShfAlloc)}).collect::<Vec<&SectionHeader>>().len();
assert_eq!(3, n);
assert_eq!(loader.sections[1].virt_addr, 0x4000);
assert_eq!(loader.sections[1].image_offset, 0x1000);
assert!(loader.sections[1].does_flag_contains_key(crate::simulator::loader::FlagValue::ShfAlloc));
assert_eq!(loader.sections[2].virt_addr, 0x400_000);
assert_eq!(loader.sections[2].image_offset, 0x2000);
assert!(loader.sections[2].does_flag_contains_key(crate::simulator::loader::FlagValue::ShfAlloc));
}
}

View File

@ -1,104 +1,136 @@
use std::{ops::{Add, Sub}, io::Write};
//! # Machine
//!
//! This module contains a RISC-V simulator.
//! It supports the base instruction set along
//! with 32bit floating point operations.
//!
//! Basic usage:
//!
//! ```
//! let mut machine = Machine::init_machine();
//! machine.run();
//! ```
use crate::simulator::print;
use std::{
io::Write,
fs::File
};
use crate::{simulator::{
error::MachineError,
instruction::{*, self},
interrupt::Interrupt,
global::*,
register::*
}, kernel::system::System, utility::cfg::{Settings, MachineSettingKey}};
use super::{decode::{Instruction, decode}};
use super::global::*;
use std::fs::File;
use crate::kernel::{
exception
};
/// doit disparaitre
const MEM_SIZE : usize = 0x500000;
use super::error::MachineOk;
pub trait RegisterNum: Add<Output=Self> + Sub<Output=Self> + PartialEq + Copy {}
impl RegisterNum for i64 {}
impl RegisterNum for f32 {}
pub struct Register<U: RegisterNum> {
register: [U; 32]
/// # Exceptions
///
/// Textual names of the exceptions that can be generated by user program
/// execution, for debugging purpose.
/// todo: is this really supposed to stand in machine.rs?
#[derive(Debug)]
pub enum ExceptionType {
/// Everything ok
NoException,
/// A program executed a system call
SyscallException,
/// Page fault exception
PagefaultException,
/// Write attempted to a page marked "read-only"
ReadOnlyException,
/// Translation resulted in an invalid physical address (mis-aligned or out-of-bounds)
BusErrorException,
/// Reference which was not mapped in the address space
AddressErrorException,
/// Integer overflow in add or sub
OverflowException,
/// Unimplemented or reserved instruction
IllegalInstrException,
NumExceptionTypes
}
impl<U: RegisterNum> Register<U> {
pub fn get_reg(&self, position: usize) -> U {
self.register[position]
}
/// # Machine Status
///
/// The machine can be running kernel code (SystemMode), user code (UserMode),
/// or there can be no running thread if the ready list is empty (IdleMode).
pub enum MachineStatus {
IdleMode,
SystemMode,
UserMode
}
impl Register<i64> {
pub fn init() -> Register<i64> {
Register {
register: [0i64; 32]
}
}
pub fn set_reg(&mut self, position: usize, value: i64) {
if position != 0 {
self.register[position] = value;
} else {
// Panic ou rien ? (dans le doute pour le moment panic)
// unreachable!("You can't write to zero register")
}
}
}
impl Register<f32> {
pub fn init() -> Register<f32> {
Register {
register: [0f32; 32]
}
}
pub fn set_reg(&mut self, position: usize, value: f32) {
self.register[position] = value;
}
}
/// ID of the stack register
pub const STACK_REG: usize = 2;
/// Number of available Integer registers
pub const NUM_INT_REGS: usize = 32;
/// Number of available Floating Point registers
pub const NUM_FP_REGS: usize = 32;
/// RISC-V Simulator
pub struct Machine {
/// Debug mode of the machine
debug: bool,
/// Program counter
pub pc : u64,
/// Stack pointer
pub sp: usize,
/// Integer register
pub int_reg : Register<i64>,
/// Floating point register
pub fp_reg : Register<f32>,
/// Heap memory
pub main_memory : Vec<u8>,
/// Shiftmask
pub shiftmask : [u64 ; 64],
pub registers_trace : String // for tests
/// Debug data
pub registers_trace : String, // for tests
/// todo: document Interrupts
pub interrupt: Interrupt,
// futur taille à calculer int memSize = g_cfg->NumPhysPages * g_cfg->PageSize;
//creer une struct cfg(configuration) qui s'initialise avec valeur dans un fichier cfg
num_phy_page: u64,
pub page_size: u64,
/// Current machine status
pub status: MachineStatus
}
impl Machine {
pub fn _init_machine() -> Machine {
/// Machine constructor
pub fn new(debug: bool, settings: Settings) -> Self {
let mut shiftmask : [u64 ; 64] = [0 ; 64];
let mut value : u64 = 0xffffffff;
value = (value << 32) + value;
for item in &mut shiftmask {
*item = value;
value >>= 1;
}
let mut ret = Machine {
let num_phy_page = *settings.get(&MachineSettingKey::NumPhysPages).unwrap();
let page_size = *settings.get(&MachineSettingKey::PageSize).unwrap();
let mem_size = (page_size*num_phy_page*100_000) as usize;
Machine {
debug,
pc : 0,
sp: 0,
int_reg : Register::<i64>::init(),
int_reg : { let mut r = Register::<i64>::init(); r.set_reg(10, -1); r },
fp_reg : Register::<f32>::init(),
main_memory : vec![0; MEM_SIZE],
main_memory : vec![0_u8; mem_size],
shiftmask,
registers_trace : String::from("")
};
ret.int_reg.set_reg(10, -1);
ret
interrupt: Interrupt::new(),
registers_trace : String::from(""),
status: MachineStatus::SystemMode,
num_phy_page,
page_size
}
}
/// Read from main memory of the machine
@ -110,7 +142,7 @@ impl Machine {
/// - **machine** which contains the main memory
/// - **size** the number of bytes to read (1, 2, 4, 8)
/// - **address** in the memory to read
pub fn read_memory(machine : &mut Machine, size : i32, address : usize) -> u64 {
pub fn read_memory(&self, size : i32, address : usize) -> u64 {
if ![1, 2, 4, 8].contains(&size) {
panic!("ERROR read_memory : wrong size parameter {size}, must be (1, 2, 4 or 8)");
}
@ -118,7 +150,7 @@ impl Machine {
let mut ret: u64 = 0;
for i in 0..size {
ret <<= 8;
ret += machine.main_memory[address + i as usize] as u64;
ret += self.main_memory[address + i as usize] as u64;
}
ret
}
@ -133,13 +165,13 @@ impl Machine {
/// - **size** the number of bytes to write (1, 2, 4 or 8)
/// - **address** the address to write to
/// - **value** data to be written
pub fn write_memory(machine: &mut Machine, size: i32, address: usize, value: u64) {
pub fn write_memory(&mut self, size: i32, address: usize, value: u64) {
if ![1, 2, 4, 8].contains(&size) {
panic!("ERROR write_memory: WRONG `size` PARAMETER ({size}), must be 1, 2, 4 or 8")
}
for i in 0..size as usize {
let inv_i = size as usize - i - 1;
machine.main_memory[address + i] = ((value & 0xff << (8 * inv_i)) >> (inv_i * 8)) as u8;
self.main_memory[address + i] = ((value & 0xff << (8 * inv_i)) >> (inv_i * 8)) as u8;
}
}
@ -149,11 +181,11 @@ impl Machine {
/// ### Parameters
///
/// - **machine** contains the memory
pub fn _extract_memory(machine: &mut Machine){
pub fn _extract_memory(&mut self){
let file_path = "burritos_memory.txt";
let write_to_file = |path| -> std::io::Result<File> {
let mut file = File::create(path)?;
file.write_all(&machine.main_memory)?;
file.write_all(&self.main_memory)?;
Ok(file)
};
match write_to_file(file_path) {
@ -162,536 +194,566 @@ impl Machine {
};
}
pub fn print_machine_status(machine: &mut Machine) {
/// Print the status of the machine to the standard output
///
/// ### Parameters
///
/// - **machine** the machine to get the status from
pub fn print_status(&self) {
println!("######### Machine status #########");
for i in (0..32).step_by(3) {
print!(">{0: <4} : {1:<16x} ", print::REG_X[i], machine.int_reg.get_reg(i));
print!(">{0: <4} : {1:<16x} ", print::REG_X[i+1], machine.int_reg.get_reg(i+1));
print!(">{0: <4} : {1:<16x} ", instruction::REG_X[i], self.int_reg.get_reg(i as u8));
print!(">{0: <4} : {1:<16x} ", instruction::REG_X[i+1], self.int_reg.get_reg((i+1) as u8));
if i+2 < 32 {
print!(">{0: <4} : {1:<16x} ", print::REG_X[i+2], machine.int_reg.get_reg(i+2));
print!(">{0: <4} : {1:<16x} ", instruction::REG_X[i+2], self.int_reg.get_reg((i+2) as u8));
}
println!();
}
println!("________________SP________________");
let sp_index = machine.int_reg.get_reg(2);
for i in 0..5 {
println!("SP+{:<2} : {:16x}", i*8, Self::read_memory(machine, 8, (sp_index + i*8) as usize));
}
let sp = self.int_reg.get_reg(2);
println!("SP: {:16x}", self.read_memory(8, sp as usize));
println!("##################################");
}
pub fn string_registers(machine: &mut Machine) -> String {
/// Get the state of the registers as a string
///
/// ### Parameters
///
/// - **machine** the machine to read the registers from
pub fn string_registers(&self) -> String {
let mut s = String::from("");
for i in 0..32 {
s.push_str(format!("{} ", machine.int_reg.get_reg(i)).as_str());
s.push_str(format!("{} ", self.int_reg.get_reg(i)).as_str());
}
s
}
/// Execute the instructions table of a machine putted in param
pub fn raise_exception(&mut self, exception: ExceptionType, address : u64, system: &mut System) -> Result<MachineOk, MachineError>{
self.set_status(MachineStatus::SystemMode);
// Handle the interruption
match exception::call(&exception, self, system) {
Ok(r) => {
self.set_status(MachineStatus::UserMode);
Ok(r)
},
Err(e) => Err(format!("Syscall {:?} invalid or not implemented", e))?
}
}
/// Execute the instructions table of a machine put in param
///
/// ### Parameters
///
/// - **machine** which contains a table of instructions
pub fn run(machine : &mut Machine){
while Machine::one_instruction(machine) == 0 {}
println!("trace : \n{}", machine.registers_trace);
pub fn run(&mut self, system: &mut System) {
loop {
match self.one_instruction(system) {
Ok(MachineOk::Ok) => {},
Ok(MachineOk::Shutdown) => break,
Err(e) => panic!("FATAL at pc {} -> {}", self.pc, e)
}
self.write_int_register(0, 0); // In case an instruction write on register 0
}
}
/// execute the current instruction
/// Execute the instructions table of a machine put in param
/// **WITHOUT INTERPRETING SYSCALLS**
///
/// For debug purposes
pub fn _run_debug(&mut self, system: &mut System) {
loop {
match self.one_instruction(system) {
Ok(_) => (),
_ => break
}
}
}
/// Execute the current instruction
///
/// ### Parameters
///
/// - **machine** which contains a table of instructions and a pc to the actual instruction
pub fn one_instruction(machine :&mut Machine) -> i32 {
pub fn one_instruction(&mut self, system: &mut System) -> Result<MachineOk, MachineError> {
let unsigned_reg1 : u64;
let unsigned_reg2 : u64;
let long_result : i128;
/*__int128 longResult;
int32_t local_data_a, local_data_b;
int64_t localLongResult;
uint32_t local_data_aUnsigned, local_data_bUnsigned;
int32_t localResult;
float localFloat;
uint64_t value;*/
if machine.main_memory.len() <= machine.pc as usize {
if self.main_memory.len() <= self.pc as usize {
panic!("ERROR : number max of instructions rushed");
}
let mut val: [u8; 4] = [0; 4];
for (i, mut _item) in val.iter_mut().enumerate() {
_item = &mut machine.main_memory[machine.pc as usize + i];
for (i, elem) in val.iter_mut().enumerate() {
*elem = self.main_memory[self.pc as usize + i];
}
let val = u32::from_be_bytes(val) as u64;
let inst : Instruction = decode(val);
Self::print_machine_status(machine);
println!("executing instruction : {:016x} at pc {:x}", val, machine.pc);
println!("{}", print::print(decode(val), machine.pc as i32));
let trace = Self::string_registers(machine);
machine.registers_trace.push_str(format!("{}\n", trace).as_str());
machine.pc += 4;
let val = u32::from_be_bytes(val) as u64;
let inst : Instruction = Instruction::new(val);
if self.debug {
self.print_status();
println!("executing instruction : {:016x} at pc {:x}", val, self.pc);
println!("{}", instruction::instruction_debug(&inst, self.pc as i32));
let trace = Self::string_registers(self);
self.registers_trace.push_str(format!("{}\n", trace).as_str());
}
self.pc += 4;
match inst.opcode {
// Treatment for: LOAD UPPER IMMEDIATE INSTRUCTION
RISCV_LUI => {
machine.int_reg.set_reg(inst.rd as usize, inst.imm31_12 as i64);
self.int_reg.set_reg(inst.rd, inst.imm31_12 as i64);
Ok(MachineOk::Ok)
},
// Treatment for: ADD UPPER IMMEDIATE TO PC INSTRUCTION
RISCV_AUIPC => {
machine.int_reg.set_reg(inst.rd as usize,machine.pc as i64 - 4 + inst.imm31_12 as i64);
self.int_reg.set_reg(inst.rd, self.pc as i64 - 4 + inst.imm31_12 as i64);
Ok(MachineOk::Ok)
},
// Treatement for: JUMP AND LINK INSTRUCTIONS (direct jump)
RISCV_JAL => {
machine.int_reg.set_reg(inst.rd as usize, machine.pc as i64);
machine.pc = (machine.pc as i64 + inst.imm21_1_signed as i64 - 4) as u64;
self.int_reg.set_reg(inst.rd, self.pc as i64);
self.pc = (self.pc as i64 + inst.imm21_1_signed as i64 - 4) as u64;
Ok(MachineOk::Ok)
},
// Treatment for: JUMP AND LINK REGISTER INSTRUCTIONS (indirect jump)
RISCV_JALR => {
let tmp = machine.pc;
machine.pc = (machine.int_reg.get_reg(inst.rs1 as usize) + inst.imm12_I_signed as i64) as u64 & 0xfffffffe;
machine.int_reg.set_reg(inst.rd as usize, tmp as i64);
let tmp = self.pc;
self.pc = (self.int_reg.get_reg(inst.rs1) + inst.imm12_I_signed as i64) as u64 & 0xfffffffe;
self.int_reg.set_reg(inst.rd, tmp as i64);
Ok(MachineOk::Ok)
},
//******************************************************************************************
// Treatment for: BRANCH INSTRUCTIONS
RISCV_BR => {
match inst.funct3 {
RISCV_BR_BEQ => {
if machine.int_reg.get_reg(inst.rs1 as usize) == machine.int_reg.get_reg(inst.rs2 as usize) {
machine.pc = (machine.pc as i64 + inst.imm13_signed as i64 - 4) as u64;
}
},
RISCV_BR_BNE => {
if machine.int_reg.get_reg(inst.rs1 as usize) != machine.int_reg.get_reg(inst.rs2 as usize) {
machine.pc = (machine.pc as i64 + inst.imm13_signed as i64 - 4) as u64;
}
},
RISCV_BR_BLT => {
if machine.int_reg.get_reg(inst.rs1 as usize) < machine.int_reg.get_reg(inst.rs2 as usize) {
machine.pc = (machine.pc as i64 + inst.imm13_signed as i64 - 4) as u64;
}
},
RISCV_BR_BGE => {
if machine.int_reg.get_reg(inst.rs1 as usize) >= machine.int_reg.get_reg(inst.rs2 as usize) {
machine.pc = (machine.pc as i64 + inst.imm13_signed as i64 - 4) as u64;
}
},
RISCV_BR_BLTU => {
if machine.int_reg.get_reg(inst.rs1 as usize) < machine.int_reg.get_reg(inst.rs2 as usize) {
machine.pc = (machine.pc as i64 + inst.imm13_signed as i64 - 4) as u64;
}
},
RISCV_BR_BGEU => {
if machine.int_reg.get_reg(inst.rs1 as usize) >= machine.int_reg.get_reg(inst.rs2 as usize) {
machine.pc = (machine.pc as i64 + inst.imm13_signed as i64 - 4) as u64;
}
},
_ => {
panic!("In BR switch case, this should never happen... Instr was {}", inst.value);
}
}
},
RISCV_BR => self.branch_instruction(inst),
//******************************************************************************************
// Treatment for: LOAD INSTRUCTIONS
RISCV_LD => {
match inst.funct3 {
RISCV_LD_LB | RISCV_LD_LBU => {
let tmp = Self::read_memory(machine, 1, (machine.int_reg.get_reg(inst.rs1 as usize) + inst.imm12_I_signed as i64) as usize) as i64;
machine.int_reg.set_reg(inst.rd as usize, tmp);
},
RISCV_LD_LH | RISCV_LD_LHU => {
let tmp = Self::read_memory(machine, 2, (machine.int_reg.get_reg(inst.rs1 as usize) + inst.imm12_I_signed as i64) as usize) as i64;
machine.int_reg.set_reg(inst.rd as usize, tmp);
},
RISCV_LD_LW | RISCV_LD_LWU => {
let tmp = Self::read_memory(machine, 4, (machine.int_reg.get_reg(inst.rs1 as usize) + inst.imm12_I_signed as i64) as usize) as i64;
machine.int_reg.set_reg(inst.rd as usize, tmp);
},
RISCV_LD_LD => {
let tmp = Self::read_memory(machine, 8, (machine.int_reg.get_reg(inst.rs1 as usize) + inst.imm12_I_signed as i64) as usize) as i64;
machine.int_reg.set_reg(inst.rd as usize, tmp);
},
_ => {
panic!("In LD switch case, this should never happen... Instr was {}", inst.value);
}
}
},
// store instructions
RISCV_ST => {
match inst.funct3 {
RISCV_ST_STB => {
Self::write_memory(machine, 1, (machine.int_reg.get_reg(inst.rs1 as usize) + inst.imm12_S_signed as i64) as usize, machine.int_reg.get_reg(inst.rs2 as usize) as u64);
},
RISCV_ST_STH => {
Self::write_memory(machine, 2, (machine.int_reg.get_reg(inst.rs1 as usize) + inst.imm12_S_signed as i64) as usize, machine.int_reg.get_reg(inst.rs2 as usize) as u64);
},
RISCV_ST_STW => {
Self::write_memory(machine, 4, (machine.int_reg.get_reg(inst.rs1 as usize) + inst.imm12_S_signed as i64) as usize, machine.int_reg.get_reg(inst.rs2 as usize) as u64);
},
RISCV_ST_STD => {
Self::write_memory(machine, 8, (machine.int_reg.get_reg(inst.rs1 as usize) + inst.imm12_S_signed as i64) as usize, machine.int_reg.get_reg(inst.rs2 as usize) as u64);
},
_ => {
panic!("In ST switch case, this should never happen... Instr was {}", inst.value);
}
}
}
//******************************************************************************************
RISCV_LD => self.load_instruction(inst),
// Treatment for: STORE INSTRUCTIONS
RISCV_ST => self.store_instruction(inst),
// Treatment for: OP INSTRUCTIONS
RISCV_OP => self.op_instruction(inst),
// Treatment for: OPI INSTRUCTIONS
RISCV_OPI => {
match inst.funct3 {
RISCV_OPI_ADDI => {
machine.int_reg.set_reg(inst.rd as usize, machine.int_reg.get_reg(inst.rs1 as usize) + inst.imm12_I_signed as i64);
},
RISCV_OPI_SLTI => {
machine.int_reg.set_reg(inst.rd as usize, (machine.int_reg.get_reg(inst.rs1 as usize) < inst.imm12_I_signed as i64) as i64);
},
RISCV_OPI_XORI => {
machine.int_reg.set_reg(inst.rd as usize, machine.int_reg.get_reg(inst.rs1 as usize) ^ inst.imm12_I_signed as i64);
},
RISCV_OPI_ORI => {
machine.int_reg.set_reg(inst.rd as usize, machine.int_reg.get_reg(inst.rs1 as usize) | inst.imm12_I_signed as i64);
},
RISCV_OPI_ANDI => {
machine.int_reg.set_reg(inst.rd as usize, machine.int_reg.get_reg(inst.rs1 as usize) & inst.imm12_I_signed as i64);
},
RISCV_OPI_SLLI => {
machine.int_reg.set_reg(inst.rd as usize, machine.int_reg.get_reg(inst.rs1 as usize) << inst.shamt);
},
RISCV_OPI_SRI => {
if inst.funct7_smaller == RISCV_OPI_SRI_SRLI {
machine.int_reg.set_reg(inst.rd as usize, (machine.int_reg.get_reg(inst.rs1 as usize) >> inst.shamt) & machine.shiftmask[inst.shamt as usize] as i64);
} else { // SRAI
machine.int_reg.set_reg(inst.rd as usize, machine.int_reg.get_reg(inst.rs1 as usize) >> inst.shamt);
}
}
_ => { panic!("In OPI switch case, this should never happen... Instr was %x\n {}", inst.value); }
}
},
RISCV_OPI => self.opi_instruction(inst),
RISCV_OP => {
if inst.funct7 == 1 {
match inst.funct3 {
RISCV_OP_M_MUL => {
long_result = (machine.int_reg.get_reg(inst.rs1 as usize) * machine.int_reg.get_reg(inst.rs2 as usize)) as i128;
machine.int_reg.set_reg(inst.rd as usize, (long_result & 0xffffffffffffffff) as i64);
},
RISCV_OP_M_MULH => {
long_result = (machine.int_reg.get_reg(inst.rs1 as usize) * machine.int_reg.get_reg(inst.rs2 as usize)) as i128;
machine.int_reg.set_reg(inst.rd as usize, ((long_result >> 64) & 0xffffffffffffffff) as i64);
},
RISCV_OP_M_MULHSU => {
unsigned_reg2 = machine.int_reg.get_reg(inst.rs2 as usize) as u64;
long_result = (machine.int_reg.get_reg(inst.rs1 as usize) as u64 * unsigned_reg2) as i128;
machine.int_reg.set_reg(inst.rd as usize, ((long_result >> 64) & 0xffffffffffffffff) as i64);
},
// VOIR CE QUE FAIT EXACTEMENT CE TRUC , PK on converve
/*
* VOIR SI LES CAST machine.int_reg[....] = i128*u64 as u32 FAUSSE RESULTAT (suit pas la logique du code c++)
* WHAT DA HECK
*/
RISCV_OP_M_MULHU => {
unsigned_reg1 = machine.int_reg.get_reg(inst.rs1 as usize) as u64;
unsigned_reg2 = machine.int_reg.get_reg(inst.rs2 as usize) as u64;
long_result = (unsigned_reg1 * unsigned_reg2) as i128;
machine.int_reg.set_reg(inst.rd as usize, ((long_result >> 64) & 0xffffffffffffffff) as i64);
},
RISCV_OP_M_DIV => {
machine.int_reg.set_reg(inst.rd as usize, machine.int_reg.get_reg(inst.rs1 as usize) / machine.int_reg.get_reg(inst.rs2 as usize));
}
_ => {
panic!("RISCV_OP : funct7 = 1 (Multiplication) :: Error\n");
}
}
} else {
match inst.funct3 {
RISCV_OP_ADD => {
if inst.funct7 == RISCV_OP_ADD_ADD {
machine.int_reg.set_reg(inst.rd as usize, machine.int_reg.get_reg(inst.rs1 as usize) + machine.int_reg.get_reg(inst.rs2 as usize));
} else {
machine.int_reg.set_reg(inst.rd as usize, machine.int_reg.get_reg(inst.rs1 as usize) - machine.int_reg.get_reg(inst.rs2 as usize));
}
},
RISCV_OP_SLL => {
machine.int_reg.set_reg(inst.rd as usize, machine.int_reg.get_reg(inst.rs1 as usize) << (machine.int_reg.get_reg(inst.rs2 as usize) & 0x3f));
},
RISCV_OP_SLT => {
if machine.int_reg.get_reg(inst.rs1 as usize) < machine.int_reg.get_reg(inst.rs2 as usize) {
machine.int_reg.set_reg(inst.rd as usize, 1);
} else {
machine.int_reg.set_reg(inst.rd as usize, 0);
}
},
RISCV_OP_SLTU => {
unsigned_reg1 = machine.int_reg.get_reg(inst.rs1 as usize) as u64;
unsigned_reg2 = machine.int_reg.get_reg(inst.rs2 as usize) as u64;
if unsigned_reg1 < unsigned_reg2 {
machine.int_reg.set_reg(inst.rd as usize, 1);
} else {
machine.int_reg.set_reg(inst.rd as usize, 0);
}
},
RISCV_OP_XOR => {
machine.int_reg.set_reg(inst.rd as usize, machine.int_reg.get_reg(inst.rs1 as usize) ^ machine.int_reg.get_reg(inst.rs2 as usize));
},
RISCV_OP_SR => {
// RISCV_OP_SR_SRL inaccessible
machine.int_reg.set_reg(inst.rd as usize, machine.int_reg.get_reg(inst.rs1 as usize) >> machine.int_reg.get_reg(inst.rs2 as usize));
},
RISCV_OP_OR => {
machine.int_reg.set_reg(inst.rd as usize, machine.int_reg.get_reg(inst.rs1 as usize) | machine.int_reg.get_reg(inst.rs2 as usize));
},
RISCV_OP_AND => {
machine.int_reg.set_reg(inst.rd as usize, machine.int_reg.get_reg(inst.rs1 as usize) & machine.int_reg.get_reg(inst.rs2 as usize));
},
_ => {
panic!("RISCV_OP undefined case\n");
}
}//LA
}
},
//******************************************************************************************
// Treatment for OPIW INSTRUCTIONS
RISCV_OPIW => {
let local_data = machine.int_reg.get_reg(inst.rs1 as usize);
match inst.funct3 {
RISCV_OPIW_ADDIW => {
let result = local_data + inst.imm12_I_signed as i64;
machine.int_reg.set_reg(inst.rd as usize, result);
},
RISCV_OPIW_SLLIW => {
let result = local_data << inst.shamt;
machine.int_reg.set_reg(inst.rd as usize, result);
},
RISCV_OPIW_SRW => {
let result = if inst.funct7 == RISCV_OPIW_SRW_SRLIW {
(local_data >> inst.shamt) & machine.shiftmask[32 + inst.shamt as usize] as i64
} else { // SRAIW
local_data >> inst.shamt
};
machine.int_reg.set_reg(inst.rd as usize, result);
},
_ => {
panic!("In OPI switch case, this should never happen... Instr was {}\n", inst.value);
}
}
},
//******************************************************************************************
// Treatment for: OPW INSTRUCTIONS
RISCV_OPW => {
if inst.funct7 == 1 { // rv64m
let local_data_a = machine.int_reg.get_reg(inst.rs1 as usize) & 0xffffffff;
let local_data_b = machine.int_reg.get_reg(inst.rs2 as usize) & 0xffffffff;
let local_data_a_unsigned = machine.int_reg.get_reg(inst.rs1 as usize) & 0xffffffff;
let local_data_b_unsigned = machine.int_reg.get_reg(inst.rs2 as usize) & 0xffffffff;
RISCV_OPW => self.opw_instruction(inst),
// Match case for multiplication operations (in standard extension RV32M)
match inst.funct3 {
RISCV_OPW_M_MULW => {
machine.int_reg.set_reg(inst.rd as usize, local_data_a * local_data_b);
},
RISCV_OPW_M_DIVW => {
machine.int_reg.set_reg(inst.rd as usize, local_data_a / local_data_b);
},
RISCV_OPW_M_DIVUW => {
machine.int_reg.set_reg(inst.rd as usize, local_data_a_unsigned / local_data_b_unsigned);
},
RISCV_OPW_M_REMW => {
machine.int_reg.set_reg(inst.rd as usize, local_data_a % local_data_b);
},
RISCV_OPW_M_REMUW => {
machine.int_reg.set_reg(inst.rd as usize, local_data_a_unsigned % local_data_b_unsigned);
},
_ => {
panic!("this instruction ({}) doesn't exists", inst.value);
}
}
} else { // others rv64 OPW operations
let local_dataa = machine.int_reg.get_reg(inst.rs1 as usize) & 0xffffffff;
let local_datab = machine.int_reg.get_reg(inst.rs2 as usize) & 0xffffffff;
// Treatment for OPIW INSTRUCTIONS
RISCV_OPIW => self.opiw_instruction(inst),
// Match case for base OP operation
match inst.funct3 {
RISCV_OPW_ADDSUBW => {
if inst.funct7 == RISCV_OPW_ADDSUBW_ADDW {
machine.int_reg.set_reg(inst.rd as usize, local_dataa + local_datab);
} else { // SUBW
machine.int_reg.set_reg(inst.rd as usize, local_dataa - local_datab);
}
},
RISCV_OPW_SLLW => {
machine.int_reg.set_reg(inst.rd as usize, local_dataa << (local_datab & 0x1f));
},
RISCV_OPW_SRW => {
if inst.funct7 == RISCV_OPW_SRW_SRLW {
machine.int_reg.set_reg(inst.rd as usize, local_dataa >> (local_datab & 0x1f) & machine.shiftmask[32 + local_datab as usize] as i64);
} else { // SRAW
machine.int_reg.set_reg(inst.rd as usize, local_dataa >> (local_datab & 0x1f));
}
},
_ => {
panic!("this instruction ({}) doesn't exists", inst.value);
}
}
}
},
//******************************************************************************************
// Treatment for: Simple floating point extension
RISCV_FP => {
match inst.funct7 {
RISCV_FP_ADD => {
machine.fp_reg.set_reg(inst.rd as usize, machine.fp_reg.get_reg(inst.rs1 as usize) + machine.fp_reg.get_reg(inst.rs2 as usize));
},
RISCV_FP_SUB => {
machine.fp_reg.set_reg(inst.rd as usize, machine.fp_reg.get_reg(inst.rs1 as usize) - machine.fp_reg.get_reg(inst.rs2 as usize));
},
RISCV_FP_MUL => {
machine.fp_reg.set_reg(inst.rd as usize, machine.fp_reg.get_reg(inst.rs1 as usize) * machine.fp_reg.get_reg(inst.rs2 as usize));
},
RISCV_FP_DIV => {
machine.fp_reg.set_reg(inst.rd as usize, machine.fp_reg.get_reg(inst.rs1 as usize) / machine.fp_reg.get_reg(inst.rs2 as usize));
},
RISCV_FP_SQRT => {
machine.fp_reg.set_reg(inst.rd as usize, machine.fp_reg.get_reg(inst.rs1 as usize).sqrt());
},
RISCV_FP_FSGN => {
let local_float = machine.fp_reg.get_reg(inst.rs1 as usize);
match inst.funct3 {
RISCV_FP_FSGN_J => {
if machine.fp_reg.get_reg(inst.rs2 as usize) < 0f32 {
machine.fp_reg.set_reg(inst.rd as usize, -local_float);
} else {
machine.fp_reg.set_reg(inst.rd as usize, local_float);
}
}
RISCV_FP_FSGN_JN => {
if machine.fp_reg.get_reg(inst.rs2 as usize) < 0f32 {
machine.fp_reg.set_reg(inst.rd as usize, local_float);
} else {
machine.fp_reg.set_reg(inst.rd as usize, -local_float);
}
}
RISCV_FP_FSGN_JX => {
if (machine.fp_reg.get_reg(inst.rs2 as usize) < 0.0 && machine.fp_reg.get_reg(inst.rs1 as usize) >= 0.0) || (machine.fp_reg.get_reg(inst.rs2 as usize) >= 0.0 && machine.fp_reg.get_reg(inst.rs1 as usize) < 0.0) {
machine.fp_reg.set_reg(inst.rd as usize, -local_float);
} else {
machine.fp_reg.set_reg(inst.rd as usize, local_float);
}
}
_ => {
panic!("this instruction ({}) doesn't exists", inst.value);
}
}
},
RISCV_FP_MINMAX => {
let r1 = machine.fp_reg.get_reg(inst.rs1 as usize);
let r2 = machine.fp_reg.get_reg(inst.rs2 as usize);
match inst.funct3 {
RISCV_FP_MINMAX_MIN => {
machine.fp_reg.set_reg(inst.rd as usize, if r1 < r2 {r1} else {r2});
},
RISCV_FP_MINMAX_MAX => {
machine.fp_reg.set_reg(inst.rd as usize, if r1 > r2 {r1} else {r2});
},
_ => {
panic!("this instruction ({}) doesn't exists", inst.value);
}
}
},
RISCV_FP_FCVTW => {
if inst.rs2 == RISCV_FP_FCVTW_W {
machine.int_reg.set_reg(inst.rd as usize, machine.fp_reg.get_reg(inst.rs1 as usize) as i64);
} else {
machine.int_reg.set_reg(inst.rd as usize, (machine.fp_reg.get_reg(inst.rs1 as usize) as u64) as i64);
}
},
RISCV_FP_FCVTS => {
if inst.rs2 == RISCV_FP_FCVTS_W {
machine.fp_reg.set_reg(inst.rd as usize, machine.int_reg.get_reg(inst.rs1 as usize) as f32);
} else {
machine.fp_reg.set_reg(inst.rd as usize, (machine.int_reg.get_reg(inst.rs1 as usize) as u32) as f32);
}
},
RISCV_FP_FMVW => {
machine.fp_reg.set_reg(inst.rd as usize, machine.int_reg.get_reg(inst.rs1 as usize) as f32);
},
RISCV_FP_FMVXFCLASS => {
if inst.funct3 == RISCV_FP_FMVXFCLASS_FMVX {
machine.int_reg.set_reg(inst.rd as usize, machine.fp_reg.get_reg(inst.rs1 as usize) as i64);
} else {
panic!("Fclass instruction is not handled in riscv simulator");
}
},
RISCV_FP_FCMP => {
match inst.funct3 {
RISCV_FP_FCMP_FEQ => {
machine.int_reg.set_reg(inst.rd as usize, (machine.fp_reg.get_reg(inst.rs1 as usize) == machine.fp_reg.get_reg(inst.rs2 as usize)) as i64);
},
RISCV_FP_FCMP_FLT => {
machine.int_reg.set_reg(inst.rd as usize, (machine.fp_reg.get_reg(inst.rs1 as usize) < machine.fp_reg.get_reg(inst.rs2 as usize)) as i64);
},
RISCV_FP_FCMP_FLE => {
machine.int_reg.set_reg(inst.rd as usize, (machine.fp_reg.get_reg(inst.rs1 as usize) <= machine.fp_reg.get_reg(inst.rs2 as usize)) as i64);
},
_ => {
panic!("this instruction ({}) doesn't exists", inst.value);
}
}
},
_ => {
panic!("this instruction ({}) doesn't exists", inst.value);
}
}
}
RISCV_SYSTEM => {
// temporary return value to stop the loop of run
// before we can use system call
return 1;
}
_ => { panic!("{:x} opcode non géré pc : {:x}", inst.opcode, machine.pc)},
// Treatment for: FLOATING POINT INSTRUCTIONS
RISCV_FP => self.fp_instruction(inst),
// Treatment for: SYSTEM CALLS
RISCV_SYSTEM => self.raise_exception(ExceptionType::SyscallException, self.pc, system),
// Default case
_ => Err(format!("{:x}: Unknown opcode\npc: {:x}", inst.opcode, self.pc))?
}
}
0
/// Treatement for Branch instructions
fn branch_instruction(&mut self, inst: Instruction) -> Result<MachineOk, MachineError> {
let op = match inst.funct3 {
RISCV_BR_BEQ => |a, b| a == b,
RISCV_BR_BNE => |a, b| a != b,
RISCV_BR_BLT => |a, b| a < b,
RISCV_BR_BGE => |a, b| a >= b,
RISCV_BR_BLTU => |a, b| a < b,
RISCV_BR_BGEU => |a, b| a >= b,
_ => Err(format!("Unreachable in branch_instruction match! Instruction was {:?}", inst))?
};
let rs1 = self.int_reg.get_reg(inst.rs1);
let rs2 = self.int_reg.get_reg(inst.rs2);
if op(rs1, rs2) {
self.pc = (self.pc as i64 + inst.imm13_signed as i64 - 4) as u64;
}
Ok(MachineOk::Ok)
}
/// Executes RISC-V Load Instructions on the machine
fn load_instruction(&mut self, inst: Instruction) -> Result<MachineOk, MachineError> {
let mut set_reg = |rd, size| {
let val = self.read_memory(size, (self.int_reg.get_reg(inst.rs1) + inst.imm12_I_signed as i64) as usize) as i64;
self.int_reg.set_reg(rd, val);
Ok(MachineOk::Ok)
};
match inst.funct3 {
RISCV_LD_LB | RISCV_LD_LBU => set_reg(inst.rd, 1),
RISCV_LD_LH | RISCV_LD_LHU => set_reg(inst.rd, 2),
RISCV_LD_LW | RISCV_LD_LWU => set_reg(inst.rd, 4),
RISCV_LD_LD => set_reg(inst.rd, 8),
_ => Err(format!("Unreachable in load_instruction match! Instruction was {:?}", inst))?
}
}
/// Executes RISC-V Store Instructions on the machine
fn store_instruction(&mut self, inst: Instruction) -> Result<MachineOk, MachineError> {
let mut store = |size| {
self.write_memory(
size,
(self.int_reg.get_reg(inst.rs1) + inst.imm12_S_signed as i64) as usize,
self.int_reg.get_reg(inst.rs2) as u64
);
Ok(MachineOk::Ok)
};
match inst.funct3 {
RISCV_ST_STB => store(1),
RISCV_ST_STH => store(2),
RISCV_ST_STW => store(4),
RISCV_ST_STD => store(8),
_ => Err(format!("Unreachable in store_instruction match! Instruction was {:?}", inst))?
}
}
/// Executes RISC-V Integer Register-Immediate Instructions on the machine
fn opi_instruction(&mut self, inst: Instruction) -> Result<MachineOk, MachineError> {
let rs1 = self.int_reg.get_reg(inst.rs1);
let imm12 = inst.imm12_I_signed as i64;
let shamt = inst.shamt as i64;
let mut compute = |operation: &dyn Fn (i64, i64) -> i64, a, b| {
self.int_reg.set_reg(inst.rd, operation(a, b));
Ok(MachineOk::Ok)
};
match inst.funct3 {
RISCV_OPI_ADDI => compute(&std::ops::Add::add, rs1, imm12),
RISCV_OPI_SLTI => compute(&|a, b| (a < b) as i64, rs1, imm12),
RISCV_OPI_XORI => compute(&core::ops::BitXor::bitxor, rs1, imm12),
RISCV_OPI_ORI => compute(&core::ops::BitOr::bitor, rs1, imm12),
RISCV_OPI_ANDI => compute(&core::ops::BitAnd::bitand, rs1, imm12),
RISCV_OPI_SLLI => compute(&core::ops::Shl::shl, rs1, imm12),
RISCV_OPI_SRI => if inst.funct7_smaller == RISCV_OPI_SRI_SRLI {
compute(&|a, b| { (a >> b) & self.shiftmask[inst.shamt as usize] as i64 }, rs1, shamt)
} else {
compute(&core::ops::Shr::shr, rs1, shamt)
}
_ => Err(format!("Unreachable in opi_instruction match! Instruction was {:?}", inst))?
}
}
/// Executes simple RISC-V mathematical operations on the machine
fn op_instruction(&mut self, inst: Instruction) -> Result<MachineOk, MachineError> {
let long_result: i128;
let unsigned_reg1: u64;
let unsigned_reg2: u64;
if inst.funct7 == 1 {
match inst.funct3 {
RISCV_OP_M_MUL => {
long_result = (self.int_reg.get_reg(inst.rs1) * self.int_reg.get_reg(inst.rs2)) as i128;
self.int_reg.set_reg(inst.rd, (long_result & 0xffffffffffffffff) as i64)
},
RISCV_OP_M_MULH => {
long_result = (self.int_reg.get_reg(inst.rs1) * self.int_reg.get_reg(inst.rs2)) as i128;
self.int_reg.set_reg(inst.rd, ((long_result >> 64) & 0xffffffffffffffff) as i64)
},
RISCV_OP_M_MULHSU => {
unsigned_reg2 = self.int_reg.get_reg(inst.rs2) as u64;
long_result = (self.int_reg.get_reg(inst.rs1) as u64 * unsigned_reg2) as i128;
self.int_reg.set_reg(inst.rd, ((long_result >> 64) & 0xffffffffffffffff) as i64)
},
RISCV_OP_M_MULHU => {
unsigned_reg1 = self.int_reg.get_reg(inst.rs1) as u64;
unsigned_reg2 = self.int_reg.get_reg(inst.rs2) as u64;
long_result = (unsigned_reg1 * unsigned_reg2) as i128;
self.int_reg.set_reg(inst.rd, ((long_result >> 64) & 0xffffffffffffffff) as i64);
},
RISCV_OP_M_DIV => self.int_reg.set_reg(inst.rd, self.int_reg.get_reg(inst.rs1) / self.int_reg.get_reg(inst.rs2)),
_ => Err(format!("Unreachable in op_instruction match! Instruction was {:?}", inst))?
}
} else {
match inst.funct3 {
RISCV_OP_ADD => if inst.funct7 == RISCV_OP_ADD_ADD {
self.int_reg.set_reg(inst.rd, self.int_reg.get_reg(inst.rs1) + self.int_reg.get_reg(inst.rs2))
} else {
self.int_reg.set_reg(inst.rd, self.int_reg.get_reg(inst.rs1) - self.int_reg.get_reg(inst.rs2))
},
RISCV_OP_SLL => self.int_reg.set_reg(inst.rd, self.int_reg.get_reg(inst.rs1) << (self.int_reg.get_reg(inst.rs2) & 0x3f)),
RISCV_OP_SLT => if self.int_reg.get_reg(inst.rs1) < self.int_reg.get_reg(inst.rs2) {
self.int_reg.set_reg(inst.rd, 1)
} else {
self.int_reg.set_reg(inst.rd, 0)
},
RISCV_OP_SLTU => {
unsigned_reg1 = self.int_reg.get_reg(inst.rs1) as u64;
unsigned_reg2 = self.int_reg.get_reg(inst.rs2) as u64;
if unsigned_reg1 < unsigned_reg2 {
self.int_reg.set_reg(inst.rd, 1)
} else {
self.int_reg.set_reg(inst.rd, 0)
}
},
RISCV_OP_XOR => self.int_reg.set_reg(inst.rd, self.int_reg.get_reg(inst.rs1) ^ self.int_reg.get_reg(inst.rs2)),
RISCV_OP_SR => self.int_reg.set_reg(inst.rd, self.int_reg.get_reg(inst.rs1) >> self.int_reg.get_reg(inst.rs2)), // RISCV_OP_SR_SRL inaccessible
RISCV_OP_OR => self.int_reg.set_reg(inst.rd, self.int_reg.get_reg(inst.rs1) | self.int_reg.get_reg(inst.rs2)),
RISCV_OP_AND => self.int_reg.set_reg(inst.rd, self.int_reg.get_reg(inst.rs1) & self.int_reg.get_reg(inst.rs2)),
_ => Err(format!("Unreachable in op_instruction match! Instruction was {:?}", inst))?
}
}
Ok(MachineOk::Ok)
}
/// Exectutes simple RISC-V *iw instructions on the machine
fn opiw_instruction(&mut self, inst: Instruction) -> Result<MachineOk, MachineError> {
let local_data = self.int_reg.get_reg(inst.rs1);
let result = match inst.funct3 {
RISCV_OPIW_ADDIW => local_data + inst.imm12_I_signed as i64,
RISCV_OPIW_SLLIW => local_data << inst.shamt,
RISCV_OPIW_SRW => (local_data >> inst.shamt) & if inst.funct7 == RISCV_OPIW_SRW_SRLIW { self.shiftmask[32 + inst.shamt as usize] as i64 } else { 1 },
_ => Err(format!("Unreachable in op_instruction match! Instruction was {:?}", inst))?
};
self.int_reg.set_reg(inst.rd, result);
Ok(MachineOk::Ok)
}
/// Executes simple RISC-V *w instructions on the machine
fn opw_instruction(&mut self, inst: Instruction) -> Result<MachineOk, MachineError> {
if inst.funct7 == 1 { // rv64m
let local_data_a = self.int_reg.get_reg(inst.rs1) & 0xffffffff;
let local_data_b = self.int_reg.get_reg(inst.rs2) & 0xffffffff;
let local_data_a_unsigned = self.int_reg.get_reg(inst.rs1) & 0xffffffff;
let local_data_b_unsigned = self.int_reg.get_reg(inst.rs2) & 0xffffffff;
// Match case for multiplication operations (in standard extension RV32M)
match inst.funct3 {
RISCV_OPW_M_MULW => self.int_reg.set_reg(inst.rd, local_data_a * local_data_b),
RISCV_OPW_M_DIVW => self.int_reg.set_reg(inst.rd, local_data_a / local_data_b),
RISCV_OPW_M_DIVUW => self.int_reg.set_reg(inst.rd, local_data_a_unsigned / local_data_b_unsigned),
RISCV_OPW_M_REMW => self.int_reg.set_reg(inst.rd, local_data_a % local_data_b),
RISCV_OPW_M_REMUW => self.int_reg.set_reg(inst.rd, local_data_a_unsigned % local_data_b_unsigned),
_ => Err(format!("Unreachable in opw_instruction match! Instruction was {:?}", inst))?
}
} else { // others rv64 OPW operations
let local_dataa = self.int_reg.get_reg(inst.rs1) & 0xffffffff;
let local_datab = self.int_reg.get_reg(inst.rs2) & 0xffffffff;
// Match case for base OP operation
match inst.funct3 {
RISCV_OPW_ADDSUBW => if inst.funct7 == RISCV_OPW_ADDSUBW_ADDW {
self.int_reg.set_reg(inst.rd, local_dataa + local_datab);
} else { // SUBW
self.int_reg.set_reg(inst.rd, local_dataa - local_datab);
},
RISCV_OPW_SLLW => self.int_reg.set_reg(inst.rd, local_dataa << (local_datab & 0x1f)),
RISCV_OPW_SRW => if inst.funct7 == RISCV_OPW_SRW_SRLW {
self.int_reg.set_reg(inst.rd, local_dataa >> (local_datab & 0x1f) & self.shiftmask[32 + local_datab as usize] as i64)
} else { // SRAW
self.int_reg.set_reg(inst.rd, local_dataa >> (local_datab & 0x1f))
},
_ => Err(format!("Unreachable in opw_instruction match! Instruction was {:?}", inst))?
}
}
Ok(MachineOk::Ok)
}
/// Executes simple RISC-V floating point instructions on the machine.
///
/// See Risc-V Spec v2.2 Chapter 8: “F” Standard Extension for Single-Precision Floating-Point, Version 2.0.
fn fp_instruction(&mut self, inst: Instruction) -> Result<MachineOk, MachineError> {
let mut set_reg = |operation: &dyn Fn (f32, f32) -> f32| {
let a = self.fp_reg.get_reg(inst.rs1);
let b = self.fp_reg.get_reg(inst.rs2);
self.fp_reg.set_reg(inst.rd, operation(a, b));
Ok(MachineOk::Ok)
};
match inst.funct7 {
RISCV_FP_ADD => set_reg(&core::ops::Add::add),
RISCV_FP_SUB => set_reg(&core::ops::Sub::sub),
RISCV_FP_MUL => set_reg(&core::ops::Mul::mul),
RISCV_FP_DIV => set_reg(&core::ops::Div::div),
RISCV_FP_SQRT => { self.fp_reg.set_reg(inst.rd, self.fp_reg.get_reg(inst.rs1).sqrt()); Ok(MachineOk::Ok) },
RISCV_FP_FSGN => self.fp_fsgn_instruction(inst),
RISCV_FP_MINMAX => self.fp_minmax_instruction(inst),
RISCV_FP_FCVTW => self.fp_fcvtw_instruction(inst),
RISCV_FP_FCVTS => self.fp_fcvts_instruction(inst),
RISCV_FP_FMVW => self.fp_fmvw_instruction(inst),
RISCV_FP_FMVXFCLASS => self.fp_fmvxfclass_instruction(inst),
RISCV_FP_FCMP => self.fp_fcmp_instruction(inst),
_ => Err(format!("Unreachable in fp_instruction match! Instruction was {:?}", inst))?
}
}
/// Executes RISC-V sign-injection instruction on floating point values on the machine.
fn fp_fsgn_instruction(&mut self, inst: Instruction) -> Result<MachineOk, MachineError> {
let local_float = self.fp_reg.get_reg(inst.rs1);
match inst.funct3 {
RISCV_FP_FSGN_J => if self.fp_reg.get_reg(inst.rs2) < 0f32 {
self.fp_reg.set_reg(inst.rd, -local_float);
} else {
self.fp_reg.set_reg(inst.rd, local_float);
},
RISCV_FP_FSGN_JN => if self.fp_reg.get_reg(inst.rs2) < 0f32 {
self.fp_reg.set_reg(inst.rd, local_float);
} else {
self.fp_reg.set_reg(inst.rd, -local_float);
},
RISCV_FP_FSGN_JX => if (self.fp_reg.get_reg(inst.rs2) < 0.0 && self.fp_reg.get_reg(inst.rs1) >= 0.0) ||
(self.fp_reg.get_reg(inst.rs2) >= 0.0 && self.fp_reg.get_reg(inst.rs1) < 0.0) {
self.fp_reg.set_reg(inst.rd, -local_float);
} else {
self.fp_reg.set_reg(inst.rd, local_float);
},
_ => Err(format!("Unreachable in fp_fsgn_instruction! Instruction was {:?}", inst))?
}
Ok(MachineOk::Ok)
}
/// Executes RISC-V min / max instruction on floating point values on the machine.
fn fp_minmax_instruction(&mut self, inst: Instruction) -> Result<MachineOk, MachineError> {
let r1 = self.fp_reg.get_reg(inst.rs1);
let r2 = self.fp_reg.get_reg(inst.rs2);
match inst.funct3 {
RISCV_FP_MINMAX_MIN => self.fp_reg.set_reg(inst.rd, if r1 < r2 {r1} else {r2}),
RISCV_FP_MINMAX_MAX => self.fp_reg.set_reg(inst.rd, if r1 > r2 {r1} else {r2}),
_ => Err(format!("Unreachable in fp_minmax_instruction! Instruction was {:?}", inst))?
};
Ok(MachineOk::Ok)
}
/// Executes RISC-V floating-point to integer conversion instruction on the machine.
fn fp_fcvtw_instruction(&mut self, inst: Instruction) -> Result<MachineOk, MachineError> {
if inst.rs2 == RISCV_FP_FCVTW_W {
self.int_reg.set_reg(inst.rd, self.fp_reg.get_reg(inst.rs1) as i64)
} else {
self.int_reg.set_reg(inst.rd, (self.fp_reg.get_reg(inst.rs1) as u64) as i64)
}
Ok(MachineOk::Ok)
}
/// Executes RISC-V integer to floating-point conversion instruction on the machine.
fn fp_fcvts_instruction(&mut self, inst: Instruction) -> Result<MachineOk, MachineError> {
if inst.rs2 == RISCV_FP_FCVTS_W {
self.fp_reg.set_reg(inst.rd, self.int_reg.get_reg(inst.rs1) as f32);
} else {
self.fp_reg.set_reg(inst.rd, (self.int_reg.get_reg(inst.rs1) as u32) as f32);
}
Ok(MachineOk::Ok)
}
/// Executes RISC-V move from int_reg to fp_reg instruction on the machine.
fn fp_fmvw_instruction(&mut self, inst: Instruction) -> Result<MachineOk, MachineError> {
self.fp_reg.set_reg(inst.rd, self.int_reg.get_reg(inst.rs1) as f32);
Ok(MachineOk::Ok)
}
/// Executes RISC-V move from fp_reg to int_reg instruction on the machine.
fn fp_fmvxfclass_instruction(&mut self, inst: Instruction) -> Result<MachineOk, MachineError> {
if inst.funct3 == RISCV_FP_FMVXFCLASS_FMVX {
self.int_reg.set_reg(inst.rd, self.fp_reg.get_reg(inst.rs1) as i64);
Ok(MachineOk::Ok)
} else {
Err(format!("Unreachable in fp_fmvxfclass_instruction! Instruction was {:?}", inst))?
}
}
/// Executes RISC-V floating point values comparaison instructions on the machine.
fn fp_fcmp_instruction(&mut self, inst: Instruction) -> Result<MachineOk, MachineError> {
match inst.funct3 {
RISCV_FP_FCMP_FEQ => self.int_reg.set_reg(inst.rd, (self.fp_reg.get_reg(inst.rs1) == self.fp_reg.get_reg(inst.rs2)) as i64),
RISCV_FP_FCMP_FLT => self.int_reg.set_reg(inst.rd, (self.fp_reg.get_reg(inst.rs1) < self.fp_reg.get_reg(inst.rs2)) as i64),
RISCV_FP_FCMP_FLE => self.int_reg.set_reg(inst.rd, (self.fp_reg.get_reg(inst.rs1) <= self.fp_reg.get_reg(inst.rs2)) as i64),
_ => Err(format!("Unreachable in fp_fcmp_instruction match! Instruction was {:?}", inst))?
}
Ok(MachineOk::Ok)
}
/// print memory FOR DEBUG
///
/// "@"adresse [16 bytes]
pub fn _print_memory(machine : &mut Machine, from: usize, to: usize) {
/// "@"adress [16 bytes]
pub fn print_memory(&self, from: usize, to: usize) {
for i in from..to {
if i%16 == 0 {
print!("\n@{:04x} ", i);
}
print!("{:02x}", machine.main_memory[i]);
print!("{:02x}", self.main_memory[i]);
}
println!();
}
/// Get value from int register
pub fn read_int_register(&self, index: usize) -> i64 {
self.int_reg.get_reg(index as u8)
}
/// Get value from float register
pub fn read_fp_register(&self, index: usize) -> f32 {
self.fp_reg.get_reg(index as u8)
}
/// Write into int register
pub fn write_int_register(&mut self, index: usize, value: i64) {
self.int_reg.set_reg(index as u8, value);
}
/// Write info float register
pub fn write_fp_register(&mut self, index: usize, value: f32) {
self.fp_reg.set_reg(index as u8, value);
}
pub fn get_status(&self) -> MachineStatus {
todo!()
}
pub fn set_status(&mut self, new_status: MachineStatus) {
self.status = new_status;
}
}
#[cfg(test)]
mod test {
use std::fs;
use crate::simulator::{machine::Machine, mem_cmp};
use crate::utility::cfg::get_debug_configuration;
macro_rules! get_full_path {
($prefix: expr, $test_name:expr) => {{
let mut s = String::from("test/machine/");
s.push_str($prefix);
s.push_str($test_name);
s.push_str(".txt");
&s.to_owned()
}}
}
macro_rules! init_test {
($a:expr) => {{
let mut m = Machine::new(true, get_debug_configuration());
let end_file_name = { let mut s = String::from($a); s.push_str("End"); s };
let memory_before = mem_cmp::MemChecker::from(get_full_path!("memory", $a)).unwrap();
let memory_after = mem_cmp::MemChecker::from(get_full_path!("memory", &end_file_name)).unwrap();
mem_cmp::MemChecker::fill_memory_from_mem_checker(&memory_before, &mut m);
let mut system = crate::kernel::system::System::new(true);
m._run_debug(&mut system);
let expected_trace = fs::read_to_string(get_full_path!("reg_trace", $a)).unwrap();
assert!(mem_cmp::MemChecker::compare_machine_memory(&memory_after, &m));
assert!(expected_trace.contains(m.registers_trace.as_str()));
}};
}
#[test]
fn test_init_machine() {
let _ = Machine::new(true, get_debug_configuration());
}
#[test]
fn test_read_memory() {
let mut m = Machine::_init_machine();
let mut m = Machine::new(true, get_debug_configuration());
m.main_memory[4] = 43;
m.main_memory[5] = 150;
assert_eq!((43 << 8) + 150, Machine::read_memory(&mut m, 2, 4));
assert_eq!((43 << 8) + 150, m.read_memory(2, 4));
}
#[test]
fn test_write_memory() {
let mut m = Machine::_init_machine();
Machine::write_memory(&mut m, 2, 6, (43 << 8) + 150);
let mut m = Machine::new(true, get_debug_configuration());
m.write_memory(2, 6, (43 << 8) + 150);
assert_eq!(43, m.main_memory[6]);
assert_eq!(150, m.main_memory[7]);
Machine::write_memory(&mut m, 4, 8, (52 << 24) + (20 << 16) + (43 << 8) + 150);
m.write_memory(4, 8, (52 << 24) + (20 << 16) + (43 << 8) + 150);
assert_eq!(52, m.main_memory[8]);
assert_eq!(20, m.main_memory[9]);
assert_eq!(43, m.main_memory[10]);
@ -700,137 +762,46 @@ mod test {
#[test]
fn test_comp() {
let mut m = Machine::_init_machine();
let path_before = "memoryComp.txt".to_string();
let path_after = "memoryCompEnd.txt".to_string();
let memory_before = mem_cmp::MemChecker::from(&path_before);
let memory_after = mem_cmp::MemChecker::from(&path_after);
mem_cmp::MemChecker::fill_memory_from_mem_checker(&memory_before, &mut m);
Machine::run(&mut m);
init_test!("Comp")
}
let path_trace = "memoryCompTrace.txt".to_string();
let expected_trace = fs::read_to_string(path_trace).unwrap();
assert!(mem_cmp::MemChecker::compare_machine_memory(&memory_after, &m));
assert!(expected_trace.contains(m.registers_trace.as_str()));
#[test]
fn test_add() {
init_test!("Add")
}
#[test]
fn test_div() {
let mut m = Machine::_init_machine();
let path_before = "memoryDiv.txt".to_string();
let path_after = "memoryDivEnd.txt".to_string();
let memory_before = mem_cmp::MemChecker::from(&path_before);
let memory_after = mem_cmp::MemChecker::from(&path_after);
mem_cmp::MemChecker::fill_memory_from_mem_checker(&memory_before, &mut m);
Machine::run(&mut m);
let path_trace = "memoryDivTrace.txt".to_string();
let expected_trace = fs::read_to_string(path_trace).unwrap();
assert!(mem_cmp::MemChecker::compare_machine_memory(&memory_after, &m));
assert!(expected_trace.contains(m.registers_trace.as_str()));
init_test!("Div")
}
#[test]
fn test_if() {
let mut m = Machine::_init_machine();
let path_before = "memoryIf.txt".to_string();
let path_after = "memoryIfEnd.txt".to_string();
let memory_before = mem_cmp::MemChecker::from(&path_before);
let memory_after = mem_cmp::MemChecker::from(&path_after);
mem_cmp::MemChecker::fill_memory_from_mem_checker(&memory_before, &mut m);
Machine::run(&mut m);
let path_trace = "memoryIfTrace.txt".to_string();
let expected_trace = fs::read_to_string(path_trace).unwrap();
assert!(mem_cmp::MemChecker::compare_machine_memory(&memory_after, &m));
assert!(expected_trace.contains(m.registers_trace.as_str()));
init_test!("If")
}
#[test]
fn test_jump() {
let mut m = Machine::_init_machine();
let path_before = "memoryJump.txt".to_string();
let path_after = "memoryJumpEnd.txt".to_string();
let memory_before = mem_cmp::MemChecker::from(&path_before);
let memory_after = mem_cmp::MemChecker::from(&path_after);
mem_cmp::MemChecker::fill_memory_from_mem_checker(&memory_before, &mut m);
Machine::run(&mut m);
let path_trace = "memoryJumpTrace.txt".to_string();
let expected_trace = fs::read_to_string(path_trace).unwrap();
assert!(mem_cmp::MemChecker::compare_machine_memory(&memory_after, &m));
assert!(expected_trace.contains(m.registers_trace.as_str()));
init_test!("Jump")
}
#[test]
fn test_mul() {
let mut m = Machine::_init_machine();
let path_before = "memoryMul.txt".to_string();
let path_after = "memoryMulEnd.txt".to_string();
let memory_before = mem_cmp::MemChecker::from(&path_before);
let memory_after = mem_cmp::MemChecker::from(&path_after);
mem_cmp::MemChecker::fill_memory_from_mem_checker(&memory_before, &mut m);
Machine::run(&mut m);
let path_trace = "memoryMulTrace.txt".to_string();
let expected_trace = fs::read_to_string(path_trace).unwrap();
assert!(mem_cmp::MemChecker::compare_machine_memory(&memory_after, &m));
assert!(expected_trace.contains(m.registers_trace.as_str()));
init_test!("Mult")
}
#[test]
fn test_ret() {
let mut m = Machine::_init_machine();
let path_before = "memoryRet.txt".to_string();
let path_after = "memoryRetEnd.txt".to_string();
let memory_before = mem_cmp::MemChecker::from(&path_before);
let memory_after = mem_cmp::MemChecker::from(&path_after);
mem_cmp::MemChecker::fill_memory_from_mem_checker(&memory_before, &mut m);
Machine::run(&mut m);
let path_trace = "memoryRetTrace.txt".to_string();
let expected_trace = fs::read_to_string(path_trace).unwrap();
assert!(mem_cmp::MemChecker::compare_machine_memory(&memory_after, &m));
assert!(expected_trace.contains(m.registers_trace.as_str()));
init_test!("Ret")
}
#[test]
fn test_sub() {
let mut m = Machine::_init_machine();
let path_before = "memorySub.txt".to_string();
let path_after = "memorySubEnd.txt".to_string();
let memory_before = mem_cmp::MemChecker::from(&path_before);
let memory_after = mem_cmp::MemChecker::from(&path_after);
mem_cmp::MemChecker::fill_memory_from_mem_checker(&memory_before, &mut m);
Machine::run(&mut m);
let path_trace = "memorySubTrace.txt".to_string();
let expected_trace = fs::read_to_string(path_trace).unwrap();
assert!(mem_cmp::MemChecker::compare_machine_memory(&memory_after, &m));
assert!(expected_trace.contains(m.registers_trace.as_str()));
init_test!("Sub")
}
#[test]
fn test_switch() {
let mut m = Machine::_init_machine();
let path_before = "memorySwitch.txt".to_string();
let path_after = "memorySwitchEnd.txt".to_string();
let memory_before = mem_cmp::MemChecker::from(&path_before);
let memory_after = mem_cmp::MemChecker::from(&path_after);
mem_cmp::MemChecker::fill_memory_from_mem_checker(&memory_before, &mut m);
Machine::run(&mut m);
let path_trace = "memorySwitchTrace.txt".to_string();
let expected_trace = fs::read_to_string(path_trace).unwrap();
assert!(mem_cmp::MemChecker::compare_machine_memory(&memory_after, &m));
assert!(expected_trace.contains(m.registers_trace.as_str()));
init_test!("Switch")
}
}

View File

@ -1,88 +1,69 @@
use std::fs;
use std::io::BufRead;
use std::io::BufReader;
use std::io::Lines;
///! FILE.TXT FORMAT Representing machine memory memory
/// - PC
/// - SP
/// - Section_1
/// - Section_2
/// - ...
/// - Section_n
///
/// Each section is divided in 3 parts, on two lines of text
/// addr SPACE len
/// content
use std::{fs, io::{BufRead, BufReader, Lines, Error}};
use crate::Machine;
const MEM_SIZE : usize = 4096;
/* TRUCS MANQUANTS
* Verifier qu'il y a un nombre pair de caractere hexa dans la ligne correspondante d'une section du fichier source
* Sinon on ne peut pas automatiquement remplir chaque octect car 2 hexa = 1 octet
*/
/* FORMAT FICHIER.TXT Représentant la mémoire apres éxecution d'un prog
* PC
* SP
* Section_1
* Section_2
* ...
* ...
* Section_n
*/
/* Chaque section se divise en 3 parties, sur 2 lignes de texte
* addr ESPACE len
* content
*/
//content est une suite hexadécimale
//Section dans le fichier, champ String car informations proviennent d'un fichier txt
/// File section
pub struct SectionFormat{
/// Memory address of the section
addr: String,
/// The size of data in bytes
len: String,
/// The data itself in Hexadecimal format
content: String,
}
//Section dans le programme
/// # Memory section
///
/// Representation of a section of memory from BurritOS or NachOS
pub struct Section{
addr: usize, // adresse dans la mémoire
len: usize, // nombre d'octets de la donnée à addr
content: Vec<u8>, // la donnée en question
/// Memory address of the section
addr: usize,
/// The size of data in bytes
len: usize,
/// The data itself in Hexadecimal format
content: Vec<u8>
}
/*
* Voir si instanciation d'une structure deplace les valeurs "locales" à la méthode from, je sais plus ....
*/
impl Section{
impl Section {
/// Creates a memory section from a SectionFormat
fn from(section: &SectionFormat) -> Section {
let mut content: Vec<u8> = Vec::new();
let addr: usize = string_hex_to_usize(&section.addr);
let len: usize = string_hex_to_usize(&section.len);
let mut tmp_a: char = ' ';
for (i, c) in section.content.chars().enumerate(){
if i%2 == 0 {
tmp_a = c;
}
else {
content.push(two_hex_to_u8(tmp_a,c));
}
}
let addr = usize::from_str_radix(&section.addr, 16).unwrap_or_default();
let len = usize::from_str_radix(&section.len, 16).unwrap_or_default();
let content: Vec<u8> = section.content.as_bytes().chunks(2).map(|x| {
u8::from_str_radix(std::str::from_utf8(x).unwrap_or_default(), 16).unwrap_or_default()
}).collect();
Section{addr, len, content}
}
/// Pretty prints a memory section
fn print_section(s: &Section){
println!("ADDR :: {:x}", s.addr);
println!("LEN :: {:x}", s.len);
println!("CONTENT :: {:?}", s.content);
println!("ADDR :: {:x}\nLEN :: {:x}\nCONTENT :: {:?}", s.addr, s.len, s.content);
}
}
/*
* Representation de l'etat de la mémoire (apres execution.... a confirmer), sous forme de sections
*/
pub struct MemChecker{
/// # Representation of the state of machine memory
///
/// Could represent memory at any point in time, before, during, or after execution.
/// The memory is split into sections.
pub struct MemChecker {
/// Value of the program counter
pc: usize,
/// Value of the stack pointer
sp: usize,
/// Sections
sections: Vec<Section>,
}
@ -104,8 +85,8 @@ impl MemChecker{
vector.push(line.unwrap());
}
let size = vector.len();
*pc = string_hex_to_usize(vector.get(size - 2).expect("0"));
*sp = string_hex_to_usize(vector.get(size - 1).expect("0"));
*pc = usize::from_str_radix(vector.get(size - 2).expect("0"), 16).unwrap_or_default();
*sp = usize::from_str_radix(vector.get(size - 1).expect("0"), 16).unwrap_or_default();
vector
}
@ -117,9 +98,9 @@ impl MemChecker{
///
/// ### Return
/// Mem-checker filled
pub fn from(path: &String) -> MemChecker {
pub fn from(path: &str) -> Result<MemChecker, Error> {
let file = fs::File::open(path).expect("Wrong filename");
let file = fs::File::open(path)?;
let reader = BufReader::new(file);
let mut lines = reader.lines();
@ -155,7 +136,7 @@ impl MemChecker{
}
MemChecker{pc, sp, sections}
Ok(MemChecker{pc, sp, sections})
}
@ -187,9 +168,7 @@ impl MemChecker{
machine.int_reg.set_reg(2, m_c.sp as i64);
machine.pc = m_c.pc as u64;
for section in m_c.sections.iter() {
for (i,b) in section.content.iter().enumerate() {
machine.main_memory[section.addr + i] = *b;
}
@ -197,20 +176,13 @@ impl MemChecker{
}
/*
* FOR DEBUG
*/
/// For debug
fn compare_print_m_c_machine(m_c: &MemChecker, machine: &mut Machine){
MemChecker::print_mem_checker(m_c);
for section in m_c.sections.iter() {
print!("\n\n");
println!("Content addr : {}", section.addr);
println!("Content len (number of bytes) : {}", section.len);
for i in 0..section.len {
println!("mem[{}] = {}", section.addr + i, machine.main_memory[section.addr + i]);
}
@ -232,94 +204,18 @@ impl MemChecker{
}
fn string_hex_to_usize(s: &String) -> usize {
if s.is_empty() {
return 0;
}
let max_pow = (s.len()-1) as u32;
let mut ret_value: usize = 0;
let base: usize = 16;
for (i,c )in s.chars().enumerate(){
//println!("Current char :: {} :: Current pow :: {} ::", c, max_pow - (i as u32));
let tmp: usize = one_hex_to_dec(c) as usize;
ret_value += base.pow(max_pow - (i as u32))*tmp;
}
ret_value
}
/*
* c doit etre un caractère hexadécimale
*/
fn one_hex_to_dec(c: char) -> u8 {
match c {
'A' | 'a' => 10,
'B' | 'b' => 11,
'C' | 'c' => 12,
'D' | 'd' => 13,
'E' | 'e' => 14,
'F' | 'f' => 15,
_ => {
c.to_digit(10).unwrap() as u8
},
}
}
fn two_hex_to_u8(c1: char, c2: char) -> u8 {
let a = one_hex_to_dec(c1);
let b = one_hex_to_dec(c2);
16*a + b
}
/*
* Juste pour voir si via BufReader les \n sont présent, apres test il s'avère que non
* De toute facon on limitera d'une section la lecture par len
*/
fn test_show_sections_file(){
let file = fs::File::open("test_file_section.txt").expect("Wrong filename");
let reader = BufReader::new(file);
for line in reader.lines() {
//println!("Tailles de la ligne : {}",
let current = line.unwrap();
//println!("Taille de la ligne : {}", current.len()); // En effet pas de \n dans chaque line, parfait
println!("{}", &current);
}
}
#[cfg(test)]
mod tests {
use crate::utility::cfg::get_debug_configuration;
use super::*;
#[test]
fn test_fill_memory(){
let path = "osef".to_string();
let m_c = MemChecker::from(&path);
let mut machine = Machine::_init_machine();
let m_c = MemChecker::from("test/machine/memoryAdd.txt").unwrap();
let mut machine = Machine::new(true, get_debug_configuration());
MemChecker::fill_memory_from_mem_checker(&m_c, &mut machine);
print!("\n Comparing memory from loaded context\n\n");
MemChecker::compare_print_m_c_machine(&m_c, &mut machine);
}
#[test]
@ -333,28 +229,10 @@ mod tests {
#[test]
fn test_create_mem_checker(){
let path: String = "osef".to_string();
let m_c = MemChecker::from(&path);
let m_c = MemChecker::from("test/machine/memoryAdd.txt").unwrap();
MemChecker::print_mem_checker(&m_c);
}
#[test]
fn test_string_hex_to_usize(){
let s = String::from("AE1F20");
//println!("taille de string : {}", s.len());
let expected: usize = 11411232;
let result = string_hex_to_usize(&s);
assert_eq!(expected,result);
}
#[test]
fn tmp_fct_read_file(){
println!("Reading A file \n");
test_show_sections_file();
}
#[test]
fn test_create_section_content(){
let section_format = SectionFormat{
@ -362,43 +240,9 @@ mod tests {
len: "0".to_string(),
content: "00FF0AA0A5".to_string(),
};
let section = Section::from(&section_format);
let expected_vec: Vec<u8> = vec![0u8, 255u8, 10u8, 160u8, 165u8];
//println!("Vec from created section {:?}", &section.content);
//println!("Expected vec {:?}", &expected_vec);
assert_eq!(section.content, expected_vec);
}
#[test]
fn test_hex_1(){
let b = two_hex_to_u8('0', '0');
assert_eq!(0u8, b);
}
#[test]
fn test_hex_2(){
let b = two_hex_to_u8('F', 'F');
assert_eq!(255u8, b);
}
#[test]
fn test_hex_3(){
let b = two_hex_to_u8('0', 'A');
assert_eq!(10u8, b);
}
#[test]
fn test_hex_4(){
let b = two_hex_to_u8('A', '0');
assert_eq!(160u8, b);
}
#[test]
fn test_hex_5(){
let b = two_hex_to_u8('A', '5');
assert_eq!(165u8, b);
}
}

159
src/simulator/mmu.rs Normal file
View File

@ -0,0 +1,159 @@
use crate::simulator::translationtable::*;
use crate::simulator::machine::*;
pub struct MMU <'a>{
/* Un MMU possède une seule référence vers une table des pages à un instant donné
* Cette table est associée au processus courant
* Cette référence peut etre mise a jour par exemple lors d'un switchTo
*/
translationTable : Option<&'a mut TranslationTable>,
numPhyPages : u64,
pageSize : u64
}
impl <'a>MMU <'_>{
fn create(numPhyPages: u64, pageSize: u64) -> MMU <'a>{
MMU {
translationTable : None,
numPhyPages,
pageSize
}
}
pub fn mmu_read_mem(mmu : &mut MMU, machine : &mut Machine, virt_addr : u64, value : &mut u64, size : i32) -> bool {
//Pour plus tard eventuellement considerer le boutisme de notre mémoire
//Peut etre pas si on fixe cela en BIG ENDIAN (octects poids fort au debut)
let mut phy_addr : u64 = 0;
let mut phy_addr_double_check : u64 = 0;
let exc = MMU::translate(mmu, virt_addr, &mut phy_addr, false);
MMU::translate(mmu, virt_addr, &mut phy_addr_double_check, false);
match exc {
ExceptionType::NoException => {
if phy_addr != phy_addr_double_check {
//Besoin ici d'une impl pour gestion d'exeption
//dans nachos : g-machine->RaiseException(exc, virt_addr);
println!("Error from mmu_read_mem :: phy_addr != phy_addr_double_check");
return false;
}
else {
*value = Machine::read_memory(machine, size, phy_addr as usize);
return true;
}
}
_ => {
//Besoin ici d'une impl pour gestion d'exeption
//dans nachos : g-machine->RaiseException(exc, virt_addr);
println!("Error from mmu_read_mem :: Exception different from NoException");
return false;
}
}
true
}
pub fn mmu_write_mem(mmu : &mut MMU, machine : &mut Machine, virt_addr : u64, value : u64, size : i32) -> bool {
//Pour plus tard eventuellement considerer le boutisme de notre mémoire
//Peut etre pas si on fixe cela en BIG ENDIAN (octects poids fort au debut)
let mut phy_addr : u64 = 0;
let mut phy_addr_double_check : u64 = 0;
let exc = MMU::translate(mmu, virt_addr, &mut phy_addr, true);
MMU::translate(mmu, virt_addr, &mut phy_addr_double_check, true);
match exc {
ExceptionType::NoException => {
if phy_addr != phy_addr_double_check {
//Besoin ici d'une impl pour gestion d'exeption
//dans nachos : g-machine->RaiseException(exc, virt_addr);
println!("Error from mmu_write_mem :: phy_addr != phy_addr_double_check");
return false;
}
else {
Machine::write_memory(machine, size, phy_addr as usize, value);
return true;
}
}
_ => {
//Besoin ici d'une impl pour gestion d'exeption
//dans nachos : g-machine->RaiseException(exc, virt_addr);
println!("Error from mmu_write_mem :: Exception different from NoException");
return false;
}
}
true
}
pub fn translate(mmu : &mut MMU, virtAddr : u64, physAddr : &mut u64, writing : bool) -> ExceptionType {
let vpn : u64 = virtAddr/(mmu.pageSize); //virtual page index
let offset : u64 = virtAddr%(mmu.pageSize); //adresse intra page
match &mut mmu.translationTable {
None => {
println!("Error from translate : MMU refers to None (No page Table)");
return ExceptionType::AddressErrorException;
}
Some(table_ref) => {
//On verifie que notre index est valide
if vpn >= table_ref.get_max_num_pages(){
println!("Error from translate :: index is out of bound");
return ExceptionType::AddressErrorException;
}
/*Doc nachos dit que ce test sert a savoir si la page est mappée
*On teste les droit de lecture ecriture sur cette page
*A confirmer avc isabelle
*/
if !table_ref.get_bit_read(vpn) && !table_ref.get_bit_write(vpn) {
println!("Error from translate :: virtual page # {} not mapped",vpn);
return ExceptionType::AddressErrorException;
}
//si on souhaite effectuer un acces lecture, on verifie que l'on dispose du droit d'acces sur cette page
if writing && !table_ref.get_bit_write(vpn) {
println!("Error from translate :: write access on a read only virtual page # {}",vpn);
return ExceptionType::AddressErrorException;
}
//if the page is not yet in main memory, run the page fault manager
//Page manager not implemented yet
if !table_ref.get_bit_valid(vpn){
println!("Error from translate :: no valid correspondance");
println!("We need to update the page table by raising an exception -> not implemented");
//Ici il faudra reverifier le bit valid apres intervention du page fault manager
return ExceptionType::AddressErrorException;
}
//Make sure that the physical adress is correct
if table_ref.get_physical_page(vpn) < 0 || table_ref.get_physical_page(vpn) >= (mmu.numPhyPages as i32) {
println!("Error from translate :: no valid correspondance");
return ExceptionType::BusErrorException;
}
//Set U/M bits to 1
if writing {
table_ref.set_bit_M(vpn);
}
table_ref.set_bit_U(vpn);
//on se permet ici la conversion du champs physical_page de i32 vers u64
//si cette valeur avait été signée, cela aurait été detecté juste au dessus, renvoyant une BUSERROR_EXCEPTION
*physAddr = (table_ref.get_physical_page(vpn) as u64)*(mmu.pageSize) + offset;
}
}
ExceptionType::NoException
}
}

View File

@ -1,9 +1,14 @@
pub mod machine;
pub mod decode;
pub mod print;
pub mod error;
pub mod instruction;
pub mod mem_cmp;
pub mod loader;
pub mod interrupt;
pub mod translationtable;
pub mod mmu;
pub mod register;
/// Definition of global constants
pub mod global {
#![allow(dead_code)]
@ -49,15 +54,15 @@ pub mod global {
///
/// See func3 to know the type of instruction (LD, LW, LH, LB, LWU, LHU, LBU)
pub const RISCV_LD: u8 = 0x3;
// Store instructions
/// Store instructions
pub const RISCV_ST: u8 = 0x23;
// immediate Arithmetic operations
/// immediate Arithmetic operations
pub const RISCV_OPI: u8 = 0x13;
// Arithmetic operations
/// Arithmetic operations
pub const RISCV_OP: u8 = 0x33;
/// Immediate arithmetic operations for rv64i
pub const RISCV_OPIW: u8 = 0x1b;
// Arithmetic operations for rv64i
/// Arithmetic operations for rv64i
pub const RISCV_OPW: u8 = 0x3b;
/// Type: B

View File

@ -1,414 +0,0 @@
#![allow(dead_code)]
use super::decode::{Instruction};
use super::global::*;
const NAMES_OP: [&str; 8] = ["add", "sll", "slt", "sltu", "xor", "sr", "or", "and"];
const NAMES_OPI: [&str; 8] = ["addi", "slli", "slti", "sltiu", "xori", "slri", "ori", "andi"];
const NAMES_MUL: [&str; 8] = ["mul", "mulh", "mulhsu", "mulhu", "div", "divu", "rem", "remu"];
const NAMES_BR: [&str; 8] = ["beq", "bne", "", "", "blt", "bge", "bltu", "bgeu"];
const NAMES_ST: [&str; 4] = ["sb", "sh", "sw", "sd"];
const NAMES_LD: [&str; 7] = ["lb", "lh", "lw", "ld", "lbu", "lhu", "lwu"];
const NAMES_OPW: [&str; 8] = ["addw", "sllw", "", "", "", "srw", "", ""];
const NAMES_OPIW: [&str; 8] = ["addiw", "slliw", "", "", "", "sri", "", ""];
// Register name mapping
pub const REG_X: [&str; 32] = ["zero", "ra", "sp", "gp", "tp", "t0", "t1", "t2", "s0", "s1",
"a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7",
"s2", "s3", "s4", "s5", "s6", "s7", "s8", "s9", "s10", "s11",
"t3", "t4", "t5", "t6"];
const REG_F: [&str; 32] = ["ft0", "ft1", "ft2", "ft3", "ft4", "ft5", "ft6", "ft7", "fs0", "fs1",
"fa0", "fa1", "fa2", "fa3", "fa4", "fa5", "fa6", "fa7",
"fs2", "fs3", "fs4", "fs5", "fs6", "fs7", "fs8", "fs9", "fs10", "fs11",
"ft8", "ft9", "ft10", "ft11"];
pub fn print(ins: Instruction, pc: i32) -> String { //TODO pc should be u64
let rd = ins.rd as usize;
let rs1 = ins.rs1 as usize;
let rs2 = ins.rs2 as usize;
let rs3 = ins.rs3 as usize;
match ins.opcode {
RISCV_OP => {
let name: &str;
if ins.funct7 == 1 { // Use mul array
name = NAMES_MUL[ins.funct3 as usize]
} else if ins.funct3 == RISCV_OP_ADD {
// Add or Sub
if ins.funct7 == RISCV_OP_ADD_ADD {
name = "add";
} else {
name = "sub";
}
} else if ins.funct3 == RISCV_OP_SR {
// Srl or Sra
if ins.funct7 == RISCV_OP_SR_SRL {
name = "srl";
} else {
name = "sra";
}
} else {
name = NAMES_OP[ins.funct3 as usize];
}
format!("{}\t{},{},{}", name, REG_X[rd], REG_X[rs1], REG_X[rs2])
},
RISCV_OPI => {
// SHAMT OR IMM
if ins.funct3 == RISCV_OPI_SRI {
if ins.funct7 == RISCV_OPI_SRI_SRLI {
format!("srli\t{},{},{}", REG_X[rd], REG_X[rs1], ins.shamt)
} else {
format!("srai\t{},{},{}", REG_X[rd], REG_X[rs1], ins.shamt)
}
} else if ins.funct3 == RISCV_OPI_SLLI {
format!("{}\t{},{},{}", NAMES_OPI[ins.funct3 as usize], REG_X[rd], REG_X[rs1], ins.shamt)
} else {
format!("{}\t{},{},{}", NAMES_OPI[ins.funct3 as usize], REG_X[rd], REG_X[rs1], ins.imm12_I_signed)
}
},
RISCV_LUI => {
format!("lui\t{},{:x}", REG_X[rd], ins.imm31_12)
},
RISCV_AUIPC => {
format!("auipc\t{},{:x}", REG_X[rd], ins.imm31_12)
},
RISCV_JAL => {
format!("jal\t{},{:x}", REG_X[rd], (pc + ins.imm21_1_signed))
},
RISCV_JALR => {
format!("jalr\t{},{:x}({})", REG_X[rd], ins.imm12_I_signed, REG_X[rs1])
},
RISCV_BR => {
format!("{}\t{},{},{:x}", NAMES_BR[ins.funct3 as usize], REG_X[rs1], REG_X[rs2], pc + (ins.imm13_signed as i32))
},
RISCV_LD => {
format!("{}\t{},{}({})", NAMES_LD[ins.funct3 as usize], REG_X[rd], ins.imm12_I_signed, REG_X[rs1])
},
RISCV_ST => {
format!("{}\t{},{}({})", NAMES_ST[ins.funct3 as usize], REG_X[rs2], ins.imm12_S_signed, REG_X[rs1])
},
RISCV_OPIW => {
if ins.funct3 == RISCV_OPIW_SRW {
if ins.funct7 == RISCV_OPIW_SRW_SRLIW {
format!("srliw\t{},{},{}", REG_X[rd], REG_X[rs1], REG_X[rs2])
} else {
format!("sraiw\t{},{},{}", REG_X[rd], REG_X[rs1], REG_X[rs2])
}
} else {
format!("{}\t{},{},0x{:x}", NAMES_OPIW[ins.funct3 as usize], REG_X[rd], REG_X[rs1], ins.imm12_I_signed)
}
},
RISCV_OPW => {
if ins.funct7 == 1 {
format!("{}w\t{},{},{}", NAMES_MUL[ins.funct3 as usize], REG_X[rd], REG_X[rs1], REG_X[rs2])
} else if ins.funct3 == RISCV_OP_ADD {
if ins.funct7 == RISCV_OPW_ADDSUBW_ADDW {
format!("addw\t{},{},{}", REG_X[rd], REG_X[rs1], REG_X[rs2])
} else {
format!("subw\t{},{},{}", REG_X[rd], REG_X[rs1], REG_X[rs2])
}
} else if ins.funct3 == RISCV_OPW_SRW {
if ins.funct7 == RISCV_OPW_SRW_SRLW {
format!("srlw\t{},{},{}", REG_X[rd], REG_X[rs1], REG_X[rs2])
} else {
format!("sraw\t{},{},{}", REG_X[rd], REG_X[rs1], REG_X[rs2])
}
} else {
format!("{}\t{},{},{}", NAMES_OPW[ins.funct3 as usize], REG_X[rd], REG_X[rs1], REG_X[rs2])
}
},
// RV32F Standard Extension
RISCV_FLW => {
format!("flw\t{},{},({})", REG_F[rd], ins.imm12_I_signed, REG_F[rs1])
},
RISCV_FSW => {
format!("fsw\t{},{},({})", REG_F[rs2], "OFFSET TODO", REG_F[rs1]) // TODO Offset in decode
},
RISCV_FMADD => {
format!("fmadd\t{}{}{}{}", REG_F[rd], REG_F[rs1], REG_F[rs2], REG_F[rs3])
},
RISCV_FMSUB => {
format!("fmsub\t{}{}{}{}", REG_F[rd], REG_F[rs1], REG_F[rs2], REG_F[rs3])
},
RISCV_FNMSUB => {
format!("fnmsub\t{}{}{}{}", REG_F[rd], REG_F[rs1], REG_F[rs2], REG_F[rs3])
},
RISCV_FNMADD => {
format!("fnmadd\t{}{}{}{}", REG_F[rd], REG_F[rs1], REG_F[rs2], REG_F[rs3])
},
RISCV_FP => {
match ins.funct7 {
RISCV_FP_ADD => {
format!("{}\t{}{}{}", "fadd", REG_F[rd], REG_F[rs1], REG_F[rs2])
},
RISCV_FP_SUB => {
format!("{}\t{}{}{}", "fsub.s", REG_F[rd], REG_F[rs1], REG_F[rs2])
},
RISCV_FP_MUL => {
format!("{}\t{}{}{}", "fmul.s", REG_F[rd], REG_F[rs1], REG_F[rs2])
},
RISCV_FP_DIV => {
format!("{}\t{}{}{}", "fdiv.s", REG_F[rd], REG_F[rs1], REG_F[rs2])
},
RISCV_FP_SQRT => {
format!("{}\t{}{}", "fsqrt.s", REG_F[rd], REG_F[rs1])
},
RISCV_FP_FSGN => {
match ins.funct3 {
RISCV_FP_FSGN_J => {
format!("{}\t{}{}{}", "fsgnj.s", REG_F[rd], REG_F[rs1], REG_F[rs2])
},
RISCV_FP_FSGN_JN => {
format!("{}\t{}{}{}", "fsgnn.s", REG_F[rd], REG_F[rs1], REG_F[rs2])
},
RISCV_FP_FSGN_JX => {
format!("{}\t{}{}{}", "fsgnx.s", REG_F[rd], REG_F[rs1], REG_F[rs2])
},
_ => todo!("Unknown code")
}
},
RISCV_FP_MINMAX => {
if ins.funct3 == 0 {
format!("{}\t{}{}{}", "fmin.s", REG_F[rd], REG_F[rs1], REG_F[rs2])
} else {
format!("{}\t{}{}{}", "fmax.s", REG_F[rd], REG_F[rs1], REG_F[rs2])
}
},
RISCV_FP_FCVTW => {
if rs2 == 0 {
format!("{}\t{}{}", "fcvt.w.s", REG_F[rd], REG_F[rs1])
} else {
format!("{}\t{}{}", "fcvt.wu.s", REG_F[rd], REG_F[rs1])
}
},
RISCV_FP_FMVXFCLASS => {
if ins.funct3 == 0 {
format!("{}\t{}{}", "fmv.x.w", REG_F[rd], REG_F[rs1])
} else {
format!("{}\t{}{}", "fclass.s", REG_F[rd], REG_F[rs1])
}
},
RISCV_FP_FCMP => {
if ins.funct3 == 0 {
format!("{}\t{}{}{}", "fle.s", REG_F[rd], REG_F[rs1], REG_F[rs2])
} else if ins.funct3 == 1 {
format!("{}\t{}{}{}", "flt.s", REG_F[rd], REG_F[rs1], REG_F[rs2])
} else {
format!("{}\t{}{}{}", "feq.s", REG_F[rd], REG_F[rs1], REG_F[rs2])
}
},
RISCV_FP_FCVTS => {
if rs2 == 0 {
format!("{}\t{}{}", "fcvt.s.w", REG_F[rd], REG_F[rs1])
} else {
format!("{}\t{}{}", "fcvt.s.wu", REG_F[rd], REG_F[rs1])
}
},
RISCV_FP_FMVW => {
format!("{}\t{}{}", "fmv.w.x", REG_F[rd], REG_F[rs1])
},
_ => todo!("Unknown code")
}
},
RISCV_SYSTEM => {
"ecall".to_string()
},
_ => todo!("{:x} opcode non géré pc : {:x}, value : {:x}", ins.opcode, pc, ins.value) // Change todo! to panic! in the future, I put todo! because there's a lot of opcode currently not implemented
}
}
#[cfg(test)]
mod test {
#![allow(clippy::unusual_byte_groupings)]
use crate::simulator::{decode, print};
#[test]
fn test_op() {
let sub = decode::decode(0b0100000_10000_10001_000_11100_0110011);
let add = decode::decode(0b0000000_10000_10001_000_11100_0110011);
let xor = decode::decode(0b0000000_10000_10001_100_11100_0110011);
let slr = decode::decode(0b0000000_10000_10001_101_11100_0110011);
let sra = decode::decode(0b0100000_10000_10001_101_11100_0110011);
assert_eq!("sub\tt3,a7,a6", print::print(sub, 0));
assert_eq!("xor\tt3,a7,a6", print::print(xor, 0));
assert_eq!("srl\tt3,a7,a6", print::print(slr, 0));
assert_eq!("sra\tt3,a7,a6", print::print(sra, 0));
assert_eq!("add\tt3,a7,a6", print::print(add, 0));
}
#[test]
fn test_opi() {
let addi = decode::decode(0b0000000000_10001_000_11100_0010011);
let slli = decode::decode(0b0000000000_10001_001_11100_0010011);
let slti = decode::decode(0b0000000000_10001_010_11100_0010011);
let sltiu = decode::decode(0b0000000000_10001_011_11100_0010011);
let xori = decode::decode(0b_0000000000010001_100_11100_0010011);
let ori = decode::decode(0b00000000000_10001_110_11100_0010011);
let andi = decode::decode(0b000000000000_10001_111_11100_0010011);
assert_eq!("andi\tt3,a7,0", print::print(andi, 0));
assert_eq!("addi\tt3,a7,0", print::print(addi, 0));
assert_eq!("slli\tt3,a7,0", print::print(slli, 0));
assert_eq!("slti\tt3,a7,0", print::print(slti, 0));
assert_eq!("sltiu\tt3,a7,0", print::print(sltiu, 0));
assert_eq!("xori\tt3,a7,0", print::print(xori, 0));
assert_eq!("ori\tt3,a7,0", print::print(ori, 0));
}
#[test]
fn test_lui() {
let lui = decode::decode(0b01110001000011111000_11100_0110111);
let lui_negatif = decode::decode(0b11110001000011111000_11100_0110111);
assert_eq!("lui\tt3,710f8000", print::print(lui, 0));
assert_eq!("lui\tt3,f10f8000", print::print(lui_negatif, 0));
}
#[test]
fn test_ld() {
// imm rs1 f3 rd opcode
let lb = decode::decode(0b010111110000_10001_000_11100_0000011);
let lh = decode::decode(0b010111110000_10001_001_11100_0000011);
let lw = decode::decode(0b010111110000_10001_010_11100_0000011);
let lbu = decode::decode(0b010111110000_10001_100_11100_0000011);
let lhu = decode::decode(0b010111110000_10001_101_11100_0000011);
let ld = decode::decode(0b010111110000_10001_011_11100_0000011);
let lwu = decode::decode(0b010111110000_10001_110_11100_0000011);
assert_eq!("lb\tt3,1520(a7)", print::print(lb, 0));
assert_eq!("lh\tt3,1520(a7)", print::print(lh, 0));
assert_eq!("lw\tt3,1520(a7)", print::print(lw, 0));
assert_eq!("lbu\tt3,1520(a7)", print::print(lbu, 0));
assert_eq!("lhu\tt3,1520(a7)", print::print(lhu, 0));
assert_eq!("ld\tt3,1520(a7)", print::print(ld, 0));
assert_eq!("lwu\tt3,1520(a7)", print::print(lwu, 0));
}
#[test]
fn test_opw() {
let addw: decode::Instruction = decode::decode(0b0000000_10000_10001_000_11100_0111011);
let sllw: decode::Instruction = decode::decode(0b0000000_10000_10001_001_11100_0111011);
let srlw: decode::Instruction = decode::decode(0b0000000_10000_10001_101_11100_0111011);
let sraw: decode::Instruction = decode::decode(0b0100000_10000_10001_101_11100_0111011);
assert_eq!("addw\tt3,a7,a6", print::print(addw, 0));
assert_eq!("sllw\tt3,a7,a6", print::print(sllw, 0));
assert_eq!("srlw\tt3,a7,a6", print::print(srlw, 0));
assert_eq!("sraw\tt3,a7,a6", print::print(sraw, 0));
}
#[test]
fn test_opwi() {
let addiw: decode::Instruction =decode::decode(0b000000000000_10001_000_11100_0011011);
let slliw: decode::Instruction = decode::decode(0b0000000_10000_10001_001_11100_0011011);
let srai: decode::Instruction = decode::decode(0b010000010001_10001_101_11100_0010011);
assert_eq!("addiw\tt3,a7,0x0", print::print(addiw, 0));
assert_eq!("slliw\tt3,a7,0x10", print::print(slliw, 0));
assert_eq!("srai\tt3,a7,17", print::print(srai, 0));
}
#[test]
fn test_br() {
let beq: decode::Instruction = decode::decode(0b0000000_10000_10001_000_00000_1100011);
let bne: decode::Instruction = decode::decode(0b0000000_10000_10001_001_00000_1100011);
let blt: decode::Instruction = decode::decode(0b0000000_10000_10001_100_00000_1100011);
let bge: decode::Instruction = decode::decode(0b0000000_10000_10001_101_00000_1100011);
let bge2: decode::Instruction = decode::decode(0x00f75863);
let bltu: decode::Instruction = decode::decode(0b0000000_10000_10001_110_00000_1100011);
let bgeu: decode::Instruction = decode::decode(0b0000000_10000_10001_111_00000_1100011);
assert_eq!("blt\ta7,a6,0", print::print(blt, 0));
assert_eq!("bge\ta7,a6,0", print::print(bge, 0));
assert_eq!("bge\ta4,a5,104d4", print::print(bge2, 0x104c4));
assert_eq!("bltu\ta7,a6,0", print::print(bltu, 0));
assert_eq!("bgeu\ta7,a6,0", print::print(bgeu, 0));
assert_eq!("bne\ta7,a6,0", print::print(bne, 0));
assert_eq!("beq\ta7,a6,0", print::print(beq, 0));
}
#[test]
fn test_small_program() {
/* Code for :
int a = 0;
int b = 5;
a = b;
a = a * b;
a = a + b;
b = a - b;
*/
assert_eq!("addi sp,sp,-32", print::print(decode::decode(0xfe010113), 0));
assert_eq!("sd s0,24(sp)", print::print(decode::decode(0x00813c23), 0));
assert_eq!("addi s0,sp,32", print::print(decode::decode(0x02010413), 0));
assert_eq!("sw zero,-20(s0)", print::print(decode::decode(0xfe042623), 0));
assert_eq!("addi a5,zero,5", print::print(decode::decode(0x00500793), 0));
assert_eq!("sw a5,-24(s0)", print::print(decode::decode(0xfef42423), 0));
assert_eq!("lw a5,-24(s0)", print::print(decode::decode(0xfe842783), 0));
assert_eq!("sw a5,-20(s0)", print::print(decode::decode(0xfef42623), 0));
assert_eq!("lw a5,-20(s0)", print::print(decode::decode(0xfec42783), 0));
assert_eq!("addi a4,a5,0", print::print(decode::decode(0x00078713), 0));
assert_eq!("lw a5,-24(s0)", print::print(decode::decode(0xfe842783), 0));
assert_eq!("mulw a5,a4,a5", print::print(decode::decode(0x02f707bb), 0));
assert_eq!("sw a5,-20(s0)", print::print(decode::decode(0xfef42623), 0));
assert_eq!("lw a5,-20(s0)", print::print(decode::decode(0xfec42783), 0));
assert_eq!("addi a4,a5,0", print::print(decode::decode(0x00078713), 0));
assert_eq!("lw a5,-24(s0)", print::print(decode::decode(0xfe842783), 0));
assert_eq!("addw a5,a4,a5", print::print(decode::decode(0x00f707bb), 0));
assert_eq!("sw a5,-20(s0)", print::print(decode::decode(0xfef42623), 0));
assert_eq!("lw a5,-20(s0)", print::print(decode::decode(0xfec42783), 0));
assert_eq!("addi a4,a5,0", print::print(decode::decode(0x00078713), 0));
assert_eq!("lw a5,-24(s0)", print::print(decode::decode(0xfe842783), 0));
assert_eq!("subw a5,a4,a5", print::print(decode::decode(0x40f707bb), 0));
assert_eq!("sw a5,-24(s0)", print::print(decode::decode(0xfef42423), 0));
assert_eq!("addi a5,zero,0", print::print(decode::decode(0x00000793), 0));
assert_eq!("addi a0,a5,0", print::print(decode::decode(0x00078513), 0));
assert_eq!("ld s0,24(sp)", print::print(decode::decode(0x01813403), 0));
assert_eq!("addi sp,sp,32", print::print(decode::decode(0x02010113), 0));
assert_eq!("jalr zero,0(ra)", print::print(decode::decode(0x00008067), 0));
}
#[test]
fn test_fibo() {
assert_eq!("jal zero,10504", print::print(decode::decode(0x0500006f), 0x104b4));
assert_eq!("blt a4,a5,104b8", print::print(decode::decode(0xfaf740e3), 0x10518));
}
#[test]
fn test_mul_prog() {
assert_eq!("addi sp,sp,-32", print::print(decode::decode(0xfe010113), 0));
assert_eq!("sd s0,24(sp)", print::print(decode::decode(0x00813c23), 0));
assert_eq!("addi s0,sp,32", print::print(decode::decode(0x02010413), 0));
assert_eq!("addi a5,zero,5", print::print(decode::decode(0x00500793), 0));
assert_eq!("sw a5,-20(s0)", print::print(decode::decode(0xfef42623), 0));
assert_eq!("lw a5,-20(s0)", print::print(decode::decode(0xfec42783), 0));
assert_eq!("addi a4,a5,0", print::print(decode::decode(0x00078713), 0));
assert_eq!("addi a5,a4,0", print::print(decode::decode(0x00070793), 0));
assert_eq!("slliw a5,a5,0x2", print::print(decode::decode(0x0027979b), 0));
assert_eq!("addw a5,a5,a4", print::print(decode::decode(0x00e787bb), 0));
assert_eq!("sw a5,-24(s0)", print::print(decode::decode(0xfef42423), 0));
assert_eq!("lw a5,-20(s0)", print::print(decode::decode(0xfec42783), 0));
assert_eq!("addi a4,a5,0", print::print(decode::decode(0x00078713), 0));
assert_eq!("lw a5,-24(s0)", print::print(decode::decode(0xfe842783), 0));
assert_eq!("mulw a5,a4,a5", print::print(decode::decode(0x02f707bb), 0));
assert_eq!("sw a5,-28(s0)", print::print(decode::decode(0xfef42223), 0));
assert_eq!("lw a5,-28(s0)", print::print(decode::decode(0xfe442783), 0));
assert_eq!("addi a4,a5,0", print::print(decode::decode(0x00078713), 0));
assert_eq!("lw a5,-24(s0)", print::print(decode::decode(0xfe842783), 0));
assert_eq!("divw a5,a4,a5", print::print(decode::decode(0x02f747bb), 0));
assert_eq!("sw a5,-20(s0)", print::print(decode::decode(0xfef42623), 0));
assert_eq!("addi a5,zero,0", print::print(decode::decode(0x00000793), 0));
assert_eq!("addi a0,a5,0", print::print(decode::decode(0x00078513), 0));
assert_eq!("ld s0,24(sp)", print::print(decode::decode(0x01813403), 0));
assert_eq!("addi sp,sp,32", print::print(decode::decode(0x02010113), 0));
assert_eq!("jalr zero,0(ra)", print::print(decode::decode(0x00008067), 0));
}
}

61
src/simulator/register.rs Normal file
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//! # Register
//!
//! This mod contains the definition of the Register structs
//! for use within the Machine module.
use crate::simulator::machine::{NUM_FP_REGS, NUM_INT_REGS};
use std::ops::{Add, Sub};
/// Forcing the Register struct's generic type into having the following Traits
///
/// - Add
/// - Sub
/// - PartialEq
/// - Copy
///
/// Generally speaking, only numbers have the combinaison of these traits.
pub trait RegisterNum: Add<Output=Self> + Sub<Output=Self> + PartialEq + Copy {}
impl RegisterNum for i64 {}
impl RegisterNum for f32 {}
/// Machine register array
#[derive(PartialEq)]
pub struct Register<U: RegisterNum> {
/// 32 available registers of type U
register: [U; 32]
}
impl<U: RegisterNum> Register<U> {
/// Returns the current value held in register *position*
pub fn get_reg(&self, position: u8) -> U {
self.register[position as usize]
}
/// Set value of register *position* to *value*
///
/// Checking against trying to set a new value to the 0th register
/// as its value is NOT supposed to change
pub fn set_reg(&mut self, position: u8, value: U) {
if position != 0 { self.register[position as usize] = value; }
}
}
impl Register<i64> {
/// i64 register constructor
pub fn init() -> Register<i64> {
Register {
register: [0i64; NUM_INT_REGS]
}
}
}
impl Register<f32> {
/// f32 register constructor
pub fn init() -> Register<f32> {
Register {
register: [0f32; NUM_FP_REGS]
}
}
}

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//Nombre maximum de correspondances dans une table des pages
//Cette donnée devra a terme etre recupérée depuis un fichier de configuration
const MaxVirtPages : u64 = 200000;
/* Une table de correspondance propre à un processus
* Une variable de type TranslationTable devra etre possédée par un objet de type Process
*/
pub struct TranslationTable{
//capacité de cette table <=> nombre de correspondances possibles
//A voir si cette donnée doit etre immuable
pub maxNumPages : u64,
//la table en question
//Vec implemente le trait Index, donc un bon choix
pub pageTable : Vec<PageTableEntry>
}
impl TranslationTable {
pub fn create() -> TranslationTable {
let mut tmp_vec : Vec<PageTableEntry> = Vec::new();
for i in 0..MaxVirtPages {
tmp_vec.push(PageTableEntry::create());
}
TranslationTable{
maxNumPages : MaxVirtPages,
pageTable : tmp_vec
}
}
//vpn = virtual page number, c'est un index dans la table des page
//Assert a mettre dans chacune des fonctions suivantes
pub fn get_max_num_pages(&self) -> u64{
return self.maxNumPages;
}
pub fn set_physical_page(&mut self, vpn : u64, physical_page : i32){
self.pageTable[vpn as usize].physical_page = physical_page;
}
pub fn get_physical_page(&self, vpn : u64) -> i32{
self.pageTable[vpn as usize].physical_page
}
pub fn set_addr_disk(&mut self, vpn : u64, addr_disk : i32){
self.pageTable[vpn as usize].addr_disk = addr_disk;
}
pub fn get_addr_disk(&self, vpn : u64) -> i32 {
self.pageTable[vpn as usize].addr_disk
}
pub fn set_bit_valid(&mut self, vpn : u64){
self.pageTable[vpn as usize].valid = true;
}
pub fn clear_bit_valid(&mut self, vpn : u64){
self.pageTable[vpn as usize].valid = false;
}
pub fn get_bit_valid(&self, vpn : u64) -> bool{
self.pageTable[vpn as usize].valid
}
pub fn set_bit_io(&mut self, vpn : u64){
self.pageTable[vpn as usize].io = true;
}
pub fn clear_bit_io(&mut self, vpn : u64){
self.pageTable[vpn as usize].io = false;
}
pub fn get_bit_io(&self, vpn : u64) -> bool{
self.pageTable[vpn as usize].io
}
pub fn set_bit_swap(&mut self, vpn : u64){
self.pageTable[vpn as usize].swap = true;
}
pub fn clear_bit_swap(&mut self, vpn : u64){
self.pageTable[vpn as usize].swap = false;
}
pub fn get_bit_swap(&self, vpn : u64) -> bool{
self.pageTable[vpn as usize].swap
}
pub fn set_bit_write(&mut self, vpn : u64){
self.pageTable[vpn as usize].write_allowed = true;
}
pub fn clear_bit_write(&mut self, vpn : u64){
self.pageTable[vpn as usize].write_allowed = false;
}
pub fn get_bit_write(&self, vpn : u64) -> bool{
self.pageTable[vpn as usize].write_allowed
}
pub fn set_bit_read(&mut self, vpn : u64){
self.pageTable[vpn as usize].read_allowed = true;
}
pub fn clear_bit_read(&mut self, vpn : u64){
self.pageTable[vpn as usize].read_allowed = false;
}
pub fn get_bit_read(&self, vpn : u64) -> bool{
self.pageTable[vpn as usize].read_allowed
}
pub fn set_bit_U(&mut self, vpn : u64){
self.pageTable[vpn as usize].U = true;
}
pub fn clear_bit_U(&mut self, vpn : u64){
self.pageTable[vpn as usize].U = false;
}
pub fn get_bit_U(&self, vpn : u64) -> bool{
self.pageTable[vpn as usize].U
}
pub fn set_bit_M(&mut self, vpn : u64){
self.pageTable[vpn as usize].M = true;
}
pub fn clear_bit_M(&mut self, vpn : u64){
self.pageTable[vpn as usize].M = false;
}
pub fn get_bit_M(&self, vpn : u64) -> bool{
self.pageTable[vpn as usize].M
}
}
/* Une correspondance + données sur cette correspondance
*/
pub struct PageTableEntry{
//true <=> la correspondance est valide et la page est présente dans la ram
valid : bool,
//true <=> la page a été accédée (lecture/ecriture) récemment
U : bool,
//true <=> page modifiée mais non sauvegardée sur disque
M : bool,
//droits d'accès sur cette page
read_allowed : bool,
write_allowed : bool,
//numero de page physique <=> c'est notre correspondance
physical_page : i32,
//true <=> cette page doit etre chargée depuis la swap zone du disque
swap : bool,
//a définir plus tard, en relation avec swap
addr_disk : i32,
//mis à 1 par le système quand cette page est impliquée dans une opération d'IO
io : bool
}
impl PageTableEntry{
//Default PageTableEntry Constructor
pub fn create() -> PageTableEntry {
PageTableEntry {
valid : false,
U : false,
M : false,
read_allowed : false,
write_allowed : false,
physical_page : -1i32,
swap : false,
addr_disk : -1i32,
io : false
}
}
}

116
src/utility/cfg.rs Normal file
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//! Functions for burritos.cfg configuration file parsing.
//! Needed to set-up machine and system constants without
//! recompiling.
use std::{
fs::File,
path::Path,
collections::HashMap,
io::{
BufReader,
BufRead,
Error
}
};
/// Aliases the rather long HashMap<MachineSettingKey, i32> type
/// to a rather simpler to understand Settings.
pub type Settings = HashMap<MachineSettingKey, u64>;
/// Keys for the Settings HashMap, represented as enums for
/// maintainability.
#[derive(Eq, Hash, PartialEq, Debug)]
pub enum MachineSettingKey {
/// Number of physical pages.
NumPhysPages,
/// Stack size.
UserStackSize,
/// Maximum size of a file name
MaxFileNameSize,
/// Number of directory entries
NumDirEntries,
/// Processor Frequency
ProcessorFrequency,
/// Disk sector size
SectorSize,
/// Memory page size
PageSize,
/// Maximum number of Virtual Pages
MaxVirtPages,
/// In case of unknown key in configuration file.
Unknown
}
/// Allows for converting string slices to correspoding MachineSettingKey
/// enum value.
impl From<&str> for MachineSettingKey {
fn from(s: &str) -> Self {
match s {
"NumPhysPages" => MachineSettingKey::NumPhysPages,
"UserStackSize" => MachineSettingKey::UserStackSize,
"MaxFileNameSize" => MachineSettingKey::MaxFileNameSize,
"NumDirEntries" => MachineSettingKey::NumDirEntries,
"ProcessorFrequency" => MachineSettingKey::ProcessorFrequency,
"SectorSize" => MachineSettingKey::SectorSize,
"PageSize" => MachineSettingKey::PageSize,
"MaxVirtPages" => MachineSettingKey::MaxVirtPages,
_ => MachineSettingKey::Unknown
}
}
}
/// Tries to return a HashMap containing the user defined burritos configuration
/// in the burritos.cfg file.
///
/// If the file is not found, the function will return an io error.
///
/// If the configuration is invalid, the function may return a HashMap with missing or
/// non-sensical settings.
/// It is up to the caller to determine whether or not default values should be placed
/// instead of halting the program.
pub fn read_settings() -> Result<Settings, Error> {
// Opening file
let file = {
let file_path = "./burritos.cfg";
let file_path = Path::new(file_path);
match File::open(file_path) {
Ok(opened_file) => opened_file,
Err(error_message) => Err(error_message)?
}
};
let file_reader = BufReader::new(file);
let filtered_setting_strings = filter_garbage(file_reader);
let mut settings_map = Settings::new();
// Reading settings
for line in filtered_setting_strings {
let mut split_line = line.split_whitespace();
let key = split_line.next().unwrap_or("_");
split_line.next(); // Skipping '=' character
let setting = split_line.next().unwrap_or("_");
settings_map = update_settings_map(settings_map, key, setting);
}
Ok(settings_map)
}
/// Returns a mock configuration for Machine unit testing
/// FIXME: Does not cover the whole configuration yet
pub fn get_debug_configuration() -> Settings {
let mut settings_map = Settings::new();
settings_map.insert(MachineSettingKey::PageSize, 128);
settings_map.insert(MachineSettingKey::NumPhysPages, 400);
settings_map
}
fn filter_garbage<R: std::io::Read>(reader: BufReader<R>) -> Vec<String> {
reader.lines()
.map(|l| l.unwrap())
.filter(|l| !l.is_empty() && !l.starts_with("#"))
.collect()
}
fn update_settings_map(mut settings_map: Settings, key: &str, setting: &str) -> Settings {
let key = MachineSettingKey::from(key);
let setting = u64::from_str_radix(setting, 10).unwrap_or(0);
settings_map.insert(key, setting);
settings_map
}

385
src/utility/list.rs Normal file
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//! Data structure and definition of a generic single-linked LIFO list.
use std::ptr;
/// Definition of the generic single-linked FIFO list
///
/// Each elements points to a single item of the list and the following one
///
/// These methods wrap unsafe instructions because it doesn't respect borrow rules per example
/// but everything has been tested with miri to assure there's no Undefined Behaviour (use-after-free, double free, etc.)
/// or memory leak
#[derive(PartialEq, Clone, Debug)]
pub struct List<T: PartialEq> {
head: Link<T>,
tail: Link<T>,
}
type Link<T> = *mut Node<T>;
#[derive(PartialEq)]
struct Node<T> {
elem: T,
next: Link<T>,
}
/// Iterator structure for use in a for loop, pop elements before returning it
pub struct IntoIter<T: PartialEq>(List<T>);
/// Iterator structure for use in a for loop, dereference before returning it
pub struct Iter<'a, T> {
next: Option<&'a Node<T>>,
}
/// Same as Iter structure, returned item are mutable
pub struct IterMut<'a, T> {
next: Option<&'a mut Node<T>>,
}
impl<T: PartialEq> List<T> {
/// Push an item at the end of the list
pub fn push(&mut self, elem: T) {
unsafe {
let new_tail = Box::into_raw(Box::new(Node {
elem,
next: ptr::null_mut(),
}));
if !self.tail.is_null() {
(*self.tail).next = new_tail;
} else {
self.head = new_tail;
}
self.tail = new_tail;
}
}
/// Retrieve and remove the item at the head of the list.
///
/// Return None if list is empty
pub fn pop(&mut self) -> Option<T> {
unsafe {
if self.head.is_null() {
None
} else {
let head = Box::from_raw(self.head);
self.head = head.next;
if self.head.is_null() {
self.tail = ptr::null_mut();
}
Some(head.elem)
}
}
}
/// Retrieve without removing the item at the head of the list
///
/// Return None if list is empty
pub fn peek(&self) -> Option<&T> {
unsafe {
self.head.as_ref().map(|node| &node.elem)
}
}
/// Retrieve without removing the item at the head of the list as mutable
///
/// Return None if lsit is empty
pub fn peek_mut(&mut self) -> Option<&mut T> {
unsafe {
self.head.as_mut().map(|node| &mut node.elem)
}
}
/// Search for an element in the list
///
/// Return **bool** true if the list contains the element, false otherwise
///
/// Worst case complexity of this function is O(n)
pub fn contains(&self, elem: &T) -> bool {
let mut iter = self.iter();
let mut element = iter.next();
while element.is_some() {
if element.unwrap() == elem {
return true;
} else {
element = iter.next();
}
}
false
}
/// Remove the item from the list
///
/// Return true if the item has been found, otherwise return false
///
/// Worst-case complexity is O(n)
pub fn remove(&mut self, item: T)-> bool {
unsafe {
let mut current: *mut Node<T> = self.head;
let mut previous: *mut Node<T> = ptr::null_mut();
while !current.is_null() {
if (*current).elem == item {
if !previous.is_null() {
(*previous).next = (*current).next;
} else {
self.head = (*current).next;
}
drop(Box::from_raw(current).elem);
return true;
} else {
previous = current;
current = (*current).next;
}
}
}
false
}
/// Return true if the list is empty, false otherwise
pub fn is_empty(&self) -> bool {
self.head.is_null()
}
/// Turn the list into an iterator for use in a for loop per example.
///
/// When you iter using into_iter, elements are remove from the list
pub fn into_iter(self) -> IntoIter<T> {
IntoIter(self)
}
/// Turn the list into an iterator for use in a for loop
///
/// When you iter using this method, elements are dereferenced
pub fn iter(&self) -> Iter<'_, T> {
unsafe {
Iter { next: self.head.as_ref() }
}
}
/// Same as iter but make the iterator mutable
pub fn iter_mut(&mut self) -> IterMut<'_, T> {
unsafe {
IterMut { next: self.head.as_mut() }
}
}
}
impl<T: PartialEq> Default for List<T> {
/// Create an empty list
fn default() -> Self {
Self { head: ptr::null_mut(), tail: ptr::null_mut() }
}
}
impl<T: PartialEq> Drop for List<T> {
fn drop(&mut self) {
while self.pop().is_some() {} // removing every item from list (necessary as we using unsafe function)
}
}
impl<T: PartialEq> Iterator for IntoIter<T> {
type Item = T;
fn next(&mut self) -> Option<Self::Item> {
// access fields of a tuple struct numerically
self.0.pop()
}
}
impl<'a, T> Iterator for Iter<'a, T> {
type Item = &'a T;
fn next(&mut self) -> Option<Self::Item> {
unsafe {
self.next.map(|node| {
self.next = node.next.as_ref();
&node.elem
})
}
}
}
impl<'a, T> Iterator for IterMut<'a, T> {
type Item = &'a mut T;
fn next(&mut self) -> Option<Self::Item> {
unsafe {
self.next.take().map(|node| {
self.next = node.next.as_mut();
&mut node.elem
})
}
}
}
#[cfg(test)]
mod test {
use super::List;
#[test]
fn basics() {
let mut list = List::default();
// Check empty list behaves right
assert_eq!(list.pop(), None);
// Populate list
list.push(1);
list.push(2);
list.push(3);
// Check normal removal
assert_eq!(list.pop(), Some(1));
assert_eq!(list.pop(), Some(2));
// Push some more just to make sure nothing's corrupted
list.push(4);
list.push(5);
// Check normal removal
assert_eq!(list.pop(), Some(3));
assert_eq!(list.pop(), Some(4));
// Check exhaustion
assert_eq!(list.pop(), Some(5));
assert_eq!(list.pop(), None);
}
#[test]
fn peek() {
let mut list = List::default();
assert_eq!(list.peek(), None);
assert_eq!(list.peek_mut(), None);
list.push(1);
list.push(2);
list.push(3);
assert_eq!(list.peek(), Some(&1));
assert_eq!(list.peek_mut(), Some(&mut 1));
}
#[test]
fn into_iter() {
let mut list = List::default();
list.push(1);
list.push(2);
list.push(3);
let mut iter = list.into_iter();
assert_eq!(iter.next(), Some(1));
assert_eq!(iter.next(), Some(2));
assert_eq!(iter.next(), Some(3));
assert_eq!(iter.next(), None);
}
#[test]
fn iter() {
let mut list = List::default();
list.push(1);
list.push(2);
list.push(3);
let mut iter = list.iter();
assert_eq!(iter.next(), Some(&1));
assert_eq!(iter.next(), Some(&2));
assert_eq!(iter.next(), Some(&3));
}
#[test]
fn iter_mut() {
let mut list = List::default();
list.push(1);
list.push(2);
list.push(3);
let mut iter = list.iter_mut();
assert_eq!(iter.next(), Some(&mut 1));
assert_eq!(iter.next(), Some(&mut 2));
assert_eq!(iter.next(), Some(&mut 3));
}
#[test]
fn contains_test() {
let mut list = List::default();
assert_eq!(list.peek(), None);
list.push(1);
list.push(2);
list.push(3);
assert_eq!(list.contains(&1), true);
assert_eq!(list.contains(&4), false);
}
#[test]
fn remove_test() {
let mut list = List::default();
assert_eq!(list.peek(), None);
list.push(1);
list.push(2);
list.push(3);
assert_eq!(list.contains(&2), true);
list.remove(2);
assert_eq!(list.contains(&2), false);
assert_eq!(list.pop(), Option::Some(1));
assert_eq!(list.pop(), Option::Some(3));
assert_eq!(list.peek(), Option::None);
}
#[test]
fn remove_test2() {
let mut list = List::default();
assert_eq!(list.peek(), None);
list.push(1);
list.push(2);
list.push(3);
assert_eq!(list.contains(&1), true);
list.remove(1);
assert_eq!(list.contains(&1), false);
assert_eq!(list.pop(), Option::Some(2));
assert_eq!(list.pop(), Option::Some(3));
assert_eq!(list.peek(), Option::None);
}
#[test]
fn miri_test() {
let mut list = List::default();
list.push(1);
list.push(2);
list.push(3);
assert!(list.pop() == Some(1));
list.push(4);
assert!(list.pop() == Some(2));
list.push(5);
assert!(list.peek() == Some(&3));
list.push(6);
list.peek_mut().map(|x| *x *= 10);
assert!(list.peek() == Some(&30));
assert!(list.pop() == Some(30));
for elem in list.iter_mut() {
*elem *= 100;
}
let mut iter = list.iter();
assert_eq!(iter.next(), Some(&400));
assert_eq!(iter.next(), Some(&500));
assert_eq!(iter.next(), Some(&600));
assert_eq!(iter.next(), None);
assert_eq!(iter.next(), None);
assert!(list.pop() == Some(400));
list.peek_mut().map(|x| *x *= 10);
assert!(list.peek() == Some(&5000));
list.push(7);
}
}

3
src/utility/mod.rs Normal file
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pub mod list;
pub mod objaddr;
pub mod cfg;

95
src/utility/objaddr.rs Normal file
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//! Burritos stores a data structure associating object ids with
//! their references. The ObjAddr struct
//! allows to maintain this data structure.
use std::{collections::HashMap, cell::RefCell, rc::Rc};
use crate::kernel::{synch::{ Semaphore, Lock }, thread::Thread};
/// Brief Definition of object identifiers:
///
/// The struct stores the list of created objects (Semaphore, Lock, ...) and for each of them
/// associates an object identifier than can be passed to subsequent
/// system calls on the object.
///
/// A method allows to detect of an object corresponding to a given
/// identifier exists; this is used to check the parameters of system
/// calls.
#[derive(PartialEq)]
pub struct ObjAddr {
last_id: i32,
semaphores: HashMap<i32, Semaphore>,
locks: HashMap<i32, Lock>,
threads: HashMap<i32, Rc<RefCell<Thread>>>,
}
impl ObjAddr {
/// Initializes and returns a ObjAddr struct
pub fn init() -> Self {
Self {
last_id: 3,
semaphores: HashMap::<i32, Semaphore>::new(),
locks: HashMap::<i32, Lock>::new(),
threads: HashMap::<i32, Rc<RefCell<Thread>>>::new(),
}
}
/// Adds the **obj** Semaphore to self
pub fn add_semaphore(&mut self, obj: Semaphore) -> i32 {
self.last_id += 1;
self.semaphores.insert(self.last_id, obj);
self.last_id
}
/// Adds the **obj** Lock to self
pub fn add_lock(&mut self, obj: Lock) -> i32 {
self.last_id += 1;
self.locks.insert(self.last_id, obj);
self.last_id
}
/// Adds the **obj** Lock to self
pub fn add_thread(&mut self, obj: Rc<RefCell<Thread>>) -> i32 {
self.last_id +=1;
self.threads.insert(self.last_id, obj);
self.last_id
}
/// Searches for a semaphore of id **id** in self
pub fn search_semaphore(&mut self, id: i32) -> Option<&mut Semaphore> {
self.semaphores.get_mut(&id)
}
/// Searches for a lock of id **id** in self
pub fn search_lock(&mut self, id:i32) -> Option<&mut Lock> {
self.locks.get_mut(&id)
}
/// Update lock at given id
pub fn update_lock(&mut self, id: i32, lock: Lock) {
self.locks.insert(id, lock);
}
/// Searches for a lock of id **id** in self
pub fn search_thread(&mut self, id: i32) -> Option<&Rc<RefCell<Thread>>> {
self.threads.get(&id)
}
/// Removes the object of id **id** from self if it exists
pub fn remove_semaphore(&mut self, id: i32) -> Option<Semaphore> {
self.semaphores.remove(&id)
}
/// Remove the object of id **id** from self if it exists
pub fn remove_lock(&mut self, id:i32) -> Option<Lock> {
self.locks.remove(&id)
}
/// Remove the object of id **id** from self if it exists
pub fn remove_thread(&mut self, id: i32) -> Option<Rc<RefCell<Thread>>> {
self.threads.remove(&id)
}
}

3
test/Makefile Normal file
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clean:
make clean -C riscv_instructions
make clean -C syscall_tests

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@ -0,0 +1,8 @@
4000 1b8
00 3f d0 97 41 00 80 e7 00 00 05 13 01 40 00 ef 00 00 80 67 00 00 08 93 00 00 00 73 00 00 80 67 00 10 08 93 00 00 00 73 00 00 80 67 00 20 08 93 00 00 00 73 00 00 80 67 00 30 08 93 00 00 00 73 00 00 80 67 00 40 08 93 00 00 00 73 00 00 80 67 00 50 08 93 00 00 00 73 00 00 80 67 00 60 08 93 00 00 00 73 00 00 80 67 00 70 08 93 00 00 00 73 00 00 80 67 00 80 08 93 00 00 00 73 00 00 80 67 00 90 08 93 00 00 00 73 00 00 80 67 01 f0 08 93 00 00 00 73 00 00 80 67 00 a0 08 93 00 00 00 73 00 00 80 67 01 e0 08 93 00 00 00 73 00 00 80 67 00 b0 08 93 00 00 00 73 00 00 80 67 00 c0 08 93 00 00 00 73 00 00 80 67 00 d0 08 93 00 00 00 73 00 00 80 67 00 e0 08 93 00 00 00 73 00 00 80 67 00 f0 08 93 00 00 00 73 00 00 80 67 01 00 08 93 00 00 00 73 00 00 80 67 02 00 08 93 00 00 00 73 00 00 80 67 01 10 08 93 00 00 00 73 00 00 80 67 01 20 08 93 00 00 00 73 00 00 80 67 01 30 08 93 00 00 00 73 00 00 80 67 01 40 08 93 00 00 00 73 00 00 80 67 01 50 08 93 00 00 00 73 00 00 80 67 01 60 08 93 00 00 00 73 00 00 80 67 01 70 08 93 00 00 00 73 00 00 80 67 01 80 08 93 00 00 00 73 00 00 80 67 01 90 08 93 00 00 00 73 00 00 80 67 01 a0 08 93 00 00 00 73 00 00 80 67 01 b0 08 93 00 00 00 73 00 00 80 67 01 c0 08 93 00 00 00 73 00 00 80 67 01 d0 08 93 00 00 00 73 00 00 80 67 02 10 08 93 00 00 00 73 00 00 80 67 02 20 08 93 00 00 00 73 00 00 80 67 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
400000 1450
fd 01 01 13 02 11 34 23 02 81 30 23 03 01 04 13 fc a4 3c 23 fd 84 37 83 fe f4 34 23 fe 84 37 83 00 07 80 e7 00 00 05 13 ff c0 40 97 ff 80 80 e7 00 00 00 13 02 81 30 83 02 01 34 03 03 01 01 13 00 00 80 67 fe 01 01 13 00 11 3c 23 00 81 38 23 02 01 04 13 fe a4 34 23 fe b4 30 23 00 40 07 b7 00 07 87 93 00 07 87 9b fe 04 37 03 00 07 07 1b 00 07 06 13 00 07 85 93 fe 84 35 03 ff c0 40 97 01 c0 80 e7 00 05 07 93 00 07 85 13 01 81 30 83 01 01 34 03 02 01 01 13 00 00 80 67 fd 01 01 13 02 81 34 23 03 01 04 13 fc a4 3c 23 fc b4 38 23 fe 04 24 23 fe 04 22 23 0b 40 00 6f fe 44 27 83 fd 84 37 03 00 f7 07 b3 00 07 c7 83 02 07 92 63 fe 44 27 83 fd 04 37 03 00 f7 07 b3 00 07 c7 83 00 07 98 63 00 10 07 93 fe f4 24 23 fe 04 26 23 fe 44 27 83 fd 84 37 03 00 f7 07 b3 00 07 c6 83 fe 44 27 83 fd 04 37 03 00 f7 07 b3 00 07 c7 83 00 06 87 13 00 f7 7a 63 00 10 07 93 fe f4 24 23 ff f0 07 93 fe f4 26 23 fe 44 27 83 fd 84 37 03 00 f7 07 b3 00 07 c6 83 fe 44 27 83 fd 04 37 03 00 f7 07 b3 00 07 c7 83 00 06 87 13 00 e7 fa 63 00 10 07 93 fe f4 24 23 00 10 07 93 fe f4 26 23 fe 44 27 83 00 17 87 9b fe f4 22 23 fe 84 27 83 00 07 87 9b f4 07 84 e3 fe c4 27 83 00 07 85 13 02 81 34 03 03 01 01 13 00 00 80 67 fd 01 01 13 02 81 34 23 03 01 04 13 fc a4 3c 23 fc b4 38 23 fe 04 26 23 fe 04 24 23 fd 84 37 83 06 07 86 63 fd 04 37 83 06 07 82 63 04 c0 00 6f fe c4 27 83 fd 04 37 03 00 f7 07 b3 00 07 c7 83 00 07 96 63 00 10 07 93 fe f4 24 23 fe c4 27 83 fd 04 37 03 00 f7 07 33 fe c4 27 83 fd 84 36 83 00 f6 87 b3 00 07 47 03 00 e7 80 23 fe c4 27 83 00 17 87 9b fe f4 26 23 fe 84 27 83 00 07 87 9b fa 07 88 e3 fd 84 37 83 00 80 00 6f 00 00 07 93 00 07 85 13 02 81 34 03 03 01 01 13 00 00 80 67 fd 01 01 13 02 81 34 23 03 01 04 13 fc a4 3c 23 fe 04 26 23 01 00 00 6f fe c4 27 83 00 17 87 9b fe f4 26 23 fe c4 67 83 fd 84 37 03 00 f7 07 b3 00 07 c7 83 fe 07 92 e3 fe c4 27 83 00 07 85 13 02 81 34 03 03 01 01 13 00 00 80 67 fd 01 01 13 02 11 34 23 02 81 30 23 03 01 04 13 fc a4 3c 23 fc b4 38 23 fd 84 35 03 f9 9f f0 ef 00 05 07 93 00 07 87 9b fe f4 24 23 fd 04 35 03 f8 5f f0 ef 00 05 07 93 00 07 87 9b fe f4 22 23 fe 84 27 83 fe f4 26 23 04 40 00 6f fe c4 27 83 00 07 87 13 fe 84 27 83 40 f7 07 bb 00 07 87 9b 00 07 87 13 fd 04 37 83 00 e7 87 33 fe c4 27 83 fd 84 36 83 00 f6 87 b3 00 07 47 03 00 e7 80 23 fe c4 27 83 00 17 87 9b fe f4 26 23 fe 44 27 83 00 07 87 13 fe 84 27 83 00 f7 07 bb 00 07 87 1b fe c4 27 83 00 07 87 9b fa f7 52 e3 fd 84 37 83 00 07 85 13 02 81 30 83 02 01 34 03 03 01 01 13 00 00 80 67 fe 01 01 13 00 81 3c 23 02 01 04 13 00 05 07 93 fe f4 26 23 fe c4 27 83 00 07 87 1b 06 00 07 93 02 e7 d2 63 fe c4 27 83 00 07 87 1b 07 a0 07 93 00 e7 ca 63 fe c4 27 83 fe 07 87 9b 00 07 87 9b 00 80 00 6f fe c4 27 83 00 07 85 13 01 81 34 03 02 01 01 13 00 00 80 67 fe 01 01 13 00 81 3c 23 02 01 04 13 00 05 07 93 fe f4 26 23 fe c4 27 83 00 07 87 1b 05 a0 07 93 02 e7 c2 63 fe c4 27 83 00 07 87 1b 04 00 07 93 00 e7 da 63 fe c4 27 83 02 07 87 9b 00 07 87 9b 00 80 00 6f fe c4 27 83 00 07 85 13 01 81 34 03 02 01 01 13 00 00 80 67 fd 01 01 13 02 81 34 23 03 01 04 13 fc a4 3c 23 fe 04 26 23 fe 04 24 23 fe 04 22 23 fe 04 20 23 fe c4 27 83 fd 84 37 03 00 f7 07 b3 00 07 c7 83 00 07 87 13 02 d0 07 93 0c f7 10 63 00 10 07 93 fe f4 20 23 00 10 07 93 fe f4 26 23 0a c0 00 6f fe c4 27 83 fd 84 37 03 00 f7 07 b3 00 07 c7 83 02 07 8e 63 fe c4 27 83 fd 84 37 03 00 f7 07 b3 00 07 c7 83 00 07 87 13 02 f0 07 93 02 e7 f0 63 fe c4 27 83 fd 84 37 03 00 f7 07 b3 00 07 c7 83 00 07 87 13 03 90 07 93 00 e7 f8 63 00 10 07 93 fe f4 24 23 05 40 00 6f fe 44 27 83 00 07 87 13 00 07 07 93 00 27 97 9b 00 e7 87 bb 00 17 97 9b fe f4 22 23 fe c4 27 83 fd 84 37 03 00 f7 07 b3 00 07 c7 83 00 07 87 9b fd 07 87 9b 00 07 87 9b fe 44 27 03 00 f7 07 bb fe f4 22 23 fe c4 27 83 00 17 87 9b fe f4 26 23 fe 84 27 83 00 07 87 9b f4 07 88 e3 fe 04 27 83 00 07 87 9b 00 07 8a 63 fe 44 27 83 40 f0 07 bb 00 07 87 9b 00 80 00 6f fe 44 27 83 00 07 85 13 02 81 34 03 03 01 01 13 00 00 80 67 fb 01 01 13 04 81 34 23 05 01 04 13 fc a4 34 23 fc b4 30 23 00 06 07 93 fa f4 2e 23 fc 84 37 83 fc f4 3c 23 fc 04 37 83 fc f4 38 23 fe 04 26 23 fe 04 24 23 fe 04 22 23 08 00 00 6f fe 44 27 83 fd 84 37 03 00 f7 07 b3 00 07 c6 83 fe 44 27 83 fd 04 37 03 00 f7 07 b3 00 07 c7 83 00 06 87 13 00 f7 7a 63 00 10 07 93 fe f4 24 23 ff f0 07 93 fe f4 26 23 fe 44 27 83 fd 84 37 03 00 f7 07 b3 00 07 c6 83 fe 44 27 83 fd 04 37 03 00 f7 07 b3 00 07 c7 83 00 06 87 13 00 e7 fa 63 00 10 07 93 fe f4 24 23 00 10 07 93 fe f4 26 23 fe 44 27 83 00 17 87 9b fe f4 22 23 fe 84 27 83 00 07 87 9b 00 07 9a 63 fe 44 27 03 fb c4 27 83 00 07 87 9b f6 f7 66 e3 fe c4 27 83 00 07 85 13 04 81 34 03 05 01 01 13 00 00 80 67 fb 01 01 13 04 81 34 23 05 01 04 13 fc a4 34 23 fc b4 30 23 00 06 07 93 fa f4 2e 23 fc 84 37 83 fe f4 30 23 fc 04 37 83 fc f4 3c 23 fe 04 26 23 fe 04 37 83 04 07 8a 63 fd 84 37 83 04 07 86 63 03 00 00 6f fe c4 27 83 fd 84 37 03 00 f7 07 33 fe c4 27 83 fe 04 36 83 00 f6 87 b3 00 07 47 03 00 e7 80 23 fe c4 27 83 00 17 87 9b fe f4 26 23 fe c4 27 03 fb c4 27 83 00 07 87 9b fc f7 64 e3 fe 04 37 83 00 80 00 6f 00 00 07 93 00 07 85 13 04 81 34 03 05 01 01 13 00 00 80 67 fd 01 01 13 02 81 34 23 03 01 04 13 fc a4 3c 23 00 05 87 93 00 06 07 13 fc f4 2a 23 00 07 07 93 fc f4 28 23 fd 84 37 83 fe f4 30 23 fe 04 26 23 02 80 00 6f fe c4 27 83 fe 04 37 03 00 f7 07 b3 fd 44 27 03 0f f7 77 13 00 e7 80 23 fe c4 27 83 00 17 87 9b fe f4 26 23 fe c4 27 03 fd 04 27 83 00 07 87 9b fc f7 68 e3 fe 04 37 83 00 07 85 13 02 81 34 03 03 01 01 13 00 00 80 67 fd 01 01 13 02 11 34 23 02 81 30 23 03 01 04 13 fc a4 3c 23 00 05 87 93 fc f4 2a 23 fe 04 26 23 14 c0 00 6f fe c4 27 83 00 f7 f7 93 00 07 87 9b 02 07 92 63 fe c4 27 83 fd 84 37 03 00 f7 07 b3 00 07 85 93 00 40 47 b7 00 07 85 13 39 d0 00 ef 02 00 00 6f fe c4 27 83 00 77 f7 93 00 07 87 9b 00 07 98 63 00 40 47 b7 00 87 85 13 37 d0 00 ef fe c4 27 83 fd 84 37 03 00 f7 07 b3 00 07 c7 83 00 47 d7 9b fe f4 05 a3 fe b4 47 83 0f f7 f7 13 00 90 07 93 00 e7 ea 63 fe b4 47 83 03 07 87 9b fe f4 05 a3 01 00 00 6f fe b4 47 83 05 77 87 9b fe f4 05 a3 fe b4 47 83 fe f4 00 23 fe c4 27 83 fd 84 37 03 00 f7 07 b3 00 07 c7 83 00 f7 f7 93 fe f4 05 23 fe a4 47 83 0f f7 f7 13 00 90 07 93 00 e7 ea 63 fe a4 47 83 03 07 87 9b fe f4 05 23 01 00 00 6f fe a4 47 83 05 77 87 9b fe f4 05 23 fe a4 47 83 fe f4 00 a3 fe 04 01 23 fe 04 07 93 00 07 85 93 00 40 47 b7 01 07 85 13 2c d0 00 ef fe c4 27 83 00 17 87 9b 00 07 87 9b 00 07 87 9b 00 f7 f7 93 00 07 87 9b 00 07 8e 63 fd 44 27 83 ff f7 87 9b 00 07 87 1b fe c4 27 83 00 07 87 9b 00 e7 98 63 00 40 47 b7 01 87 85 13 28 d0 00 ef fe c4 27 83 00 17 87 9b fe f4 26 23 fe c4 27 83 00 07 87 13 fd 44 27 83 00 07 07 1b 00 07 87 9b ea f7 42 e3 00 00 00 13 00 00 00 13 02 81 30 83 02 01 34 03 03 01 01 13 00 00 80 67 f5 01 01 13 0a 81 34 23 0b 01 04 13 f6 a4 34 23 00 05 87 93 f4 c4 3c 23 f4 d4 38 23 f6 f4 22 23 f6 84 37 83 00 07 8c 63 f5 84 37 83 00 07 88 63 f6 44 27 83 00 07 87 9b 00 07 d6 63 ff f0 07 93 17 90 00 6f fe 04 24 23 fe 04 26 23 14 d0 00 6f fe c4 27 83 f5 84 37 03 00 f7 07 b3 00 07 c7 83 00 07 87 9b 00 07 87 13 02 50 07 93 0c f7 1e e3 fe c4 27 83 00 17 87 9b fe f4 26 23 fe c4 27 83 f5 84 37 03 00 f7 07 b3 00 07 c7 83 00 07 87 9b 00 07 86 93 02 50 07 13 04 e6 8c 63 00 07 86 93 02 50 07 13 00 e6 ce e3 00 07 86 93 07 80 07 13 00 d7 48 e3 00 07 86 93 06 30 07 13 00 e6 c2 e3 f9 d7 86 9b 00 06 87 1b 01 50 07 93 7e e7 ea 63 02 06 97 93 02 07 d7 93 00 27 97 13 00 40 47 b7 02 87 87 93 00 f7 07 b3 00 07 a7 83 00 07 80 67 f6 44 27 83 ff f7 87 9b 00 07 87 1b fe 84 27 83 00 07 87 9b 00 e7 dc 63 f6 84 37 83 00 17 87 13 f6 e4 34 23 02 50 07 13 00 e7 80 23 fe 84 27 83 00 17 87 9b fe f4 24 23 01 d0 00 6f f5 04 37 83 00 87 87 13 f4 e4 38 23 00 07 a7 83 fe f4 22 23 fe 04 20 23 fe 44 27 83 00 07 87 9b 02 07 de 63 f6 44 27 83 ff f7 87 9b 00 07 87 1b fe 84 27 83 00 07 87 9b 00 e7 dc 63 f6 84 37 83 00 17 87 13 f6 e4 34 23 02 d0 07 13 00 e7 80 23 fe 84 27 83 00 17 87 9b fe f4 24 23 fe 44 27 83 00 07 87 13 00 a0 07 93 02 f7 67 bb f8 f4 2c 23 f9 84 27 83 41 f7 d7 9b f9 84 27 03 00 e7 c7 33 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6
test/riscv_instructions/.gitignore vendored Normal file
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@ -0,0 +1,6 @@
*
!.gitignore
!*.c
!*/
!*.md
!**/Makefile

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@ -0,0 +1,14 @@
build:
make build -C boolean_logic/
make build -C jump_instructions/
make build -C simple_arithmetics/
dumps:
make dumps -C boolean_logic/
make dumps -C jump_instructions/
make dumps -C simple_arithmetics/
clean:
$(MAKE) clean -C boolean_logic/
$(MAKE) clean -C jump_instructions/
$(MAKE) clean -C simple_arithmetics/

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@ -0,0 +1,14 @@
PROGRAMS = comparisons.guac if.guac switch.guac
TOPDIR = ../../..
include $(TOPDIR)/Makefile.rules
build: $(PROGRAMS)
dumps: comparisons.dump if.dump switch.dump
clean:
$(RM) *.o *.guac
# Dependances
$(PROGRAMS): %.guac : $(USERLIB)/sys.o $(USERLIB)/libnachos.o %.o

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@ -0,0 +1,12 @@
PROGRAMS = jump.guac ret.guac
TOPDIR = ../../..
include $(TOPDIR)/Makefile.rules
build: $(PROGRAMS)
dumps: jump.dump ret.dump
clean:
$(RM) *.o *.guac
$(PROGRAMS): %.guac : $(USERLIB)/sys.o $(USERLIB)/libnachos.o %.o

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@ -0,0 +1,12 @@
PROGRAMS = unsigned_addition.guac unsigned_division.guac unsigned_multiplication.guac unsigned_substraction.guac
TOPDIR = ../../..
include $(TOPDIR)/Makefile.rules
build: $(PROGRAMS)
dumps: unsigned_addition.dump unsigned_division.dump unsigned_multiplication.dump unsigned_substraction.dump
clean:
$(RM) *.o *.guac
$(PROGRAMS): %.guac : $(USERLIB)/sys.o $(USERLIB)/libnachos.o %.o

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@ -0,0 +1,12 @@
PROGRAMS = halt.guac prints.guac producteur_consommateur.guac join.guac
TOPDIR = ../..
include $(TOPDIR)/Makefile.rules
build: $(PROGRAMS)
dumps: halt.dump prints.dump
clean:
$(RM) *.o *.guac
$(PROGRAMS): %.guac : $(USERLIB)/sys.o $(USERLIB)/libnachos.o %.o

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@ -0,0 +1,7 @@
#include "userlib/syscall.h"
int main() {
Shutdown();
return 0;
}

26
test/syscall_tests/join.c Normal file
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@ -0,0 +1,26 @@
#include "userlib/syscall.h"
#include "userlib/libnachos.h"
void thread1() {
for(int i = 0; i < 10; i++)
{
n_printf("Hello from th1\n");
}
}
void thread2() {
for(int i = 0; i < 10; i++)
{
n_printf("Hello from th2\n");
}
}
int main() {
ThreadId th1 = threadCreate("thread 1", thread1);
ThreadId th2 = threadCreate("thread 2", thread2);
Join(th1);
Join(th2);
Shutdown();
return 0;
}

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@ -0,0 +1,10 @@
#include "userlib/syscall.h"
#include "userlib/libnachos.h"
int main() {
n_printf("Hello World 1");
n_printf("Hello World 2");
n_printf("Hello World 3");
n_printf("Hello World 4");
return 0;
}

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@ -0,0 +1,48 @@
#include "userlib/syscall.h"
#include "userlib/libnachos.h"
const int N = 3;
int iplein = 0;
int ivide = 0;
int tab[3];
SemId svide;
SemId splein;
void producteur();
void consommateur();
int main() {
svide = SemCreate("producteur", N);
splein = SemCreate("consommateur", 0);
ThreadId producteurTh = threadCreate("producteur", producteur);
ThreadId consommateurTh = threadCreate("consommateur", consommateur);
Join(producteurTh);
Join(consommateurTh);
return 0;
}
void producteur() {
for(int i = 0; i < 10; i++)
{
n_printf("batir une information\n");
P(svide);
iplein = (iplein + 1) % N;
n_printf("communique une information : %d\n", i);
tab[iplein] = i;
V(splein);
}
}
void consommateur() {
for(int i = 0; i < 10; i++)
{
P(splein);
ivide = (ivide +1) % N;
n_printf("recevoir une information\n");
int info = tab[ivide];
V(svide);
n_printf("exploiter l'information : %d\n", info);
}
}

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@ -1,21 +0,0 @@
TOPDIR=.
include $(TOPDIR)/Makefile.config
#
# Main targets
#
dumps:
$(MAKE) dumps -C riscv_instructions/
mkdir -p ${TOPDIR}/target/dumps/
find . -name '*.dump' -exec mv {} ${TOPDIR}/target/dumps/ \;
user_lib:
$(MAKE) -C userlib/
tests: user_lib
$(MAKE) tests -C riscv_instructions/
mkdir -p ${TOPDIR}/target/guac/
find . -name '*.guac' -exec mv {} ${TOPDIR}/target/guac/ \;
clean:
rm -rf $(TOPDIR)/target

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@ -1,9 +0,0 @@
dumps:
make dumps -C boolean_logic/
make dumps -C jump_instructions/
make dumps -C simple_arithmetics/
tests:
make tests -C boolean_logic/
make tests -C jump_instructions/
make tests -C simple_arithmetics/

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@ -1,9 +0,0 @@
TOPDIR = ../..
include $(TOPDIR)/Makefile.tests
dumps: comparisons.dump if.dump switch.dump
tests: comparisons.guac if.guac switch.guac
# Dependances
$(PROGRAMS): % : $(USERLIB)/sys.o $(USERLIB)/libnachos.o %.o

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@ -1,6 +0,0 @@
TOPDIR = ../..
include $(TOPDIR)/Makefile.tests
dumps: jump.dump ret.dump
tests: jump.guac ret.guac

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@ -1,6 +0,0 @@
TOPDIR = ../..
include $(TOPDIR)/Makefile.tests
dumps: unsigned_addition.dump unsigned_division.dump unsigned_multiplication.dump unsigned_substraction.dump
tests: unsigned_addition.guac unsigned_division.guac unsigned_multiplication.guac unsigned_substraction.guac

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@ -1,4 +0,0 @@
TOPDIR = ../
include $(TOPDIR)/Makefile.tests
default: sys.o libnachos.o

7
userlib/Makefile Normal file
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@ -0,0 +1,7 @@
TOPDIR = ../
include $(TOPDIR)/Makefile.rules
default: sys.o libnachos.o
clean:
$(RM) libnachos.o sys.o

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@ -1,5 +1,5 @@
/* Start.s
* Assembly language assist for user programs running on top of Nachos.
* Assembly language assist for user programs running on top of BurritOS.
*
* Since we don't want to pull in the entire C library, we define
* what we need for a user program here, namely Start and the system
@ -63,9 +63,9 @@ __start:
* -------------------------------------------------------------
*/
.globl Halt
.type __Halt, @function
Halt:
.globl Shutdown
.type __Shutdown, @function
Shutdown:
addi a7,zero,SC_HALT
ecall
jr ra

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@ -84,7 +84,7 @@
typedef int t_error;
/* Stop Nachos, and print out performance stats */
void Halt();
void Shutdown();
/* Return the time spent running Nachos */

183
userlib/syscall.rs Normal file
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@ -0,0 +1,183 @@
use std::str::Chars;
/// Define the BurritOS running time basic unit
pub struct BurritosTime {
seconds: i64,
nanos: i64
}
/// A unique identifier for a thread executed within a user program
pub struct ThreadId{
id: u64
}
/// The system call interface. These are the operations the BurritOS
/// kernel needs to support, to be able to run user programs.
pub struct TError {
t: i32
}
/// A unique identifier for an open BurritOS file.
pub struct OpenFiledId{
id: u64
}
/// System calls concerning semaphores management
pub struct SemId{
id: u64
}
/// System calls concerning locks management
pub struct LockId{
id: u64
}
/// System calls concerning conditions variables.
pub struct CondId{
id: u64
}
extern "C" {
///Stop BurritOS, and print out performance stats
fn Shutdown() -> ();
/// Return the time spent running BurritOS
/// ## Param
/// - **t** a struct to define the time unit
fn SysTime(t: BurritosTime) -> ();
/// This user program is done
/// ## Param
/// - **status** status at the end of execution *(status = 0 means exited normally)*.
fn Exit(status: i32) -> ();
/// Run the executable, stored in the BurritOS file "name", and return the
/// master thread identifier
fn Exec(name: *const char) -> ThreadId;
/// Create a new thread in the current process
/// Return thread identifier
fn newThread(debug_name: *const char, func: i32, arg: i32) -> ThreadId;
/// Only return once the the thread "id" has finished.
fn Join (id: ThreadId) -> TError;
/// Yield the CPU to another runnable thread, whether in this address space
/// or not.
fn Yield() -> ();
/// Print the last error message with the personalized one "mess"
fn PError(mess: *const char) -> ();
/// Create a BurritOS file, with "name"
fn Create(name: *const char, size: i32) -> TError;
/// Open the Nachos file "name", and return an "OpenFileId" that can
/// be used to read and write to the file.
fn Open(name: *const char) -> OpenFiledId;
/// Write "size" bytes from "buffer" to the open file.
fn Write(buffer: *const char, size: i32, id: OpenFiledId) -> TError;
/// Read "size" bytes from the open file into "buffer".
/// Return the number of bytes actually read -- if the open file isn't
/// long enough, or if it is an I/O device, and there aren't enough
/// characters to read, return whatever is available (for I/O devices,
/// you should always wait until you can return at least one character).
fn Read(buffer: *const char, size: i32, id:OpenFiledId) -> TError;
/// Seek to a specified offset into an opened file
fn Seek(offset: i32, id: OpenFiledId) -> TError;
/// Close the file, we're done reading and writing to it.
fn Close(id: OpenFiledId) -> TError;
/// Remove the file
fn Remove(name: *const char) -> TError;
////////////////////////////////////////////////////
/// system calls concerning directory management ///
////////////////////////////////////////////////////
/// Create a new repertory
/// Return a negative number if an error ocurred.
fn mkdir(name: *const char) -> t_length;
/// Destroy a repertory, which must be empty.
/// Return a negative number if an error ocurred.
fn Rmdir(name: *const char) -> TError;
/// List the content of BurritOS FileSystem
fn FSList() -> TError;
/// Create a semaphore, initialising it at count.
/// Return a Semid, which will enable to do operations on this
/// semaphore
fn SemCreate(debug_name: *const char, count: i32) -> SemId;
/// Destroy a semaphore identified by sema.
/// Return a negative number if an error occured during the destruction
fn SemDestroy(sema: SemId) -> TError;
/// Do the operation P() on the semaphore sema
fn P(sema: SemId) -> TError;
/// Do the operation V() on the semaphore sema
fn V(sema: SemId) -> TError;
/// Create a lock.
/// Return an identifier
fn LockCreate(debug_name: *const char) -> LockId;
/// Destroy a lock.
/// Return a negative number if an error ocurred
/// during the destruction.
fn LockDestroy(id: LockId) -> TError;
/// Do the operation Acquire on the lock id.
/// Return a negative number if an error ocurred.
fn LockAcquire(id: LockId) -> TError;
/// Do the operation Release on the lock id.
/// Return a negative number if an error ocurred.
fn LockRelease(id: LockId) -> TError;
/// Create a new condition variable
fn CondCreate(debug_name: *const char) -> CondId;
/// Destroy a condition variable.
/// Return a negative number if an error ocurred.
fn CondDestroy(id: CondId) -> TError;
/// Do the operation Wait on a condition variable.
/// Returns a negative number if an error ocurred.
fn CondWait(id: CondId) -> TError;
/// Do the operation Signal on a condition variable (wake up only one thread).
/// Return a negative number if an error ocurred.
fn CondSignal(id: CondId) -> TError;
/// Do the operation Signal on a condition variable (wake up all threads).
/// Return a negative number if an error ocurred.
fn CondBroadcast(id: CondId) -> TError;
///////////////////////////////////////////////////////
/// # System calls concerning serial port and console
///////////////////////////////////////////////////////
///Send the message on the serial communication link.
/// Returns the number of bytes successfully sent.
fn TtySend(mess: *const char) -> i32;
/// Wait for a message comming from the serial communication link.
/// The length of the buffer where the bytes will be copied is given as a parameter.
/// Returns the number of characters actually received.
fn TtyReceive(mess: *const char, length: i32) -> i32;
/// Map an opened file in memory. Size is the size to be mapped in bytes.
fn Mmap(id: OpenFiledId, size: i32) -> *mut ();
/// For debug purpose
fn Debug(param: i32)-> ();
}