ff8b95f21a
block_compiler puts in the extra, that we get out when resolving the type Thus block args work, though only by assuming direct call
126 lines
4.4 KiB
Ruby
126 lines
4.4 KiB
Ruby
module Risc
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# CallableCompiler is used to generate risc instructions. It is an abstact base
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# class shared by BlockCompiler and MethodCompiler
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# - risc_instructions: The sequence of risc level instructions that mom was compiled to
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# - cpu_instructions: The sequence of cpu specific instructions that the
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# risc_instructions was compiled to
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# Instructions derive from class Instruction and form a linked list
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class CallableCompiler
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def initialize( )
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@regs = []
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@risc_instructions = Risc.label(source_name, source_name)
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@risc_instructions << Risc.label( source_name, "unreachable")
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@current = @risc_instructions
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@constants = []
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@block_compilers = []
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end
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attr_reader :risc_instructions , :constants , :block_compilers
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# convert the given mom instruction to_risc and then add it (see add_code)
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# continue down the instruction chain unti depleted
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# (adding moves the insertion point so the whole mom chain is added as a risc chain)
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def add_mom( instruction )
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while( instruction )
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raise "whats this a #{instruction}" unless instruction.is_a?(Mom::Instruction)
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#puts "adding mom #{instruction.to_s}:#{instruction.next.to_s}"
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risc = instruction.to_risc( self )
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add_code(risc)
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reset_regs
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#puts "adding risc #{risc.to_s}:#{risc.next.to_s}"
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instruction = instruction.next
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end
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end
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# add a constant (which get created during compilation and need to be linked)
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def add_constant(const)
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raise "Must be Parfait #{const}" unless const.is_a?(Parfait::Object)
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@constants << const
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end
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# add a risc instruction after the current (insertion point)
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# the added instruction will become the new insertion point
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def add_code( instruction )
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raise "Not an instruction:#{instruction.to_s}" unless instruction.is_a?(Risc::Instruction)
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raise instruction.to_s if( instruction.class.name.split("::").first == "Arm")
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new_current = instruction.last #after insertion this point is lost
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@current.insert(instruction) #insert after current
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@current = new_current
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self
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end
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# require a (temporary) register. code must give this back with release_reg
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# Second extra parameter may give extra info about the value, see RegisterValue
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def use_reg( type , extra = {} )
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raise "Not type #{type.inspect}" unless type.is_a?(Symbol) or type.is_a?(Parfait::Type)
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if @regs.empty?
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reg = Risc.tmp_reg(type , extra)
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else
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reg = @regs.last.next_reg_use(type , extra)
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end
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@regs << reg
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return reg
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end
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# resolve the type of the slot, by inferring from it's name, using the type
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# scope related slots are resolved by the compiler by method/block
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def slot_type( slot , type)
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case slot
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when :frame
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new_type = self.frame_type
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when :arguments
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new_type = self.arg_type
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when :receiver
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new_type = self.receiver_type
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when Symbol
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new_type = type.type_for(slot)
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raise "Not found object #{slot}: in #{type}" unless new_type
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else
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raise "Not implemented object #{slot}:#{slot.class}"
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end
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#puts "RESOLVE in #{@type.class_name} #{slot}->#{type}"
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return new_type
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end
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def copy( reg , source )
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copied = use_reg reg.type
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add_code Register.transfer( source , reg , copied )
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copied
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end
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# releasing a register (accuired by use_reg) makes it available for use again
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# thus avoiding possibly using too many registers
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def release_reg( reg )
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last = @regs.pop
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raise "released register in wrong order, expect #{last} but was #{reg}" if reg != last
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end
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# reset the registers to be used. Start at r4 for next usage.
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# Every statement starts with this, meaning each statement may use all registers, but none
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# get saved. Statements have affect on objects.
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def reset_regs
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@regs.clear
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end
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# Build with builder (see there), adding the created instructions
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def build(&block)
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builder.build(&block)
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end
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# return a new code builder that uses this compiler
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# CodeBuilder returns code after building
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def code_builder( source)
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CodeBuilder.new(self , source)
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end
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# return a CompilerBuilder
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# CompilerBuilder adds the generated code to the compiler
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def compiler_builder( source)
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CompilerBuilder.new(self , source)
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end
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end
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end
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