rubyx/lib/risc/instructions
2020-03-22 14:31:43 +02:00
..
branch.rb adding register_names to instruction protocol 2020-03-22 14:31:43 +02:00
byte_to_reg.rb remove resolve_to_register 2018-07-16 19:19:49 +03:00
dynamic_jump.rb adding register_names to instruction protocol 2020-03-22 14:31:43 +02:00
function_call.rb adding register_names to instruction protocol 2020-03-22 14:31:43 +02:00
function_return.rb adding register_names to instruction protocol 2020-03-22 14:31:43 +02:00
getter.rb adding register_names to instruction protocol 2020-03-22 14:31:43 +02:00
instruction.rb adding register_names to instruction protocol 2020-03-22 14:31:43 +02:00
label.rb adding register_names to instruction protocol 2020-03-22 14:31:43 +02:00
load_constant.rb adding register_names to instruction protocol 2020-03-22 14:31:43 +02:00
load_data.rb adding register_names to instruction protocol 2020-03-22 14:31:43 +02:00
operator_instruction.rb adding register_names to instruction protocol 2020-03-22 14:31:43 +02:00
reg_to_byte.rb remove Risc.resolve_to_index 2018-07-16 19:00:04 +03:00
reg_to_slot.rb codong RegisterSlot with reg and slot 2020-03-22 14:31:43 +02:00
setter.rb adding register_names to instruction protocol 2020-03-22 14:31:43 +02:00
slot_to_reg.rb fix slot_to_reg to allow register indexes 2020-03-22 14:31:43 +02:00
syscall.rb adding register_names to instruction protocol 2020-03-22 14:31:43 +02:00
transfer.rb adding register_names to instruction protocol 2020-03-22 14:31:43 +02:00