History

Torsten Ruger c5ec532616 use common list for risc instruction strange that that was not done before as the code was clearly copied when extracting it Fix bug for insertion		2018-03-18 10:36:01 +05:30
..
builtin	rename self to receiver	2018-03-14 20:26:13 +05:30
instructions	fixing tests for shifting constants into slots	2018-03-17 21:15:38 +05:30
assembler.rb	using sof again, now rxf	2017-10-05 16:41:45 +03:00
boot.rb	adding cache entry to parfait	2018-03-17 19:03:39 +05:30
collector.rb	rename register to risc	2017-01-19 09:02:29 +02:00
eventable.rb	rename register to risc	2017-01-19 09:02:29 +02:00
instruction.rb	use common list for risc instruction	2018-03-18 10:36:01 +05:30
interpreter.rb	rename register to risc	2017-01-19 09:02:29 +02:00
machine.rb	polish docs	2018-03-11 16:11:15 +05:30
method_compiler.rb	first local assignment risc test	2018-03-17 11:13:44 +05:30
padding.rb	rename register to risc	2017-01-19 09:02:29 +02:00
positioned.rb	rename register to risc	2017-01-19 09:02:29 +02:00
README.md	polish docs	2018-03-11 16:11:15 +05:30
register_value.rb	fix most of slot_load to_risc	2018-03-17 21:32:09 +05:30

README.md

Risc Machine

The RiscMachine, is an abstract machine with registers. Think of it as an arm machine with normal instruction names. It is not however an abstraction of existing hardware, but only of that subset that we need.

Our primary objective is to compile typed code to this level, so the register machine has:

object access instructions
object load
object oriented call semantics
extended (and extensible) branching
normal integer operators (but no sub word instructions)

All data is in objects.

The register machine is aware of Parfait objects, and specifically uses Message and Frame to express call semantics.

Calls and syscalls

The RiscMachine only uses 1 fixed register, the currently worked on Message. (and assumes a program counter and flags, neither of which are directly manipulated)

There is no stack, rather messages form a linked list, and preparing to call, the data is pre-filled into the next message. Calling then means moving the new message to the current one and jumping to the address of the method. Returning is the somewhat reverse process.

Syscalls are implemented by one Syscall instruction. The Risc machine does not specify/limit the meaning or number of syscalls. This is implemented by the level below, eg the arm/interpreter.

Interpreter

There is an interpreter that can interpret compiled register machine programs. This is very handy for debugging (and nothing else).

Even more handy is the graphical interface for the interpreter, which is in it's own repository: rubyx-debugger.

Arm / Elf

There is also a (very straightforward) transformation to arm instructions. Together with the also quite minimal elf module, arm binaries can be produced.

These binaries have no external dependencies and in fact can not even call c at the moment (only syscalls :-)).