rubyx/lib/risc
2018-06-30 00:39:23 +03:00
..
builtin rename method_compiler 2018-06-29 14:48:52 +03:00
instructions rename risc_value to register_value 2018-06-29 11:39:07 +03:00
position fix label loading in arm 2018-06-19 17:35:00 +03:00
binary_writer.rb jump was written off the end of binary code, fixed 2018-05-28 11:45:04 +03:00
builder.rb rename method_compiler 2018-06-29 14:48:52 +03:00
builtin.rb move builtin boot to builtin module 2018-06-29 11:23:26 +03:00
collector.rb crete positions while collecting objects 2018-06-15 21:54:21 +03:00
fake_memory.rb use fake memory 2018-05-28 15:09:59 +03:00
instruction.rb split create_binary into two phases 2018-06-17 13:53:17 +03:00
interpreter_platform.rb dragging the extra through resets 2018-05-25 19:04:48 +03:00
interpreter.rb rename risc_value to register_value 2018-06-29 11:39:07 +03:00
machine.rb hoist parfait boot out of the machine boot 2018-06-30 00:39:23 +03:00
padding.rb fix opal error 2018-05-20 15:51:36 +03:00
parfait_adapter.rb move adapter stuff around 2018-06-29 14:26:25 +03:00
parfait_boot.rb fix list to expand 2018-06-29 20:58:59 +03:00
platform.rb make the interpreter platform 2018-05-17 09:31:36 +03:00
README.md polish docs 2018-03-11 16:11:15 +05:30
register_value.rb rename risc_value to register_value 2018-06-29 11:39:07 +03:00
risc_compiler.rb rename method_compiler 2018-06-29 14:48:52 +03:00
text_writer.rb objects didn't get positions 2018-06-16 10:58:54 +03:00

Risc Machine

The RiscMachine, is an abstract machine with registers. Think of it as an arm machine with normal instruction names. It is not however an abstraction of existing hardware, but only of that subset that we need.

Our primary objective is to compile typed code to this level, so the register machine has:

  • object access instructions
  • object load
  • object oriented call semantics
  • extended (and extensible) branching
  • normal integer operators (but no sub word instructions)

All data is in objects.

The register machine is aware of Parfait objects, and specifically uses Message and Frame to express call semantics.

Calls and syscalls

The RiscMachine only uses 1 fixed register, the currently worked on Message. (and assumes a program counter and flags, neither of which are directly manipulated)

There is no stack, rather messages form a linked list, and preparing to call, the data is pre-filled into the next message. Calling then means moving the new message to the current one and jumping to the address of the method. Returning is the somewhat reverse process.

Syscalls are implemented by one Syscall instruction. The Risc machine does not specify/limit the meaning or number of syscalls. This is implemented by the level below, eg the arm/interpreter.

Interpreter

There is an interpreter that can interpret compiled register machine programs. This is very handy for debugging (and nothing else).

Even more handy is the graphical interface for the interpreter, which is in it's own repository: rubyx-debugger.

Arm / Elf

There is also a (very straightforward) transformation to arm instructions. Together with the also quite minimal elf module, arm binaries can be produced.

These binaries have no external dependencies and in fact can not even call c at the moment (only syscalls :-)).