Torsten Ruger 97b4c469f8 fixing register order in some instructions ... and their use Arm is confusing as it has result as first arg we use forward logic, i.e. from -> to		2015-06-27 20:09:21 +03:00
..
instructions	fix the move, correct for funny pipeline	2015-06-27 20:07:42 +03:00
passes	fixing register order in some instructions	2015-06-27 20:09:21 +03:00
arm_machine.rb	finish syscall	2015-06-24 16:07:27 +03:00
constants.rb	mem_length to word/byte length	2015-06-05 09:20:43 +03:00
instruction.rb	update to use parfait not virtual	2015-05-29 12:33:40 +03:00
machine_code.rb	homing in on line length 100	2015-05-30 12:20:39 +03:00
nodes.rb	reinserted arm for now, until dependecy is cleaned up. fixed tests	2014-08-30 19:40:37 +03:00