119 lines
4.6 KiB
Ruby
119 lines
4.6 KiB
Ruby
module Arm
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class LogicInstruction < Instruction
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# result = left op right #or constant loading
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#
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# Logic instruction are your basic operator implementation. But unlike the (normal) code we write
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# these Instructions must have "place" to write their results. Ie when you write 4 + 5 in ruby
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# the result is sort of up in the air, but with Instructions the result must be assigned
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def initialize(result , left , right , attributes = {})
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super(nil)
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@attributes = attributes
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@result = result
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@left = left
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@right = right
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@attributes[:update_status] = 1 if @attributes[:update_status] == nil
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@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
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raise "Left arg must be given #{inspect}" unless @left
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end
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attr_accessor :result , :left , :right
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def assemble(io)
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left , right = determine_operands
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immediate = 1 # default, unless register (below)
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if (right.is_a?(Numeric))
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operand = handle_numeric(right)
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elsif (right.is_a?(Symbol) or right.is_a?(::Risc::RegisterValue))
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operand = reg_code(right) #integer means the register the integer is in (otherwise constant)
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immediate = 0 # ie not immediate is register
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else
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raise "invalid operand argument #{right.inspect} , #{inspect}"
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end
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left_code = reg_code(left)
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op = shift_handling
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if( opcode == :mul )
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operand = reg_code(left) + 0x90
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op = reg_code(right) << 8
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left_code = reg_code(@result)
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end
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val = shift(operand , 0)
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val |= shift(op , 0) # any barrel action, is already shifted
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val |= shift(result , 12)
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val |= shift(left_code , 12 + 4)
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val |= shift(@attributes[:update_status] , 12 + 4 + 4)#20
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val |= shift(op_bit_code , 12 + 4 + 4 + 1)
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val |= shift(immediate , 12 + 4 + 4 + 1 + 4)
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val |= instruction_code
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val |= condition_code
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io.write_unsigned_int_32 val
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end
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def result
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opcode == :mul ? 0 : reg_code(@result)
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end
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def instuction_class
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0b00 # OPC_DATA_PROCESSING
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end
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# Arm can't load any large (over 1024) numbers, or larger with fancy shifting,
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# but then the lower bits must be 0's. Especially in constant loading random large numbers
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# happen, and so they are split into two instructions. An exeption is thrown, that triggers
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# some position handling and an @extra add instruction generated.
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def handle_numeric(right)
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return right if (right.fits_u8?) # no shifting needed
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if (op_with_rot = calculate_u8_with_rr(right))
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return op_with_rot
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end
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unless @extra
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# puts "RELINK L at #{Risc::Position.get(self)}"
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# use sub for sub and add for add, ie same as opcode
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insert ArmMachine.send( opcode , result , result , 0 ) #noop
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@extra = @next
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end
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shift = 0xFF
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operand = nil
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until( operand )
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mask = 0xFFFFFFFF ^ shift
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# now we can do the actual breaking of instruction, by splitting the operand
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operand = calculate_u8_with_rr( right & mask )
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@next.set_value(right & shift )
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raise "internal #{shift} for #{self}" if shift > 0xFFFFFF
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shift = (shift << 8) + 0xFF
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end
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return operand
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end
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def set_value(val)
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@right = val
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end
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# don't overwrite instance variables, to make assembly repeatable
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# this also loads constants, which are issued as pc relative adds
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def determine_operands
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if( @left.is_a?(Parfait::Object) or @left.is_a?(Risc::Label) or
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(@left.is_a?(Symbol) and !Risc::RegisterValue.look_like_reg(@left)))
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left = @left
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left = left.address if left.is_a?(Risc::Label)
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# do pc relative addressing with the difference to the instuction
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# 8 is for the funny pipeline adjustment (ie pointing to fetch and not execute)
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right = Risc::Position.get(left) - 8
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right -= Risc::Position.get(self).at
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if( (right < 0) && ((opcode == :add) || (opcode == :sub)) )
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right *= -1 # this works as we never issue sub only add
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set_opcode :sub # so (as we can't change the sign permanently) we can change the opcode
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end # and the sign even for sub (beucase we created them)
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raise "No negatives implemented #{self} #{right} " if right < 0
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return :pc , right
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else
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return @left , @right
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end
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end
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def to_s
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"#{self.class.name} #{opcode} #{@result} = #{@left} #{@right} extra=#{@extra}"
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end
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end
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end
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