71 lines
2.4 KiB
Ruby
71 lines
2.4 KiB
Ruby
require_relative "../helper"
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module Risc
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class InterpreterPlusTest < MiniTest::Test
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include Ticker
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def setup
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@preload = "Integer.plus"
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@string_input = as_main("return 5 + 5")
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super
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end
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#FIXME should be macro test, no need to interpret
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def test_chain
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#show_main_ticks # get output of what is
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check_main_chain [LoadConstant, SlotToReg, RegToSlot, LoadConstant, SlotToReg, #5
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RegToSlot, LoadConstant, SlotToReg, RegToSlot, LoadConstant, #10
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SlotToReg, RegToSlot, SlotToReg, FunctionCall, LoadConstant, #15
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SlotToReg, LoadConstant, OperatorInstruction, IsNotZero, SlotToReg, #20
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RegToSlot, SlotToReg, SlotToReg, SlotToReg, SlotToReg, #25
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OperatorInstruction, RegToSlot, RegToSlot, SlotToReg, RegToSlot, #30
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Branch, Branch, SlotToReg, SlotToReg, RegToSlot, #35
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SlotToReg, SlotToReg, SlotToReg, FunctionReturn, SlotToReg, #40
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RegToSlot, Branch, SlotToReg, SlotToReg, RegToSlot, #45
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SlotToReg, SlotToReg, SlotToReg, FunctionReturn, Transfer, #50
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SlotToReg, SlotToReg, Syscall, NilClass,] #55
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assert_equal 10 , get_return
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end
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def base_ticks(num)
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main_ticks(14 + num)
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end
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def test_base
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cal = main_ticks( 14 )
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assert_equal FunctionCall , cal.class
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end
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def test_load_receiver
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sl = base_ticks( 8 )
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assert_slot_to_reg( sl , :r0 , 2 , :r2)
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end
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def test_reduce_receiver
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sl = base_ticks( 9 )
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assert_slot_to_reg( sl , :r2 , 2 , :r2)
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end
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def test_slot_args #load args from message
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sl = base_ticks( 10 )
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assert_slot_to_reg( sl , :r0 , 9 , :r3)
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end
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def test_reduce_arg
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sl = base_ticks( 11 )
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assert_slot_to_reg( sl , :r3 , 2 , :r3)
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assert_equal 5 , @interpreter.get_register(:r3)
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end
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def test_op
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op = base_ticks(12)
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assert_equal OperatorInstruction , op.class
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assert_equal :+ , op.operator
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assert_equal :r2 , op.left.symbol
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assert_equal :r3 , op.right.symbol
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assert_equal 10 , @interpreter.get_register(:r2)
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assert_equal 5 , @interpreter.get_register(:r3)
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end
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def test_move_res_to_int
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int = base_ticks( 13 )
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assert_reg_to_slot( int , :r2 , :r1 , 2)
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end
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def test_move_int_to_reg
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int = base_ticks( 14 )
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assert_reg_to_slot( int , :r1 , :r0 , 5)
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end
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end
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end
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