History

Torsten Ruger 0f183b3a74 fix value return and test slot load was wrong way around		2018-03-23 20:02:17 +02:00
..
builtin	mostly brackets and formatting	2018-03-23 18:55:23 +02:00
instructions	add source to the to_s	2018-03-22 18:38:19 +02:00
assembler.rb	simplify method entry exit codes	2018-03-21 16:02:46 +05:30
boot.rb	adding Tue False and Nil Class to Parfait	2018-03-19 21:18:56 +05:30
collector.rb	fix local name being string (not symbol)	2018-03-22 21:08:13 +05:30
eventable.rb	rename register to risc	2017-01-19 09:02:29 +02:00
instruction.rb	mostly brackets and formatting	2018-03-23 18:55:23 +02:00
interpreter.rb	fix value return and test	2018-03-23 20:02:17 +02:00
machine.rb	polish docs	2018-03-11 16:11:15 +05:30
method_compiler.rb	mostly brackets and formatting	2018-03-23 18:55:23 +02:00
padding.rb	rename register to risc	2017-01-19 09:02:29 +02:00
positioned.rb	rename register to risc	2017-01-19 09:02:29 +02:00
README.md	polish docs	2018-03-11 16:11:15 +05:30
register_value.rb	start using tmp registers at 1	2018-03-23 18:57:16 +02:00

README.md

Risc Machine

The RiscMachine, is an abstract machine with registers. Think of it as an arm machine with normal instruction names. It is not however an abstraction of existing hardware, but only of that subset that we need.

Our primary objective is to compile typed code to this level, so the register machine has:

object access instructions
object load
object oriented call semantics
extended (and extensible) branching
normal integer operators (but no sub word instructions)

All data is in objects.

The register machine is aware of Parfait objects, and specifically uses Message and Frame to express call semantics.

Calls and syscalls

The RiscMachine only uses 1 fixed register, the currently worked on Message. (and assumes a program counter and flags, neither of which are directly manipulated)

There is no stack, rather messages form a linked list, and preparing to call, the data is pre-filled into the next message. Calling then means moving the new message to the current one and jumping to the address of the method. Returning is the somewhat reverse process.

Syscalls are implemented by one Syscall instruction. The Risc machine does not specify/limit the meaning or number of syscalls. This is implemented by the level below, eg the arm/interpreter.

Interpreter

There is an interpreter that can interpret compiled register machine programs. This is very handy for debugging (and nothing else).

Even more handy is the graphical interface for the interpreter, which is in it's own repository: rubyx-debugger.

Arm / Elf

There is also a (very straightforward) transformation to arm instructions. Together with the also quite minimal elf module, arm binaries can be produced.

These binaries have no external dependencies and in fact can not even call c at the moment (only syscalls :-)).