rubyx/lib/risc
Torsten e8111c259b fix last tests that required faked returns 2020-03-28 19:46:07 +02:00
..
instructions Fix non ssa issue 2020-03-22 14:31:43 +02:00
position Fixed almost all but Interpreter 2019-08-13 00:13:29 +03:00
README.md litte bit of docs 2018-08-24 18:49:44 +03:00
assembler.rb generalize assemblers to use callables 2018-07-30 10:23:42 +03:00
binary_writer.rb jump was written off the end of binary code, fixed 2018-05-28 11:45:04 +03:00
block_compiler.rb Add number of registers to platform 2020-02-26 19:01:01 +02:00
builder.rb fix allocate in builder 2020-03-22 14:31:43 +02:00
callable_compiler.rb add register names to allocator 2020-03-22 14:31:43 +02:00
collector.rb Introduce singleton types 2019-10-01 19:42:16 +03:00
fake_memory.rb cache index resolution 2018-08-12 13:09:34 +03:00
interpreter.rb fix last tests that required faked returns 2020-03-28 19:46:07 +02:00
interpreter_platform.rb Add number of registers to platform 2020-02-26 19:01:01 +02:00
linker.rb add a statistics command to compiler 2019-09-05 13:25:40 +03:00
method_compiler.rb More rename cleanp 2019-10-03 21:07:55 +03:00
parfait_adapter.rb do not copy name of method 2020-03-25 12:43:57 +02:00
parfait_boot.rb starting on risc allocation 2020-03-22 14:31:43 +02:00
platform.rb fix register use in putstring 2020-03-26 11:24:56 +02:00
register_slot.rb create a reduce_int on RegisterSlot 2020-03-22 14:31:43 +02:00
register_value.rb Fix non ssa issue 2020-03-22 14:31:43 +02:00
risc_collection.rb starting on risc allocation 2020-03-22 14:31:43 +02:00
standard_allocator.rb setting registers in the allocator 2020-03-22 14:31:43 +02:00
text_writer.rb adding integer compare tests and fixing returns 2020-03-28 18:41:59 +02:00

README.md

Risc Machine

The Risc Machine, is an abstract machine with registers. Think of it as an arm machine with normal instruction names. It is not however an abstraction of existing hardware, but only of that subset that we need.

Our primary objective is to compile typed code to this level, so the register machine has:

  • object access instructions
  • object load
  • object oriented call semantics
  • extended (and extensible) branching
  • normal integer operators

All data is in objects.

The register machine is aware of Parfait objects, and specifically uses Message and Frame to express call semantics.

Calls and syscalls

The Risc Machine only uses 1 fixed register, the currently worked on Message. (and assumes a program counter and flags, neither of which are directly manipulated)

There is no stack, rather messages form a linked list, and preparing to call, the data is pre-filled into the next message. Calling then means moving the new message to the current one and jumping to the address of the method. Returning is the somewhat reverse process.

Syscalls are implemented by one Syscall instruction. The Risc machine does not specify/limit the meaning or number of syscalls. This is implemented by the level below, eg the arm/interpreter.

Interpreter

There is an interpreter that can interpret programs compiled to the risc instruction set. This is very handy for debugging (and nothing else).

Even more handy is the graphical interface for the interpreter, which is in it's own repository: rubyx-debugger.

Arm / Elf

There is also a (very straightforward) transformation to arm instructions. Together with the also quite minimal elf module, arm binaries can be produced.

These binaries have no external dependencies and in fact can not even call c at the moment (only syscalls :-)).