Commit Graph

18 Commits

Author SHA1 Message Date
Torsten Ruger
59e6298879 first resolved call running though
and returning an int, as it should
just the value .  .  .
2018-04-08 23:45:23 +03:00
Torsten Ruger
c2860bef7a fix interpreter operator args
as in binary strings words symbols will be same
2018-04-08 01:26:29 +03:00
Torsten Ruger
bf8e9e508b opal hack 2018-04-07 22:35:48 +03:00
Torsten Ruger
4a2a1da3ff little spring clean 2018-04-03 15:23:19 +03:00
Torsten Ruger
17b52d4e80 fix dynamic resolution
was loading self, when it needs to load receiver
some more test (up to the resolve) start working
2018-04-03 12:55:28 +03:00
Torsten Ruger
beb487eb09 minor fixes 2018-04-02 19:31:08 +03:00
Torsten Ruger
fb29fb6431 linked list of methods instead of list of methods
api changes slightly, especially for each, but mostly sama sama
2018-04-02 16:36:43 +03:00
Torsten Ruger
6e941ebcb7 introduce load_data instruction
which just loads data to a register (used internally)
as opposed to integers, which are objects
2018-03-31 12:38:30 +03:00
Torsten Ruger
4cc1d8455e fix util namespace
and instruction move ripples
2018-03-26 20:05:30 +03:00
Torsten Ruger
4a26bec0f1 move eventable to util and rename common to util 2018-03-26 19:46:38 +03:00
Torsten Ruger
3090ccffea keep risc and cpu instructions separate in method
that overwriting was a bit of thorn
2018-03-25 19:33:50 +03:00
Torsten Ruger
793fa313a5 change operators to symbols 2018-03-24 17:53:27 +02:00
Torsten Ruger
2c137e8c97 div10 test for interpreter 2018-03-24 12:21:46 +02:00
Torsten Ruger
0f183b3a74 fix value return and test
slot load was wrong way around
2018-03-23 20:02:17 +02:00
Torsten Ruger
472b1a638a add register logging and fix function return
return semantics used to be different, now only register is given
2018-03-23 18:56:38 +02:00
Torsten Ruger
34903829ca fix interpreter test harness and start testing
interpreter on debug for now
2018-03-22 18:54:40 +02:00
Torsten Ruger
b4489b1093 rename RiscTransfer to Transfer 2018-03-21 15:48:04 +05:30
Torsten Ruger
aa79e41d1c rename register to risc
seems to fit the layer much better as we really have a very reduced
instruction set
2017-01-19 09:02:29 +02:00