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d0b734c57c
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adding register_names to instruction protocol
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2020-03-22 14:31:43 +02:00 |
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53eb28fff4
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load constant to create register names with class
Just the id_ did give no clue to the contents, just took care of the uniqueness.
Better for debugging
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2020-03-22 14:31:43 +02:00 |
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9c5d17a3bb
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Fix div10 without method_missing
but reanimate infer_type to auto create the needed regsiters
also some helpers
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2020-03-22 14:31:43 +02:00 |
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ff49ff50c0
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Convert SimpleCall to new regs
Also fix bug in RegsiterValue/Slot with chain, where logic was dodgy and compiler not set
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2020-03-22 14:31:43 +02:00 |
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77003eed06
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remove use_reg on compiler and SA for load
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2020-03-22 14:31:43 +02:00 |
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3c762c4fe7
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Rename SlotDefinition to Slot
And the derived XXDefinitions to XXSlot
Just to be more consistent
And possibly free the Definition for the Language side
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2020-02-11 16:19:52 +07:00 |
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c43436f35a
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Change Mom to SlotMachine
rather large commit, but essentially a simple rename
Rationale in docs and blogs
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2019-10-03 20:55:41 +03:00 |
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Torsten Ruger
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d50893bb0f
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rename risc_value to register_value
almost to register, but it still carries that value
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2018-06-29 11:39:07 +03:00 |
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Torsten Ruger
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183d4152d5
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loading label must translate the labels too
(psst: like arm translator already did. duh)
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2018-05-24 19:20:06 +03:00 |
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Torsten Ruger
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4a88f342d3
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random checkin
still suffering -1 trauma
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2018-05-14 12:38:44 +03:00 |
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Torsten Ruger
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5bb3ad03cc
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some more safety tests
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2018-04-05 12:22:40 +03:00 |
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Torsten Ruger
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6e941ebcb7
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introduce load_data instruction
which just loads data to a register (used internally)
as opposed to integers, which are objects
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2018-03-31 12:38:30 +03:00 |
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Torsten Ruger
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9932d0bf33
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add source to the to_s
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2018-03-22 18:38:19 +02:00 |
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Torsten Ruger
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ca3bf6acfa
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fix constants being passed down
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2018-03-22 02:38:06 +05:30 |
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Torsten Ruger
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aa79e41d1c
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rename register to risc
seems to fit the layer much better as we really have a very reduced
instruction set
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2017-01-19 09:02:29 +02:00 |
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