Commit Graph

16 Commits

Author SHA1 Message Date
c890e8402b change in register_names protocol
move to returning the attribute names
getting and setting can then be automated in the base class
2020-03-22 14:31:43 +02:00
d0b734c57c adding register_names to instruction protocol 2020-03-22 14:31:43 +02:00
53eb28fff4 load constant to create register names with class
Just the id_ did give no clue to the contents, just took care of the uniqueness.
Better for debugging
2020-03-22 14:31:43 +02:00
9c5d17a3bb Fix div10 without method_missing
but reanimate infer_type to auto create the needed regsiters
also some helpers
2020-03-22 14:31:43 +02:00
ff49ff50c0 Convert SimpleCall to new regs
Also fix bug in RegsiterValue/Slot with chain, where logic was dodgy and compiler not set
2020-03-22 14:31:43 +02:00
77003eed06 remove use_reg on compiler and SA for load 2020-03-22 14:31:43 +02:00
3c762c4fe7 Rename SlotDefinition to Slot
And the derived XXDefinitions to XXSlot

Just to be more consistent
And possibly free the Definition for the Language side
2020-02-11 16:19:52 +07:00
c43436f35a Change Mom to SlotMachine
rather large commit, but essentially a simple rename
Rationale in docs and blogs
2019-10-03 20:55:41 +03:00
Torsten Ruger
d50893bb0f rename risc_value to register_value
almost to register, but it still carries that value
2018-06-29 11:39:07 +03:00
Torsten Ruger
183d4152d5 loading label must translate the labels too
(psst: like arm translator already did. duh)
2018-05-24 19:20:06 +03:00
Torsten Ruger
4a88f342d3 random checkin
still suffering -1 trauma
2018-05-14 12:38:44 +03:00
Torsten Ruger
5bb3ad03cc some more safety tests 2018-04-05 12:22:40 +03:00
Torsten Ruger
6e941ebcb7 introduce load_data instruction
which just loads data to a register (used internally)
as opposed to integers, which are objects
2018-03-31 12:38:30 +03:00
Torsten Ruger
9932d0bf33 add source to the to_s 2018-03-22 18:38:19 +02:00
Torsten Ruger
ca3bf6acfa fix constants being passed down 2018-03-22 02:38:06 +05:30
Torsten Ruger
aa79e41d1c rename register to risc
seems to fit the layer much better as we really have a very reduced
instruction set
2017-01-19 09:02:29 +02:00