a5189570c6
fix remaining constant issues
...
all but integer creation
and integer builtins off course
2018-03-31 13:58:08 +03:00
9e9b5c7f37
move to parfait integers in risc layer
...
loading constants means loading parfait objects
objects have to me collected in machine
integer ok, string/true/false/nil next
2018-03-31 13:25:59 +03:00
6e941ebcb7
introduce load_data instruction
...
which just loads data to a register (used internally)
as opposed to integers, which are objects
2018-03-31 12:38:30 +03:00
e68b28d66d
fix helper
...
and start on arg test
2018-03-30 18:05:38 +03:00
1956f18faa
add an integer plus
...
not correctly handling integer objects yet
2018-03-30 17:09:02 +03:00
3844a738cd
rename assembler to text_writer
...
as “assembly” really happens in the machine now
2018-03-29 18:17:19 +03:00
e012f16d7f
fix positioning and the assembly works
2018-03-29 18:03:21 +03:00
7cf253ad9c
change assembler to write binary code objects
...
also all debug in hex
2018-03-29 12:16:27 +03:00
5eee79719d
reenable now working tests
2018-03-28 13:04:25 +03:00
606e3f8cb3
fix calling to binaries
...
used to be to the method, but we assemble the method to its own
position.
Throw in a test for binary calling
2018-03-28 13:00:03 +03:00
7493d738e1
have to translate the labels
...
and use binary as function call target
(because we don’t have the translated label)
2018-03-28 12:50:07 +03:00
fcb7f652eb
found the culprit
2018-03-28 11:37:17 +03:00
500851d246
start on new binary creation process
...
now writing into BinaryCode instead of stream
also in the risc layer, not arm, for reusability
2018-03-27 20:47:41 +03:00
4069397fca
don't collect labels anymore
...
don’t need, use binary code as the methods jump point
2018-03-27 19:06:16 +03:00
4253d7a6b9
move assembly from assembler to machine
...
id now called position
2018-03-27 18:47:39 +03:00
4cc1d8455e
fix util namespace
...
and instruction move ripples
2018-03-26 20:05:30 +03:00
730197fbed
organise tests to where they belong
2018-03-26 19:43:03 +03:00
b24b65520d
remove all that label stuff
...
left over after rewrite from blocks to linked list
2018-03-26 14:54:41 +03:00
633e99466d
start to debug
2018-03-26 13:43:26 +03:00
865a116f47
small assembler fix
2018-03-25 20:02:51 +03:00
279fdcc1e2
really translate risc - cpu/arm
...
also labels.
Actual translation/assembly is much cleaner
2018-03-25 19:38:59 +03:00
3bd23cee28
also separate risc and cpu inits for the machine
...
interpreter works on risc, but assembler off cpu
2018-03-25 19:36:00 +03:00
a50368c3aa
assembler will need redoing somewhat
...
with own data objects, we can assemble into them first
then write
may also store cpu instructions
2018-03-25 18:23:00 +03:00
a407601f5c
fix tests from NotSame removal
2018-03-24 18:33:19 +02:00
ad3e73d931
start on dynamic call test
...
fix cache entry being not loaded
test incomplete because of missing resolve_method
2018-03-24 17:55:01 +02:00
3ceb2c2f69
fix div10 return sequence
...
did not return at all before
2018-03-24 16:51:26 +02:00
267237b776
fix init method message setup
...
was causing errors in interpreter
(that may have gone unnoticed in arm, as the interpreter checks stuff)
2018-03-24 15:59:54 +02:00
65d3d5f1c9
fix tests from interpreter load change
...
loading values, not Constants
2018-03-24 12:24:53 +02:00
2c137e8c97
div10 test for interpreter
2018-03-24 12:21:46 +02:00
0f183b3a74
fix value return and test
...
slot load was wrong way around
2018-03-23 20:02:17 +02:00
c51e593335
test return in interpreter
...
passes but does not return. dodgy
2018-03-23 11:36:20 +02:00
55832315eb
more fix for multilevel constant load
...
was ignoring first level which is already the second for a constant
as the constant is the first load.
first interpreter test working but looking dodgy
2018-03-22 19:14:22 +02:00
34903829ca
fix interpreter test harness and start testing
...
interpreter on debug for now
2018-03-22 18:54:40 +02:00
b4489b1093
rename RiscTransfer to Transfer
2018-03-21 15:48:04 +05:30
9989cc12e0
fix ass tests
...
bit weak really, but pass
2018-03-18 22:37:15 +05:30
c5ec532616
use common list for risc instruction
...
strange that that was not done before as the code was clearly copied
when extracting it
Fix bug for insertion
2018-03-18 10:36:01 +05:30
5fe0ba06ab
stash old vm
...
moving on to getting mom to work and can’t have both
interpreter and elf broke, about 100 tests went
2018-03-11 17:02:42 +05:30
73b7e2b22f
remove all test_all
...
Stop manually creating the list of tests (and searching missing).
Main level test_all does a search for all test_*
also possible to run by command line with starts
2017-04-13 17:00:56 +03:00
0d96f5e35f
rearranges test helper modules
2017-04-10 16:12:15 +03:00
ffbe39d571
order test requires
...
easier to spot missed tests (when guard and cmd-line differ)
2017-04-02 22:42:51 +03:00
aa79e41d1c
rename register to risc
...
seems to fit the layer much better as we really have a very reduced
instruction set
2017-01-19 09:02:29 +02:00
