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8119030ed2
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10 Commits

Author SHA1 Message Date
Torsten
8119030ed2 fix return sequence 
broken due to logic error in register_slot << (which was reducing the wrong register, self, not the arg)

Still the sequence is in 2 places, one too many ?
 2020-03-22 14:31:43 +02:00
Torsten
a70f63e7bb fix remaining slot instruction tests 2020-03-22 14:31:43 +02:00
Torsten
07873ce068 fix not same logic 
caused by assert logic error, also fixed
 2020-03-22 14:31:43 +02:00
Torsten
c1cfc12a1c converted resolve_method 
Big, left till last, but surprisingly painless
 2020-03-22 14:31:43 +02:00
Torsten
28e9cd335a still fixing instruction tests 2020-03-22 14:31:43 +02:00
Torsten
e6729b8b60 fixing instruction tests 2020-03-22 14:31:43 +02:00
Torsten
2af953e1d2 last instruciton, dynamic_call 
next macros
 2020-03-22 14:31:43 +02:00
Torsten
7f5ebab800 did block yield 2020-03-22 14:31:43 +02:00
Torsten
a4c0b8e5f9 did return sequence 
surprisingly easy. also some check polish
 2020-03-22 14:31:43 +02:00
Torsten
db5a59f735 Unify instruction namings also dirs 
Was getting confused myself, where it was instruction or instructions, when if the base class was inside or out of dir.
Now dirs are plural, and base class is inside.
 2020-03-22 14:31:43 +02:00