Torsten Ruger
|
3090ccffea
|
keep risc and cpu instructions separate in method
that overwriting was a bit of thorn
|
2018-03-25 19:33:50 +03:00 |
|
Torsten Ruger
|
82ab8ac4d3
|
add data objects
marker class (may change) to be able to check access
|
2018-03-25 18:22:02 +03:00 |
|
Torsten Ruger
|
bc4d4b428a
|
change boot to new hash syntax
|
2018-03-25 13:27:15 +03:00 |
|
Torsten Ruger
|
99ced4369a
|
adding Tue False and Nil Class to Parfait
and boot
|
2018-03-19 21:18:56 +05:30 |
|
Torsten Ruger
|
642f16b73a
|
adding cache entry to parfait
|
2018-03-17 19:03:39 +05:30 |
|
Torsten Ruger
|
2aa7d37a83
|
rename locals to frame
includes temps and tradition
|
2018-03-14 17:39:04 +05:30 |
|
Torsten Ruger
|
d6a2ea4cfc
|
fix dynamic resolve
patch more like, real resolve method will have to be written
and put in there
|
2018-03-10 19:01:38 +05:30 |
|
Torsten Ruger
|
670ebd06cc
|
remove traces of salama
|
2017-08-29 18:38:51 +03:00 |
|
Torsten Ruger
|
aa79e41d1c
|
rename register to risc
seems to fit the layer much better as we really have a very reduced
instruction set
|
2017-01-19 09:02:29 +02:00 |
|