3 Commits

Author	SHA1	Message	Date
Torsten Ruger	9c052c78a7	fix most of slot_load to_risc ... higher orders not working yet	2018-03-17 21:32:09 +05:30
Torsten Ruger	cddc25a595	fixing tests for shifting constants into slots	2018-03-17 21:15:38 +05:30
Torsten Ruger	aa79e41d1c	rename register to risc ... seems to fit the layer much better as we really have a very reduced instruction set	2017-01-19 09:02:29 +02:00