Torsten Ruger
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16c8fcbf66
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first local assignment risc test
comes with casualties
slot_load needs more work
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2018-03-17 11:13:44 +05:30 |
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Torsten Ruger
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79bf416e58
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collapsed slot classes into one
different slot operation have different right sides
mom assignment tests work again
157 others don’t
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2018-03-15 20:33:38 +05:30 |
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Torsten Ruger
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03a4e04f7e
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rename self to receiver
just because it is a keyword and can’t be used
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2018-03-14 20:26:13 +05:30 |
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Torsten Ruger
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79b4b07ac4
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style
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2018-03-14 17:39:49 +05:30 |
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Torsten Ruger
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6fe13fc2b7
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fix insertion to account for chains
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2018-03-14 17:39:31 +05:30 |
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Torsten Ruger
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2aa7d37a83
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rename locals to frame
includes temps and tradition
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2018-03-14 17:39:04 +05:30 |
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Torsten Ruger
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96800fd8fd
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starting to_risc descent
just fleshing it for now
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2018-03-13 16:16:06 +05:30 |
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Torsten Ruger
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5fe0ba06ab
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stash old vm
moving on to getting mom to work and can’t have both
interpreter and elf broke, about 100 tests went
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2018-03-11 17:02:42 +05:30 |
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Torsten Ruger
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f7aac1d1a4
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polish docs
and a bit of code style
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2018-03-11 16:11:15 +05:30 |
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Torsten Ruger
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d6a2ea4cfc
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fix dynamic resolve
patch more like, real resolve method will have to be written
and put in there
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2018-03-10 19:01:38 +05:30 |
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Torsten Ruger
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ba304f51df
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using sof again, now rxf
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2017-10-05 16:41:45 +03:00 |
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Torsten Ruger
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670ebd06cc
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remove traces of salama
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2017-08-29 18:38:51 +03:00 |
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Torsten Ruger
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aa79e41d1c
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rename register to risc
seems to fit the layer much better as we really have a very reduced
instruction set
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2017-01-19 09:02:29 +02:00 |
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