Torsten Ruger
3298651238
split create_binary into two phases
...
Which gives instructions a chance to check everything
and in Arms case check the constant loads/ instruction adding
So that during assembly no more change happens (and we don't have to reassemble)
2018-06-17 13:53:17 +03:00
Torsten Ruger
a2e7d7c469
give interpreter a clock and pc
...
where the pc, like in cpu’s is the memory position.
That is what the interpreter works on.
But for humans, the clock is a simpler way to count where the program
is at, no. of instructions executed
2018-05-23 18:05:22 +03:00
Torsten Ruger
75d5fff611
let builder pass the source down, but inly once
2018-04-18 19:27:46 +03:00
Torsten Ruger
beb487eb09
minor fixes
2018-04-02 19:31:08 +03:00
Torsten Ruger
6e941ebcb7
introduce load_data instruction
...
which just loads data to a register (used internally)
as opposed to integers, which are objects
2018-03-31 12:38:30 +03:00
Torsten Ruger
4cc1d8455e
fix util namespace
...
and instruction move ripples
2018-03-26 20:05:30 +03:00
Torsten Ruger
4a26bec0f1
move eventable to util and rename common to util
2018-03-26 19:46:38 +03:00
Torsten Ruger
e61ef93943
cleanup
2018-03-26 19:17:30 +03:00
Torsten Ruger
b24b65520d
remove all that label stuff
...
left over after rewrite from blocks to linked list
2018-03-26 14:54:41 +03:00
Torsten Ruger
1e21177b35
just keep binary code payload at 13 for now
...
there is an extra in there at the last of the last, but ok
2018-03-26 14:37:55 +03:00
Torsten Ruger
279fdcc1e2
really translate risc - cpu/arm
...
also labels.
Actual translation/assembly is much cleaner
2018-03-25 19:38:59 +03:00
Torsten Ruger
b4a18bc59b
mostly brackets and formatting
2018-03-23 18:55:23 +02:00
Torsten Ruger
9932d0bf33
add source to the to_s
2018-03-22 18:38:19 +02:00
Torsten Ruger
fcbdba4804
simplify method entry exit codes
...
Basically just a label now
No more implicit returns (needs compiler tests)
Many return points is the new idea
Also setup is done before the enter by MessageSetup
2018-03-21 16:02:46 +05:30
Torsten Ruger
c5ec532616
use common list for risc instruction
...
strange that that was not done before as the code was clearly copied
when extracting it
Fix bug for insertion
2018-03-18 10:36:01 +05:30
Torsten Ruger
6fe13fc2b7
fix insertion to account for chains
2018-03-14 17:39:31 +05:30
Torsten Ruger
96800fd8fd
starting to_risc descent
...
just fleshing it for now
2018-03-13 16:16:06 +05:30
Torsten Ruger
aa79e41d1c
rename register to risc
...
seems to fit the layer much better as we really have a very reduced
instruction set
2017-01-19 09:02:29 +02:00
