18994d2b4b
start on yield statement
2018-06-28 20:15:24 +03:00
c6a903073a
start on blocks
2018-06-26 20:28:27 +03:00
67a6ef9f67
add rewriting of operator assignment
...
foo += 1 becomes foo = foo + 1 in vool
2018-06-25 16:32:20 +03:00
37d62d298e
assemble risc to it's position (not itself)
...
So in the next step the interpreter can use positions as program counter
and would be much more like the real thing
2018-05-17 09:49:01 +03:00
3a50b7dd0e
fix mod4 name
...
really did div4
2018-04-19 10:00:55 +03:00
e2729513ed
tracking ivar bug
2018-03-18 22:38:00 +05:30
ba3ec9b1a2
everything but dynamic dispatch
2018-03-16 19:39:35 +05:30
3702411043
first propper hoisting test
...
had to change course, normalising and object creation is not possible
in one go
have to now generate random tmp vars that will have to be picked up
later (sorted by tmp_ prefix?)
2018-03-15 12:46:56 +05:30
9ddcb3224c
rename
2018-03-15 11:32:32 +05:30
