Commit Graph

8 Commits

Author SHA1 Message Date
rubydesign 61fc8a3991 make operator_instruction single ass
create result register automatically
usually not used, but register allocation will sort that
2020-03-22 14:31:43 +02:00
rubydesign 6267bf3ad0 fix slot_to_reg to allow register indexes
we mostly use pre-calculated indexes, ie integers
but registers are allowed (in arm/risc), so we try to check the registers type at least is right.
The return is really a machine word, but we call it Object (yes, more work that way)
2020-03-22 14:31:43 +02:00
rubydesign eed9ba082f Fix div10 and test
fix and use load_data (similar to load_constant)
and integrate into load_object when appropriate (ie for integers)
2020-03-22 14:31:43 +02:00
rubydesign 53eb28fff4 load constant to create register names with class
Just the id_ did give no clue to the contents, just took care of the uniqueness.
Better for debugging
2020-03-22 14:31:43 +02:00
rubydesign db5a59f735 Unify instruction namings also dirs
Was getting confused myself, where it was instruction or instructions, when if the base class was inside or out of dir.
Now dirs are plural, and base class is inside.
2020-03-22 14:31:43 +02:00
rubydesign d0036ed95b better way to test object registers
also some cleaning, by using more helpers
2020-03-22 14:31:43 +02:00
rubydesign d22da1ab97 SA for slot_to_reg 2020-03-22 14:31:43 +02:00
rubydesign 77003eed06 remove use_reg on compiler and SA for load 2020-03-22 14:31:43 +02:00