Commit Graph

366 Commits

Author SHA1 Message Date
Torsten Ruger
9c052c78a7 fix most of slot_load to_risc
higher orders not working yet
2018-03-17 21:32:09 +05:30
Torsten Ruger
cddc25a595 fixing tests for shifting constants into slots 2018-03-17 21:15:38 +05:30
Torsten Ruger
642f16b73a adding cache entry to parfait 2018-03-17 19:03:39 +05:30
Torsten Ruger
16c8fcbf66 first local assignment risc test
comes with casualties
slot_load needs more work
2018-03-17 11:13:44 +05:30
Torsten Ruger
79bf416e58 collapsed slot classes into one
different slot operation have different right sides
mom assignment tests work again
157 others don’t
2018-03-15 20:33:38 +05:30
Torsten Ruger
03a4e04f7e rename self to receiver
just because it is a keyword and can’t be used
2018-03-14 20:26:13 +05:30
Torsten Ruger
79b4b07ac4 style 2018-03-14 17:39:49 +05:30
Torsten Ruger
6fe13fc2b7 fix insertion to account for chains 2018-03-14 17:39:31 +05:30
Torsten Ruger
2aa7d37a83 rename locals to frame
includes temps and tradition
2018-03-14 17:39:04 +05:30
Torsten Ruger
96800fd8fd starting to_risc descent
just fleshing it for now
2018-03-13 16:16:06 +05:30
Torsten Ruger
5fe0ba06ab stash old vm
moving on to getting mom to work and can’t have both
interpreter and elf broke, about 100 tests  went
2018-03-11 17:02:42 +05:30
Torsten Ruger
f7aac1d1a4 polish docs
and a bit of code style
2018-03-11 16:11:15 +05:30
Torsten Ruger
d6a2ea4cfc fix dynamic resolve
patch more like, real resolve method will have to be written
and put in there
2018-03-10 19:01:38 +05:30
Torsten Ruger
ba304f51df using sof again, now rxf 2017-10-05 16:41:45 +03:00
Torsten Ruger
670ebd06cc remove traces of salama 2017-08-29 18:38:51 +03:00
Torsten Ruger
aa79e41d1c rename register to risc
seems to fit the layer much better as we really have a very reduced
instruction set
2017-01-19 09:02:29 +02:00