Convert SimpleCall to new regs
Also fix bug in RegsiterValue/Slot with chain, where logic was dodgy and compiler not set
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@ -94,8 +94,7 @@ module Risc
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# add the instruction to the code and return the register_value that was created
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# for further use
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def load_object( object )
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raise "must be Parfait, not #{object.class}" unless object.is_a?(Parfait::Object)
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ins = Risc.load_constant("load to #{object.type}" , object)
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ins = Risc.load_constant("load to #{object}" , object)
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ins.register.set_compiler(self)
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add_code ins
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# todo for constants (not objects)
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@ -33,9 +33,12 @@ module Risc
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end
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end
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def self.load_constant( source , constant )
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if(constant.is_a?(Parfait::Object))
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value = constant
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case constant
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when Parfait::Object
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type = constant.get_type
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value = constant
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when Label
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type = constant.address.get_type
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else
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type = constant.ct_type
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value = constant.value
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@ -40,15 +40,16 @@ module Risc
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# Example: message[:caller][:next_message]
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# message[:caller] returns a RegisterSlot, which would be self for this example
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# to evaluate self[:next_message] we reduce self to a register with to_reg
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def [](index)
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def []( index )
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reg = to_reg("reduce #{@register.symbol}[@index]")
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reg[index]
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end
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# push the given register into the slot that self represents
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# ie create a slot_to_reg instruction and add to the compiler
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# the register represents and "array", and the content of the
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# given register from, is pushed to the memory at register[index]
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def to_mem(source , from )
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def to_mem( source , from )
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reg_to_slot = Risc.reg_to_slot(source , from , register, index)
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compiler.add_code(reg_to_slot) if compiler
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reg_to_slot.register
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@ -57,9 +58,12 @@ module Risc
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# load the conntent of the slot that self descibes into a a new register.
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# the register is created, and the slot_to_reg instruction added to the
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# compiler. the return is a bit like @register[@index]
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def to_reg(source )
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def to_reg( source )
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slot_to_reg = Risc.slot_to_reg(source , register, index)
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compiler.add_code(slot_to_reg) if compiler
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if compiler
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compiler.add_code(slot_to_reg)
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slot_to_reg.register.set_compiler(compiler)
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end
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slot_to_reg.register
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end
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@ -143,8 +143,8 @@ module Risc
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when RegisterValue
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ins = Risc.transfer("#{right.type} to #{self.type}" , right , self)
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when RegisterSlot
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raise "logic error, after creating the reg, need to transfer"
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ins = Risc::SlotToReg.new("#{right.register.type}[#{right.index}] -> #{self.type}" , right.register , right.index , self)
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index = right.register.resolve_index(right.index)
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ins = SlotToReg.new("#{right.register.type}[#{right.index}] -> #{self.type}" , right.register , index , self)
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else
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raise "not implemented for #{right.class}:#{right}"
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end
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