litte bit of docs
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# Risc Machine
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The RiscMachine, is an abstract machine with registers. Think of it as an arm machine with
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The Risc Machine, is an abstract machine with registers. Think of it as an arm machine with
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normal instruction names. It is not however an abstraction of existing hardware, but only
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of that subset that we need.
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@ -9,7 +9,7 @@ Our primary objective is to compile typed code to this level, so the register ma
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- object load
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- object oriented call semantics
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- extended (and extensible) branching
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- normal integer operators (but no sub word instructions)
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- normal integer operators
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All data is in objects.
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## Calls and syscalls
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The RiscMachine only uses 1 fixed register, the currently worked on Message. (and assumes a
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The Risc Machine only uses 1 fixed register, the currently worked on Message. (and assumes a
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program counter and flags, neither of which are directly manipulated)
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There is no stack, rather messages form a linked list, and preparing to call, the data is
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## Interpreter
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There is an interpreter that can interpret compiled register machine programs.
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There is an interpreter that can interpret programs compiled to the risc instruction set.
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This is very handy for debugging (and nothing else).
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Even more handy is the graphical interface for the interpreter, which is in it's own repository:
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