change to_risc and builtin code according to last commit
Wherever space was loaded to get to the next_message we now load the Message factory. Otherwise much the same, only the attribute is next_object, not next_message The binary is growing with 1k objects per factory, so i had to fix (hack) arm to handle bigger constants close #14
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@ -45,7 +45,7 @@ module Risc
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ret = main_ticks(64)
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assert_equal FunctionReturn , ret.class
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assert_equal :r1 , ret.register.symbol
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assert_equal 50632 , @interpreter.get_register(ret.register)
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assert_equal 175276 , @interpreter.get_register(ret.register)
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end
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end
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end
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@ -19,7 +19,7 @@ module Risc
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@instruction_events << was
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end
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def length
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38
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39
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end
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def test_state_change
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@interpreter.register_event :state_changed , self
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@ -40,13 +40,13 @@ module Risc
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def test_chain
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#show_ticks # get output of what is
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check_chain [Branch, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
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LoadConstant, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
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RegToSlot, RegToSlot, RegToSlot, SlotToReg, Branch,
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RegToSlot, LoadConstant, RegToSlot, FunctionCall, LoadConstant,
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RegToSlot, Branch, SlotToReg, SlotToReg, RegToSlot,
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LoadConstant, SlotToReg, RegToSlot, RegToSlot, SlotToReg,
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SlotToReg, SlotToReg, Branch, FunctionReturn, Transfer,
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SlotToReg, SlotToReg, Syscall, NilClass]
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LoadConstant, LoadConstant, SlotToReg, SlotToReg, RegToSlot, # 10
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RegToSlot, RegToSlot, RegToSlot, SlotToReg, Branch,
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LoadConstant, RegToSlot, LoadConstant, RegToSlot, FunctionCall, # 20
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LoadConstant, RegToSlot, Branch, SlotToReg, SlotToReg,
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RegToSlot, LoadConstant, SlotToReg, RegToSlot, RegToSlot, # 30
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SlotToReg, SlotToReg, SlotToReg, Branch, FunctionReturn,
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Transfer, SlotToReg, SlotToReg, Syscall, NilClass, ]
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assert_equal Fixnum , get_return.class
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assert_equal 5 , get_return
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end
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@ -12,9 +12,9 @@ module Risc
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def test_chain
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#show_main_ticks # get output of what is
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check_main_chain [LoadConstant, RegToSlot, Branch, SlotToReg, SlotToReg,
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RegToSlot, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
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SlotToReg, SlotToReg, SlotToReg, Branch, FunctionReturn,
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Transfer, SlotToReg, SlotToReg, Syscall, NilClass]
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RegToSlot, LoadConstant, SlotToReg, RegToSlot, RegToSlot, # 10
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SlotToReg, SlotToReg, SlotToReg, Branch, FunctionReturn,
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Transfer, SlotToReg, SlotToReg, Syscall, NilClass, ] # 20
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assert_equal 5 , get_return
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end
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@ -50,13 +50,13 @@ module Risc
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end
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def test_returns_slot
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r2 = RegisterValue.new(:r2 , :Message).set_builder( @builder )
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@builder.build{ r2 << space![:next_message] }
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@builder.build{ r2 << factory![:next_object] }
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assert_equal SlotToReg , built.class
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assert_equal :r1 , built.array.symbol
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end
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def test_returns_slot_reverse
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r2 = RegisterValue.new(:r2 , :Message).set_builder( @builder )
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@builder.build{ r2 << space![:next_message] }
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@builder.build{ r2 << factory![:next_object] }
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assert_equal SlotToReg , built.class
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assert_equal :r1 , built.array.symbol
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end
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@ -54,7 +54,7 @@ module Risc
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end
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def test_pc1
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@interpreter.tick
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assert_equal 49992 , @interpreter.pc
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assert_equal 174632 , @interpreter.pc
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end
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def test_tick2
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@interpreter.tick
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@ -68,7 +68,7 @@ module Risc
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def test_pc2
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@interpreter.tick
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@interpreter.tick
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assert_equal 49996 , @interpreter.pc
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assert_equal 174636 , @interpreter.pc
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end
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def test_tick_14_jump
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14.times {@interpreter.tick}
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@ -25,7 +25,7 @@ module Risc
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assert_equal 0 , Position.get(@linker.cpu_init).at
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end
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def test_cpu_at
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assert_equal "0xd1fc" , Position.get(@linker.cpu_init.first).to_s
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assert_equal "0x2b91c" , Position.get(@linker.cpu_init.first).to_s
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end
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def test_cpu_label
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assert_equal Position , Position.get(@linker.cpu_init.first).class
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@ -13,6 +13,7 @@ module Risc
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Parfait.boot!
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@r0 = RegisterValue.new(:r0 , :Message)
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@r1 = RegisterValue.new(:r1 , :Space)
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@r2 = RegisterValue.new(:r1 , :Factory)
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end
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def test_class_name_type
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assert_equal :Message , @r0.class_name
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@ -77,11 +78,11 @@ module Risc
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assert_equal 1 , instr.index
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end
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def test_slot_to_reg
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instr = @r0 << @r1[:next_message]
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instr = @r0 << @r2[:next_object]
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assert_equal SlotToReg , instr.class
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assert_equal @r1 , instr.array
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assert_equal @r0 , instr.register
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assert_equal 4 , instr.index
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assert_equal 2 , instr.index
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end
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def test_reg_to_byte
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instr = @r1[1] <= @r0
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@ -91,11 +92,11 @@ module Risc
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assert_equal 1 , instr.index
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end
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def test_reg_to_slot
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instr = @r1[:next_message] << @r0
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instr = @r2[:next_object] << @r0
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assert_equal RegToSlot , instr.class
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assert_equal @r1 , instr.array
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assert_equal @r0 , instr.register
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assert_equal 4 , instr.index
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assert_equal 2 , instr.index
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end
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end
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end
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