rename also get_slot, to slot_to_reg

makes source and target clear
This commit is contained in:
Torsten Ruger
2016-12-25 18:05:39 +02:00
parent 35adf9a5e6
commit f648bf7bd5
32 changed files with 105 additions and 105 deletions

View File

@ -17,14 +17,14 @@ HERE
def test_chain
#show_ticks # get output of what is
check_chain ["Branch","Label","LoadConstant","GetSlot","RegToSlot",
check_chain ["Branch","Label","LoadConstant","SlotToReg","RegToSlot",
"LoadConstant","RegToSlot","FunctionCall","Label","LoadConstant",
"LoadConstant","OperatorInstruction","RegToSlot","Label","FunctionReturn",
"RegisterTransfer","Syscall","NilClass"]
end
def test_get
assert_equal Register::GetSlot , ticks(4).class
assert_equal Register::SlotToReg , ticks(4).class
assert @interpreter.get_register( :r2 )
assert Integer , @interpreter.get_register( :r2 ).class
end