removed arm and use as gem
This commit is contained in:
Torsten Ruger
@ -1,92 +0,0 @@
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module Arm
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# There are only three call instructions in arm branch (b), call (bl) and syscall (swi)
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# A branch could be called a jump as it has no notion of returning
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# The pc is put into the link register to make a return possible
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# a return is affected by moving the stored link register into the pc, effectively a branch
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# swi (SoftWareInterrupt) or system call is how we call the kernel.
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# in Arm the register layout is different and so we have to place the syscall code into register 7
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# Registers 0-6 hold the call values as for a normal c call
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class CallInstruction < Instruction
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include Arm::Constants
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def initialize(first, attributes)
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super(attributes)
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raise "no target" if first.nil?
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@first = first
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opcode = @attributes[:opcode].to_s
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if opcode.length == 3 and opcode[0] == "b"
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@attributes[:condition_code] = opcode[1,2].to_sym
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@attributes[:opcode] = :b
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end
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if opcode.length == 6 and opcode[0] == "c"
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@attributes[:condition_code] = opcode[4,2].to_sym
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@attributes[:opcode] = :call
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end
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@attributes[:update_status] = 0
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@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
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end
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def assemble(io)
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case @attributes[:opcode]
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when :b, :call
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arg = @first
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if arg.is_a?(Virtual::Block) or arg.is_a?(Parfait::Method)
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#relative addressing for jumps/calls
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# but because of the arm "theoretical" 3- stage pipeline,
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# we have to subtract 2 words (fetch/decode)
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if(arg.is_a? Virtual::Block)
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diff = arg.position - self.position - 8
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else
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# But, for methods, this happens to be the size of the object header,
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# so there it balances out, but not blocks
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# have to use the code, not the mthod object for methods
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diff = arg.code.position - self.position
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end
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arg = diff
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end
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if (arg.is_a?(Numeric))
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jmp_val = arg >> 2
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packed = [jmp_val].pack('l')
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# signed 32-bit, condense to 24-bit
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# TODO add check that the value fits into 24 bits
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io << packed[0,3]
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else
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raise "else not coded arg =\n#{arg.to_s[0..1000]}: #{inspect[0..1000]}"
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end
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io.write_uint8 op_bit_code | (COND_CODES[@attributes[:condition_code]] << 4)
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when :swi
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arg = @first
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if (arg.is_a?(Numeric))
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packed = [arg].pack('L')[0,3]
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io << packed
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io.write_uint8 0b1111 | (COND_CODES[@attributes[:condition_code]] << 4)
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else
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raise "invalid operand argument expected literal not #{arg} #{inspect}"
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end
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else
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raise "Should not be the case #{inspect}"
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end
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end
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def uses
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if opcode == :call
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@first.args.collect {|arg| arg.register }
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else
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[]
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end
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end
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def assigns
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if opcode == :call
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[RegisterReference.new(RegisterMachine.instance.return_register)]
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else
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[]
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end
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end
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def to_s
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"#{opcode} #{@first} #{super}"
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end
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end
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end
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@ -1,105 +0,0 @@
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module Arm
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class CompareInstruction < Instruction
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include Arm::Constants
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def initialize(left , right , attributes)
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super(attributes)
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@left = left
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@right = right.is_a?(Fixnum) ? IntegerConstant.new(right) : right
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@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
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@operand = 0
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@immediate = 0
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@attributes[:update_status] = 1
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@rn = left
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@rd = :r0
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end
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def assemble(io)
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# don't overwrite instance variables, to make assembly repeatable
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rn = @rn
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operand = @operand
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immediate = @immediate
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arg = @right
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if arg.is_a?(Parfait::Object)
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# do pc relative addressing with the difference to the instuction
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# 8 is for the funny pipeline adjustment (ie oc pointing to fetch and not execute)
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arg = arg.position - self.position - 8
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rn = :pc
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end
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if( arg.is_a? Symbol )
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arg = Register::RegisterReference.new( arg )
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end
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if (arg.is_a?(Numeric))
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if (arg.fits_u8?)
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# no shifting needed
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operand = arg
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immediate = 1
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elsif (op_with_rot = calculate_u8_with_rr(arg))
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operand = op_with_rot
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immediate = 1
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raise "hmm"
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else
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raise "cannot fit numeric literal argument in operand #{arg.inspect}"
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end
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elsif (arg.is_a?(Symbol) or arg.is_a?(::Register::RegisterReference))
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operand = arg
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immediate = 0
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elsif (arg.is_a?(Arm::Shift))
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rm_ref = arg.argument
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immediate = 0
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shift_op = {'lsl' => 0b000, 'lsr' => 0b010, 'asr' => 0b100,
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'ror' => 0b110, 'rrx' => 0b110}[arg.type]
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if (arg.type == 'ror' and arg.value.nil?)
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# ror #0 == rrx
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raise "cannot rotate by zero #{arg} #{inspect}"
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end
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arg1 = arg.value
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if (arg1.is_a?(Virtual::IntegerConstant))
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if (arg1.value >= 32)
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raise "cannot shift by more than 31 #{arg1} #{inspect}"
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end
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shift_imm = arg1.value
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elsif (arg1.is_a?(Arm::Register))
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shift_op val |= 0x1;
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shift_imm = arg1.number << 1
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elsif (arg.type == 'rrx')
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shift_imm = 0
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end
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operand = rm_ref | (shift_op << 4) | (shift_imm << 4+3)
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else
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raise "invalid operand argument #{arg.inspect} , #{inspect}"
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end
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instuction_class = 0b00 # OPC_DATA_PROCESSING
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val = (operand.is_a?(Symbol) or operand.is_a?(::Register::RegisterReference)) ? reg_code(operand) : operand
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val = 0 if val == nil
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val = shift(val , 0)
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raise inspect unless reg_code(@rd)
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val |= shift(reg_code(@rd) , 12)
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val |= shift(reg_code(rn) , 12+4)
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val |= shift(@attributes[:update_status] , 12+4+4)#20
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val |= shift(op_bit_code , 12+4+4 +1)
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val |= shift(immediate , 12+4+4 +1+4)
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val |= shift(instuction_class , 12+4+4 +1+4+1)
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val |= shift(cond_bit_code , 12+4+4 +1+4+1+2)
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io.write_uint32 val
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end
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def shift val , by
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raise "Not integer #{val}:#{val.class} #{inspect}" unless val.is_a? Fixnum
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val << by
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end
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def uses
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ret = [@left.register ]
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ret << @right.register unless @right.is_a? Constant
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ret
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end
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def assigns
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[]
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end
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def to_s
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"#{opcode} #{@left} , #{@right} #{super}"
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end
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end
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end
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@ -1,105 +0,0 @@
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module Arm
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class LogicInstruction < Instruction
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include Arm::Constants
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# result = left op right
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#
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# Logic instruction are your basic operator implementation. But unlike the (normal) code we write
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# these Instructions must have "place" to write their results. Ie when you write 4 + 5 in ruby
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# the result is sort of up in the air, but with Instructions the result must be assigned
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def initialize(result , left , right , attributes = {})
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super(attributes)
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@result = result
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@left = left
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@right = right
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@attributes[:update_status] = 0 if @attributes[:update_status] == nil
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@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
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@operand = 0
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raise "Left arg must be given #{inspect}" unless @left
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@immediate = 0
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end
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attr_accessor :result , :left , :right
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def assemble(io)
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# don't overwrite instance variables, to make assembly repeatable
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left = @left
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operand = @operand
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immediate = @immediate
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right = @right
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if @left.is_a?(Parfait::Object) or
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@left.is_a?(Symbol) and !Register::RegisterReference.look_like_reg(@left)
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# do pc relative addressing with the difference to the instuction
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# 8 is for the funny pipeline adjustment (ie pointing to fetch and not execute)
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right = @left.position - self.position - 8
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raise "todo in direction #{right}" if( opcode == :add and right < 0 )
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raise "No negatives implemented #{right} " if right < 0
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left = :pc
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end
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if (right.is_a?(Numeric))
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if (right.fits_u8?)
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# no shifting needed
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operand = right
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immediate = 1
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elsif (op_with_rot = calculate_u8_with_rr(right))
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operand = op_with_rot
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immediate = 1
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else
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#TODO this is copied from MoveInstruction, should rework
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unless @extra
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@extra = 1
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#puts "RELINK L at #{self.position.to_s(16)}"
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raise ::Register::LinkException.new("cannot fit numeric literal argument in operand #{right.inspect}")
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end
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# now we can do the actual breaking of instruction, by splitting the operand
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first = right & 0xFFFFFF00
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operand = calculate_u8_with_rr( first )
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raise "no fit for #{right}" unless operand
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immediate = 1
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@extra = ArmMachine.add( result , result , (right & 0xFF) )
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end
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elsif (right.is_a?(Symbol) or right.is_a?(::Register::RegisterReference))
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operand = reg_code(right) #integer means the register the integer is in (otherwise constant)
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immediate = 0 # ie not immediate is register
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else
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raise "invalid operand argument #{right.inspect} , #{inspect}"
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end
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op = shift_handling
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instuction_class = 0b00 # OPC_DATA_PROCESSING
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val = shift(operand , 0)
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val |= shift(op , 0) # any barral action, is already shifted
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val |= shift(reg_code(@result) , 12)
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val |= shift(reg_code(left) , 12+4)
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val |= shift(@attributes[:update_status] , 12+4+4)#20
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val |= shift(op_bit_code , 12+4+4 + 1)
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val |= shift(immediate , 12+4+4 + 1+4)
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val |= shift(instuction_class , 12+4+4 + 1+4+1)
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val |= shift(cond_bit_code , 12+4+4 + 1+4+1+2)
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io.write_uint32 val
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# by now we have the extra add so assemble that
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if(@extra)
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@extra.assemble(io)
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#puts "Assemble extra at #{val.to_s(16)}"
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end
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end
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def shift val , by
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raise "Not integer #{val}:#{val.class} #{inspect}" unless val.is_a? Fixnum
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val << by
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end
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def byte_length
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@extra ? 8 : 4
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end
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def uses
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ret = []
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ret << @left.register if @left and not @left.is_a? Constant
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ret << @right.register if @right and not @right.is_a?(Constant)
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ret
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end
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def assigns
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[@result.register]
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end
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end
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end
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@ -1,116 +0,0 @@
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module Arm
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# ADDRESSING MODE 2
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# Implemented: immediate offset with offset=0
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class MemoryInstruction < Instruction
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include Arm::Constants
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def initialize result , left , right = nil , attributes = {}
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super(attributes)
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@result = result
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@left = left
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@right = right
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@attributes[:update_status] = 0 if @attributes[:update_status] == nil
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@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
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@operand = 0
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raise "alert" if right.is_a? Virtual::Block
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@pre_post_index = 0 #P flag
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@add_offset = 0 #U flag
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@is_load = opcode.to_s[0] == "l" ? 1 : 0 #L (load) flag
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end
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def assemble(io )
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# don't overwrite instance variables, to make assembly repeatable
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rn = @rn
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operand = @operand
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add_offset = @add_offset
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arg = @left
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arg = arg.symbol if( arg.is_a? ::Register::RegisterReference )
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#str / ldr are _serious instructions. With BIG possibilities not half are implemented
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is_reg = arg.is_a?(::Register::RegisterReference)
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if( arg.is_a?(Symbol) and not is_reg)
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is_reg = (arg.to_s[0] == "r")
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end
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if (is_reg ) #symbol is register
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rn = arg
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if @right
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operand = @right
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#TODO better test, this operand integer (register) does not work. but sleep first
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operand = operand.symbol if operand.is_a? ::Register::RegisterReference
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unless( operand.is_a? Symbol)
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#puts "operand #{operand.inspect}"
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if (operand < 0)
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add_offset = 0
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#TODO test/check/understand
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operand *= -1
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else
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add_offset = 1
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end
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if (@operand.abs > 4095)
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raise "reference offset too large/small (max 4095) #{arg} #{inspect}"
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end
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end
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end
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elsif (arg.is_a?(Parfait::Object) or arg.is_a? Symbol ) #use pc relative
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rn = :pc
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operand = arg.position - self.position - 8 #stringtable is after code
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add_offset = 1
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if (operand.abs > 4095)
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raise "reference offset too large/small (4095<#{operand}) #{arg} #{inspect}"
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end
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elsif( arg.is_a?(Numeric) )
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#TODO untested brach, probably not working
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raise "is this working ?? #{arg} #{inspect}"
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@pre_post_index = 1
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@rn = pc
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@use_addrtable_reloc = true
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@addrtable_reloc_target = arg
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else
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raise "invalid operand argument #{arg.inspect} #{inspect}"
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end
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#not sure about these 2 constants. They produce the correct output for str r0 , r1
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# but i can't help thinking that that is because they are not used in that instruction and
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# so it doesn't matter. Will see
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add_offset = 1
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# TODO to be continued
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add_offset = 0 if @attributes[:add_offset]
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@pre_post_index = 1
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@pre_post_index = 0 if @attributes[:flaggie]
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w = 0 #W flag
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byte_access = opcode.to_s[-1] == "b" ? 1 : 0 #B (byte) flag
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instuction_class = 0b01 # OPC_MEMORY_ACCESS
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if (operand.is_a?(Symbol) or operand.is_a?(::Register::RegisterReference))
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val = reg_code(operand)
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@pre_post_index = 0
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i = 1 # not quite sure about this, but it gives the output of as. read read read.
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else
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i = 0 #I flag (third bit)
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val = operand
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end
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val = shift(val , 0 ) # for the test
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val |= shift(reg_code(@result) , 12 )
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val |= shift(reg_code(rn) , 12+4) #16
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val |= shift(@is_load , 12+4 +4)
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val |= shift(w , 12+4 +4+1)
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val |= shift(byte_access , 12+4 +4+1+1)
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val |= shift(add_offset , 12+4 +4+1+1+1)
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val |= shift(@pre_post_index, 12+4 +4+1+1+1+1)#24
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val |= shift(i , 12+4 +4+1+1+1+1 +1)
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val |= shift(instuction_class,12+4 +4+1+1+1+1 +1+1)
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val |= shift(cond_bit_code , 12+4 +4+1+1+1+1 +1+1+2)
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io.write_uint32 val
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end
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def shift val , by
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raise "Not integer #{val}:#{val.class} #{inspect}" unless val.is_a? Fixnum
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val << by
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end
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def uses
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ret = [@left.register ]
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ret << @right.register unless @right.nil?
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ret
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end
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def assigns
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[@result.register]
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end
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end
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end
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@ -1,114 +0,0 @@
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module Arm
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class MoveInstruction < Instruction
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include Arm::Constants
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def initialize to , from , options = {}
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super(options)
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if( from.is_a?(Symbol) and Register::RegisterReference.look_like_reg(from) )
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from = Register::RegisterReference.new(from)
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end
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@from = from
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@to = to
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raise "move must have from set #{inspect}" unless from
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@attributes[:update_status] = 0 if @attributes[:update_status] == nil
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@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
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@attributes[:opcode] = attributes[:opcode]
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@operand = 0
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|
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@immediate = 0
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@rn = :r0 # register zero = zero bit pattern
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@extra = nil
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end
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attr_accessor :to , :from
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# arm intructions are pretty sensible, and always 4 bytes (thumb not supported)
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# but not all constants fit into the part of the instruction that is left after the instruction
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# code, so large moves have to be split into two instructions.
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# we handle this "transparently", just this instruction looks longer
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# alas, full transparency is not achieved as we only know when to use 2 instruction once we
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# know where the other object is, and that position is only set after code positions have been
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||||
# determined (in link) and so see below in assemble
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def byte_length
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@extra ? 8 : 4
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||||
end
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||||
|
||||
def assemble(io)
|
||||
# don't overwrite instance variables, to make assembly repeatable
|
||||
rn = @rn
|
||||
operand = @operand
|
||||
immediate = @immediate
|
||||
right = @from
|
||||
if (right.is_a?(Numeric))
|
||||
if (right.fits_u8?)
|
||||
# no shifting needed
|
||||
operand = right
|
||||
immediate = 1
|
||||
elsif (op_with_rot = calculate_u8_with_rr(right))
|
||||
operand = op_with_rot
|
||||
immediate = 1
|
||||
else
|
||||
# unfortunately i was wrong in thinking the pi is armv7. The good news is the code
|
||||
# below implements the movw instruction (armv7 for moving a word) and works
|
||||
#armv7 raise "Too big #{right} " if (right >> 16) > 0
|
||||
#armv7 operand = (right & 0xFFF)
|
||||
#armv7 immediate = 1
|
||||
#armv7 rn = (right >> 12)
|
||||
# a little STRANGE, that the armv7 movw (move a 2 byte word) is an old test opcode,
|
||||
# but there it is
|
||||
#armv7 @attributes[:opcode] = :tst
|
||||
raise "No negatives implemented #{right} " if right < 0
|
||||
# and so it continues: when we notice that the const doesn't fit, first time we raise an
|
||||
# error,but set the extra flag, to say the instruction is now 8 bytes
|
||||
# then on subsequent assemblies we can assemble
|
||||
unless @extra
|
||||
@extra = 1
|
||||
#puts "RELINK M at #{self.position.to_s(16)}"
|
||||
raise ::Register::LinkException.new("cannot fit numeric literal argument in operand #{right.inspect}")
|
||||
end
|
||||
# now we can do the actual breaking of instruction, by splitting the operand
|
||||
first = right & 0xFFFFFF00
|
||||
operand = calculate_u8_with_rr( first )
|
||||
raise "no fit for #{right}" unless operand
|
||||
immediate = 1
|
||||
@extra = ArmMachine.add( to , to , (right & 0xFF) )
|
||||
#TODO: this is still a hack, as it does not encode all possible values.
|
||||
# The way it _should_ be done
|
||||
# is to check that the first part is doabe with u8_with_rr AND leaves a u8 remainder
|
||||
end
|
||||
elsif( right.is_a? Register::RegisterReference)
|
||||
operand = reg_code(right)
|
||||
immediate = 0 # ie not immediate is register
|
||||
else
|
||||
raise "invalid operand argument #{right.class} , #{self.class}"
|
||||
end
|
||||
op = shift_handling
|
||||
instuction_class = 0b00 # OPC_DATA_PROCESSING
|
||||
val = shift(operand , 0)
|
||||
val |= shift(op , 0) # any barrel action, is already shifted
|
||||
val |= shift(reg_code(@to) , 12)
|
||||
val |= shift(reg_code(rn) , 12+4)
|
||||
val |= shift(@attributes[:update_status] , 12+4+4)#20
|
||||
val |= shift(op_bit_code , 12+4+4 + 1)
|
||||
val |= shift(immediate , 12+4+4 + 1+4)
|
||||
val |= shift(instuction_class , 12+4+4 + 1+4+1)
|
||||
val |= shift(cond_bit_code , 12+4+4 + 1+4+1+2)
|
||||
io.write_uint32 val
|
||||
# by now we have the extra add so assemble that
|
||||
if(@extra)
|
||||
@extra.assemble(io)
|
||||
#puts "Assemble extra at #{val.to_s(16)}"
|
||||
end
|
||||
end
|
||||
def shift val , by
|
||||
raise "Not integer #{val}:#{val.class} in #{inspect}" unless val.is_a? Fixnum
|
||||
val << by
|
||||
end
|
||||
|
||||
def uses
|
||||
@from.is_a?(Constant) ? [] : [@from.register]
|
||||
end
|
||||
def assigns
|
||||
[@to.register]
|
||||
end
|
||||
end
|
||||
end
|
||||
@ -1,80 +0,0 @@
|
||||
module Arm
|
||||
# ADDRESSING MODE 4
|
||||
|
||||
class StackInstruction < Instruction
|
||||
include Arm::Constants
|
||||
|
||||
def initialize(first , attributes)
|
||||
super(attributes)
|
||||
@first = first
|
||||
@attributes[:update_status] = 0 if @attributes[:update_status] == nil
|
||||
@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
|
||||
@attributes[:opcode] = attributes[:opcode]
|
||||
@operand = 0
|
||||
|
||||
@attributes[:update_status]= 0
|
||||
@rn = :r0 # register zero = zero bit pattern
|
||||
# downward growing, decrement before memory access
|
||||
# official ARM style stack as used by gas
|
||||
end
|
||||
|
||||
def assemble(io)
|
||||
# don't overwrite instance variables, to make assembly repeatable
|
||||
operand = @operand
|
||||
|
||||
if (@first.is_a?(Array))
|
||||
operand = 0
|
||||
@first.each do |r|
|
||||
raise "nil register in push, index #{r}- #{inspect}" if r.nil?
|
||||
operand = operand | (1 << reg_code(r))
|
||||
end
|
||||
else
|
||||
raise "invalid operand argument #{inspect}"
|
||||
end
|
||||
write_base = 1
|
||||
if (opcode == :push)
|
||||
pre_post_index = 1
|
||||
up_down = 0
|
||||
is_pop = 0
|
||||
else #pop
|
||||
pre_post_index = 0
|
||||
up_down = 1
|
||||
is_pop = 1
|
||||
end
|
||||
instuction_class = 0b10 # OPC_STACK
|
||||
cond = @attributes[:condition_code].is_a?(Symbol) ? COND_CODES[@attributes[:condition_code]] : @attributes[:condition_code]
|
||||
@rn = :sp # sp register
|
||||
#assemble of old
|
||||
val = operand
|
||||
val = val | (reg_code(@rn) << 16)
|
||||
val = val | (is_pop << 16+4) #20
|
||||
val = val | (write_base << 16+4+ 1)
|
||||
val = val | (@attributes[:update_status] << 16+4+ 1+1)
|
||||
val = val | (up_down << 16+4+ 1+1+1)
|
||||
val = val | (pre_post_index << 16+4+ 1+1+1+1)#24
|
||||
val = val | (instuction_class << 16+4+ 1+1+1+1 +2)
|
||||
val = val | (cond << 16+4+ 1+1+1+1 +2+2)
|
||||
io.write_uint32 val
|
||||
end
|
||||
|
||||
def is_push?
|
||||
opcode == :push
|
||||
end
|
||||
def is_pop?
|
||||
!is_push?
|
||||
end
|
||||
def uses
|
||||
is_push? ? regs : []
|
||||
end
|
||||
def assigns
|
||||
is_pop? ? regs : []
|
||||
end
|
||||
def regs
|
||||
@first
|
||||
end
|
||||
def to_s
|
||||
"#{opcode} [#{@first.join(',') }] #{super}"
|
||||
end
|
||||
end
|
||||
|
||||
end
|
||||
Reference in New Issue
Block a user