Fix risc layer from cc changes

This commit is contained in:
Torsten Rüger 2019-08-23 10:20:39 +03:00
parent 7ca3599c5a
commit ec1e8c8f3a
10 changed files with 92 additions and 93 deletions

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@ -162,8 +162,13 @@ module Parfait
return_address: :Integer, return_value: :Object, return_address: :Integer, return_value: :Object,
caller: :Message , method: :TypedMethod , caller: :Message , method: :TypedMethod ,
arguments_given: :Integer , arguments_given: :Integer ,
arg1: :Integer , arg2: :Integer, arg3: :Integer, arg1: :Object , arg2: :Object, arg3: :Object,
arg4: :Integer, arg5: :Integer, arg6: :Integer}, arg4: :Object, arg5: :Object, arg6: :Object,
locals_used: :Integer,
local1: :Object , local2: :Object, local3: :Object, local4: :Object,
local5: :Object, local6: :Object ,local7: :Object, local8: :Object ,
local9: :Object ,local10: :Object, local11: :Object , local12: :Object,
local13: :Object, local14: :Object, local15: :Object},
MetaClass: {instance_methods: :List, instance_type: :Type, clazz: :Class }, MetaClass: {instance_methods: :List, instance_type: :Type, clazz: :Class },
NamedList: {}, NamedList: {},
NilClass: {}, NilClass: {},

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@ -11,11 +11,11 @@ module Risc
def test_chain def test_chain
#show_main_ticks # get output of what is #show_main_ticks # get output of what is
check_main_chain [LoadConstant, SlotToReg, RegToSlot, SlotToReg, SlotToReg, check_main_chain [LoadConstant, RegToSlot, SlotToReg, RegToSlot, Branch,
RegToSlot, Branch, SlotToReg, SlotToReg, RegToSlot, # 10 SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg, # 10
LoadConstant, SlotToReg, RegToSlot, RegToSlot, SlotToReg, RegToSlot, RegToSlot, SlotToReg, SlotToReg, SlotToReg,
SlotToReg, SlotToReg, FunctionReturn, Transfer, SlotToReg, # 20 FunctionReturn, Transfer, SlotToReg, SlotToReg, Syscall, # 20
SlotToReg, Syscall, NilClass, ] NilClass, ]
assert_equal 15 , get_return assert_equal 15 , get_return
end end
@ -31,17 +31,17 @@ module Risc
assert_equal 15 , @interpreter.get_register(load_ins.register).value assert_equal 15 , @interpreter.get_register(load_ins.register).value
end end
def test_return def test_return
ret = main_ticks(18) ret = main_ticks(16)
assert_equal FunctionReturn , ret.class assert_equal FunctionReturn , ret.class
link = @interpreter.get_register( ret.register ) link = @interpreter.get_register( ret.register )
assert_equal ::Integer , link.class assert_equal ::Integer , link.class
end end
def test_transfer def test_transfer
transfer = main_ticks(19) transfer = main_ticks(17)
assert_equal Transfer , transfer.class assert_equal Transfer , transfer.class
end end
def test_sys def test_sys
sys = main_ticks(22) sys = main_ticks(20)
assert_equal Syscall , sys.class assert_equal Syscall , sys.class
end end
end end

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@ -11,30 +11,29 @@ module Risc
def test_chain def test_chain
#show_main_ticks # get output of what is #show_main_ticks # get output of what is
check_main_chain [LoadConstant, SlotToReg, RegToSlot, LoadConstant, LoadConstant, check_main_chain [LoadConstant, RegToSlot, LoadConstant, LoadConstant, SlotToReg,
SlotToReg, SlotToReg, RegToSlot, RegToSlot, RegToSlot, # 10 SlotToReg, RegToSlot, RegToSlot, RegToSlot, RegToSlot, # 10
RegToSlot, SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot, # 20 RegToSlot, LoadConstant, SlotToReg, RegToSlot, SlotToReg, # 20
SlotToReg, FunctionCall, LoadConstant, SlotToReg, OperatorInstruction, FunctionCall, LoadConstant, SlotToReg, OperatorInstruction, IsZero,
IsZero, SlotToReg, LoadConstant, SlotToReg, SlotToReg, # 30 SlotToReg, LoadConstant, SlotToReg, SlotToReg, RegToSlot, # 30
RegToSlot, RegToSlot, RegToSlot, RegToSlot, SlotToReg, RegToSlot, RegToSlot, RegToSlot, SlotToReg, SlotToReg,
SlotToReg, RegToSlot, SlotToReg, LoadConstant, RegToSlot, # 40 RegToSlot, SlotToReg, LoadConstant, RegToSlot, SlotToReg, # 40
SlotToReg, SlotToReg, DynamicJump, LoadConstant, SlotToReg, SlotToReg, DynamicJump, LoadConstant, SlotToReg, SlotToReg,
SlotToReg, SlotToReg, RegToSlot, LoadConstant, RegToSlot, # 50 RegToSlot, LoadConstant, RegToSlot, Branch, SlotToReg, # 50
Branch, SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot,
SlotToReg, RegToSlot, RegToSlot, SlotToReg, SlotToReg, # 60 RegToSlot, SlotToReg, SlotToReg, SlotToReg, FunctionReturn, # 60
SlotToReg, FunctionReturn, SlotToReg, RegToSlot, Branch, SlotToReg, RegToSlot, Branch, SlotToReg, SlotToReg,
SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg, # 70 RegToSlot, LoadConstant, SlotToReg, Branch, RegToSlot, # 70
Branch, RegToSlot, RegToSlot, SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg, SlotToReg, FunctionReturn,
SlotToReg, FunctionReturn, SlotToReg, SlotToReg, RegToSlot, # 80 SlotToReg, RegToSlot, Branch, SlotToReg, SlotToReg, # 80
Branch, SlotToReg, SlotToReg, RegToSlot, Branch, RegToSlot, LoadConstant, SlotToReg, Branch, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, RegToSlot, SlotToReg, # 90 RegToSlot, SlotToReg, SlotToReg, SlotToReg, FunctionReturn, # 90
SlotToReg, SlotToReg, FunctionReturn, Transfer, SlotToReg, Transfer, SlotToReg, SlotToReg, Syscall, NilClass, ]
SlotToReg, Syscall, NilClass, ]
assert_equal 10 , get_return assert_equal 10 , get_return
end end
def base ; 43 ; end def base ; 42 ; end
def test_block_jump def test_block_jump
load_ins = main_ticks(base) load_ins = main_ticks(base)
assert_equal DynamicJump , load_ins.class assert_equal DynamicJump , load_ins.class
@ -51,14 +50,11 @@ module Risc
def test_block_slot2 def test_block_slot2
assert_slot_to_reg main_ticks(base+3) ,:r2 , 6 , :r2 assert_slot_to_reg main_ticks(base+3) ,:r2 , 6 , :r2
end end
def test_block_slot3
assert_slot_to_reg main_ticks(base+4) ,:r2 , 3 , :r2
end
def test_block_reg def test_block_reg
assert_reg_to_slot main_ticks(base+5) ,:r1 , :r2 , 1 assert_reg_to_slot main_ticks(base+4) ,:r1 , :r2 , 16
end end
def test_ret_load def test_ret_load
load_ins = main_ticks(base+6) load_ins = main_ticks(base+5)
assert_load load_ins , Parfait::Integer , :r1 assert_load load_ins , Parfait::Integer , :r1
assert_equal 15 , @interpreter.get_register(load_ins.register).value assert_equal 15 , @interpreter.get_register(load_ins.register).value
end end

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@ -25,11 +25,11 @@ module Risc
RegToSlot, Branch, SlotToReg, SlotToReg, RegToSlot, # 60 RegToSlot, Branch, SlotToReg, SlotToReg, RegToSlot, # 60
LoadConstant, SlotToReg, Branch, RegToSlot, RegToSlot, LoadConstant, SlotToReg, Branch, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, SlotToReg, FunctionReturn, SlotToReg, # 70 SlotToReg, SlotToReg, SlotToReg, FunctionReturn, SlotToReg, # 70
SlotToReg, RegToSlot, SlotToReg, SlotToReg, RegToSlot, RegToSlot, SlotToReg, RegToSlot, Branch, SlotToReg,
Branch, SlotToReg, SlotToReg, RegToSlot, Branch, # 80 SlotToReg, RegToSlot, LoadConstant, SlotToReg, Branch, # 80
LoadConstant, SlotToReg, RegToSlot, RegToSlot, SlotToReg, RegToSlot, RegToSlot, SlotToReg, SlotToReg, SlotToReg,
SlotToReg, SlotToReg, FunctionReturn, Transfer, SlotToReg, # 90 FunctionReturn, Transfer, SlotToReg, SlotToReg, Syscall, # 90
SlotToReg, Syscall, NilClass, ] NilClass, ]
assert_equal 15 , get_return assert_equal 15 , get_return
end end

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@ -39,7 +39,7 @@ module Risc
ret = main_ticks(60) ret = main_ticks(60)
assert_equal FunctionReturn , ret.class assert_equal FunctionReturn , ret.class
assert_equal :r1 , ret.register.symbol assert_equal :r1 , ret.register.symbol
assert_equal 22816 , @interpreter.get_register(ret.register) assert_equal 26160 , @interpreter.get_register(ret.register)
end end
end end
end end

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@ -11,33 +11,32 @@ module Risc
def test_chain def test_chain
#show_main_ticks # get output of what is #show_main_ticks # get output of what is
check_main_chain [LoadConstant, SlotToReg, RegToSlot, LoadConstant, SlotToReg, check_main_chain [LoadConstant, RegToSlot, LoadConstant, SlotToReg, SlotToReg,
SlotToReg, SlotToReg, SlotToReg, OperatorInstruction, IsZero, # 10 SlotToReg, OperatorInstruction, IsZero, SlotToReg, SlotToReg, # 10
SlotToReg, SlotToReg, SlotToReg, LoadConstant, RegToSlot, LoadConstant, RegToSlot, LoadConstant, LoadConstant, SlotToReg,
LoadConstant, LoadConstant, SlotToReg, SlotToReg, LoadConstant, # 20 SlotToReg, LoadConstant, OperatorInstruction, IsZero, SlotToReg, # 20
OperatorInstruction, IsZero, SlotToReg, OperatorInstruction, IsZero, OperatorInstruction, IsZero, SlotToReg, Branch, LoadConstant,
SlotToReg, Branch, LoadConstant, OperatorInstruction, IsZero, # 30 OperatorInstruction, IsZero, SlotToReg, OperatorInstruction, IsZero, # 30
SlotToReg, OperatorInstruction, IsZero, SlotToReg, Branch, SlotToReg, Branch, LoadConstant, OperatorInstruction, IsZero,
LoadConstant, OperatorInstruction, IsZero, SlotToReg, OperatorInstruction, # 40 SlotToReg, OperatorInstruction, IsZero, SlotToReg, Branch, # 40
IsZero, SlotToReg, Branch, LoadConstant, OperatorInstruction, LoadConstant, OperatorInstruction, IsZero, SlotToReg, OperatorInstruction,
IsZero, SlotToReg, OperatorInstruction, IsZero, SlotToReg, # 50 IsZero, SlotToReg, Branch, LoadConstant, OperatorInstruction, # 50
Branch, LoadConstant, OperatorInstruction, IsZero, SlotToReg, IsZero, SlotToReg, OperatorInstruction, IsZero, SlotToReg,
OperatorInstruction, IsZero, SlotToReg, Branch, LoadConstant, # 60 Branch, LoadConstant, OperatorInstruction, IsZero, SlotToReg, # 60
OperatorInstruction, IsZero, SlotToReg, OperatorInstruction, IsZero, OperatorInstruction, IsZero, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, LoadConstant, SlotToReg, # 70 LoadConstant, SlotToReg, SlotToReg, RegToSlot, RegToSlot, # 70
SlotToReg, RegToSlot, RegToSlot, RegToSlot, RegToSlot, RegToSlot, RegToSlot, SlotToReg, SlotToReg, RegToSlot,
SlotToReg, SlotToReg, SlotToReg, RegToSlot, LoadConstant, # 80 LoadConstant, SlotToReg, RegToSlot, SlotToReg, LoadConstant, # 80
SlotToReg, RegToSlot, SlotToReg, LoadConstant, SlotToReg, SlotToReg, DynamicJump, LoadConstant, SlotToReg, LoadConstant,
DynamicJump, LoadConstant, SlotToReg, LoadConstant, OperatorInstruction, # 90 OperatorInstruction, IsNotZero, SlotToReg, RegToSlot, SlotToReg, # 90
IsNotZero, SlotToReg, RegToSlot, SlotToReg, SlotToReg, SlotToReg, LoadData, OperatorInstruction, Branch, RegToSlot,
LoadData, OperatorInstruction, Branch, RegToSlot, RegToSlot, # 100 RegToSlot, SlotToReg, SlotToReg, RegToSlot, LoadConstant, # 100
SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg, SlotToReg, RegToSlot, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, RegToSlot, SlotToReg, SlotToReg, SlotToReg, # 110 SlotToReg, FunctionReturn, SlotToReg, RegToSlot, Branch, # 110
FunctionReturn, SlotToReg, RegToSlot, Branch, Branch, SlotToReg, SlotToReg, RegToSlot, Branch, LoadConstant,
SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg, # 120 SlotToReg, RegToSlot, RegToSlot, SlotToReg, SlotToReg, # 120
RegToSlot, RegToSlot, SlotToReg, SlotToReg, SlotToReg, SlotToReg, FunctionReturn, Transfer, SlotToReg, SlotToReg,
FunctionReturn, Transfer, SlotToReg, SlotToReg, Syscall, # 130 Syscall, NilClass, ]
NilClass, ]
assert_equal ::Integer , get_return.class assert_equal ::Integer , get_return.class
assert_equal 1 , get_return assert_equal 1 , get_return
@ -49,23 +48,23 @@ module Risc
assert_equal :main , call_ins.method.name assert_equal :main , call_ins.method.name
end end
def test_load_entry def test_load_entry
call_ins = main_ticks(4) call_ins = main_ticks(3)
assert_equal LoadConstant , call_ins.class assert_equal LoadConstant , call_ins.class
assert_equal Parfait::CacheEntry , call_ins.constant.class assert_equal Parfait::CacheEntry , call_ins.constant.class
end end
def test_dyn def test_dyn
cal = main_ticks(86) cal = main_ticks(82)
assert_equal DynamicJump , cal.class assert_equal DynamicJump , cal.class
end end
def test_return def test_return
ret = main_ticks(126) ret = main_ticks(122)
assert_equal FunctionReturn , ret.class assert_equal FunctionReturn , ret.class
link = @interpreter.get_register( ret.register ) link = @interpreter.get_register( ret.register )
assert_equal ::Integer , link.class assert_equal ::Integer , link.class
end end
def test_sys def test_sys
sys = main_ticks(130) sys = main_ticks(126)
assert_equal Syscall , sys.class assert_equal Syscall , sys.class
end end
end end

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@ -11,15 +11,13 @@ module Risc
def test_while def test_while
#show_main_ticks # get output of what is in main #show_main_ticks # get output of what is in main
check_main_chain [LoadConstant, SlotToReg, RegToSlot, SlotToReg, SlotToReg, check_main_chain [LoadConstant, RegToSlot, SlotToReg, LoadConstant, OperatorInstruction,
LoadConstant, OperatorInstruction, IsZero, LoadConstant, OperatorInstruction, # 10 IsZero, LoadConstant, OperatorInstruction, IsZero, LoadConstant, # 10
IsZero, LoadConstant, SlotToReg, RegToSlot, Branch, RegToSlot, Branch, SlotToReg, LoadConstant, OperatorInstruction,
SlotToReg, SlotToReg, LoadConstant, OperatorInstruction, IsZero, # 20 IsZero, SlotToReg, RegToSlot, Branch, SlotToReg, # 20
SlotToReg, SlotToReg, RegToSlot, Branch, SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot,
SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot, # 30 RegToSlot, SlotToReg, SlotToReg, SlotToReg, FunctionReturn, # 30
RegToSlot, SlotToReg, SlotToReg, SlotToReg, Branch, Transfer, SlotToReg, SlotToReg, Syscall, NilClass, ]
FunctionReturn, Transfer, SlotToReg, SlotToReg, Syscall, # 40
NilClass, ]
assert_kind_of Parfait::NilClass , get_return assert_kind_of Parfait::NilClass , get_return
end end
def test_load_false_const def test_load_false_const
@ -28,7 +26,7 @@ module Risc
assert_kind_of Parfait::TrueClass , load.constant assert_kind_of Parfait::TrueClass , load.constant
end end
def base def base
6 4
end end
def test_load_false def test_load_false
load = main_ticks(base) load = main_ticks(base)
@ -45,6 +43,11 @@ module Risc
assert_equal IsZero , check.class assert_equal IsZero , check.class
assert check.label.name.start_with?("merge_label") , check.label.name assert check.label.name.start_with?("merge_label") , check.label.name
end end
def test_load_false
load = main_ticks(base+3)
assert_equal LoadConstant , load.class
assert_equal Parfait::NilClass , load.constant.class
end
def test_compare2 def test_compare2
op = main_ticks(base + 4) op = main_ticks(base + 4)
assert_equal OperatorInstruction , op.class assert_equal OperatorInstruction , op.class
@ -55,9 +58,5 @@ module Risc
assert_equal IsZero , check.class assert_equal IsZero , check.class
assert check.label.name.start_with?("merge_label") , check.label.name assert check.label.name.start_with?("merge_label") , check.label.name
end end
def test_exit
done = main_ticks(40)
assert_equal Syscall , done.class
end
end end
end end

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@ -11,7 +11,7 @@ module Risc
def test_simple_collect def test_simple_collect
objects = Collector.collect_space(@linker) objects = Collector.collect_space(@linker)
assert_equal 602 , objects.length , objects.length.to_s assert_equal 620 , objects.length , objects.length.to_s
end end
def test_collect_all_types def test_collect_all_types
@ -55,7 +55,7 @@ module Risc
def test_simple_collect def test_simple_collect
objects = Collector.collect_space(@linker) objects = Collector.collect_space(@linker)
assert_equal 2402, objects.length , objects.length.to_s assert_equal 2420, objects.length , objects.length.to_s
end end
def test_integer_positions def test_integer_positions

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@ -55,7 +55,7 @@ module Risc
end end
def test_pc1 def test_pc1
@interpreter.tick @interpreter.tick
assert_equal 22616 , @interpreter.pc assert_equal 25960 , @interpreter.pc
end end
def test_tick2 def test_tick2
@interpreter.tick @interpreter.tick
@ -69,7 +69,7 @@ module Risc
def test_pc2 def test_pc2
@interpreter.tick @interpreter.tick
@interpreter.tick @interpreter.tick
assert_equal 22620 , @interpreter.pc assert_equal 25964 , @interpreter.pc
end end
def ttest_tick_14_jump def ttest_tick_14_jump
30.times { @interpreter.tick ;puts @interpreter.instruction.class} 30.times { @interpreter.tick ;puts @interpreter.instruction.class}

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@ -25,7 +25,7 @@ module Risc
assert_equal 0 , Position.get(@linker.cpu_init).at assert_equal 0 , Position.get(@linker.cpu_init).at
end end
def test_cpu_at def test_cpu_at
assert_equal "0x576c" , Position.get(@linker.cpu_init.first).to_s assert_equal "0x5edc" , Position.get(@linker.cpu_init.first).to_s
end end
def test_cpu_label def test_cpu_label
assert_equal Position , Position.get(@linker.cpu_init.first).class assert_equal Position , Position.get(@linker.cpu_init.first).class