Fix risc layer from cc changes

This commit is contained in:
2019-08-23 10:20:39 +03:00
parent 7ca3599c5a
commit ec1e8c8f3a
10 changed files with 92 additions and 93 deletions

View File

@ -11,11 +11,11 @@ module Risc
def test_chain
#show_main_ticks # get output of what is
check_main_chain [LoadConstant, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, Branch, SlotToReg, SlotToReg, RegToSlot, # 10
LoadConstant, SlotToReg, RegToSlot, RegToSlot, SlotToReg,
SlotToReg, SlotToReg, FunctionReturn, Transfer, SlotToReg, # 20
SlotToReg, Syscall, NilClass, ]
check_main_chain [LoadConstant, RegToSlot, SlotToReg, RegToSlot, Branch,
SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg, # 10
RegToSlot, RegToSlot, SlotToReg, SlotToReg, SlotToReg,
FunctionReturn, Transfer, SlotToReg, SlotToReg, Syscall, # 20
NilClass, ]
assert_equal 15 , get_return
end
@ -31,17 +31,17 @@ module Risc
assert_equal 15 , @interpreter.get_register(load_ins.register).value
end
def test_return
ret = main_ticks(18)
ret = main_ticks(16)
assert_equal FunctionReturn , ret.class
link = @interpreter.get_register( ret.register )
assert_equal ::Integer , link.class
end
def test_transfer
transfer = main_ticks(19)
transfer = main_ticks(17)
assert_equal Transfer , transfer.class
end
def test_sys
sys = main_ticks(22)
sys = main_ticks(20)
assert_equal Syscall , sys.class
end
end