diff --git a/lib/mom/instruction/truth_check.rb b/lib/mom/instruction/truth_check.rb
index eb8ac3b8..6679b056 100644
--- a/lib/mom/instruction/truth_check.rb
+++ b/lib/mom/instruction/truth_check.rb
@@ -19,10 +19,13 @@ module Mom
       left = @condition.to_register(compiler,self)
       false_load = SlotDefinition.new( FalseConstant.new , [] ).to_register(compiler,self)
       left << false_load
-      left << Risc::IsSame.new(self , left.register , false_load.register , false_label)
+      left << Risc.op( self , :- , left.register , false_load.register)
+      left << Risc::IsNotZero.new( self, false_label)
       nil_load = SlotDefinition.new( NilConstant.new , [] ).to_register(compiler,self)
       left << nil_load
-      left << Risc::IsSame.new(self , left.register , nil_load.register , false_label)
+      left << Risc.op( self , :- , left.register , nil_load.register)
+      left << Risc::IsNotZero.new( self, false_label)
+
       left
     end
 
diff --git a/lib/risc/instructions/branch.rb b/lib/risc/instructions/branch.rb
index 6f51b333..c3d641ab 100644
--- a/lib/risc/instructions/branch.rb
+++ b/lib/risc/instructions/branch.rb
@@ -67,14 +67,6 @@ module Risc
     attr_reader :register
   end
 
-  # branch if two registers contain same value
-  class IsSame < Branch
-    attr_reader :left , :right
-    def initialize(source , left , right , label)
-      super(source , label)
-    end
-  end
-
   class Unconditional < Branch
 
   end
diff --git a/test/mom/test_if_else.rb b/test/mom/test_if_else.rb
index 8135b9fe..17bcf91f 100644
--- a/test/mom/test_if_else.rb
+++ b/test/mom/test_if_else.rb
@@ -7,9 +7,10 @@ module Risc
     def setup
       super
       @input = "if(@a) ; arg = 5 ; else; arg = 6; end"
-      @expect = [SlotToReg, SlotToReg, LoadConstant, IsSame, LoadConstant, IsSame ,
-                 Label, LoadConstant, SlotToReg, RegToSlot, Unconditional, Label ,
-                 LoadConstant, SlotToReg, RegToSlot, Label]
+      @expect = [SlotToReg, SlotToReg, LoadConstant, OperatorInstruction, IsNotZero ,
+                 LoadConstant, OperatorInstruction, IsNotZero, Label, LoadConstant ,
+                 SlotToReg, RegToSlot, Unconditional, Label, LoadConstant ,
+                 SlotToReg, RegToSlot, Label]
     end
 
     def test_if_instructions
@@ -22,30 +23,30 @@ module Risc
     end
     def test_false_check
       produced = produce_body
-      assert_equal produced.next(11) , produced.next(3).label
+      assert_equal produced.next(13) , produced.next(4).label
     end
     def test_nil_load
       produced = produce_body
-      assert_equal Mom::NilConstant , produced.next(4).constant.class
+      assert_equal Mom::NilConstant , produced.next(5).constant.class
     end
     def test_nil_check
       produced = produce_body
-      assert_equal produced.next(11) , produced.next(5).label
+      assert_equal produced.next(13) , produced.next(7).label
     end
 
     def test_true_label
       produced = produce_body
-      assert produced.next(6).name.start_with?("true_label")
+      assert produced.next(8).name.start_with?("true_label")
     end
 
     def test_merge_label
       produced = produce_body
-      assert produced.next(15).name.start_with?("merge_label")
+      assert produced.next(17).name.start_with?("merge_label")
     end
 
     def test_true_jump # should jumpp to merge label
       produced = produce_body
-      assert produced.next(10).label.name.start_with?("merge_label")
+      assert produced.next(12).label.name.start_with?("merge_label")
     end
   end
 end
diff --git a/test/mom/test_if_no_else.rb b/test/mom/test_if_no_else.rb
index 2b2e8e79..5f53aedb 100644
--- a/test/mom/test_if_no_else.rb
+++ b/test/mom/test_if_no_else.rb
@@ -7,8 +7,9 @@ module Risc
     def setup
       super
       @input = "if(@a) ; arg = 5 ; end"
-      @expect = [SlotToReg, SlotToReg, LoadConstant, IsSame, LoadConstant, IsSame ,
-                 Label, LoadConstant, SlotToReg, RegToSlot, Label]
+      @expect = [SlotToReg, SlotToReg, LoadConstant, OperatorInstruction, IsNotZero ,
+                 LoadConstant, OperatorInstruction, IsNotZero, Label, LoadConstant ,
+                 SlotToReg, RegToSlot, Label]
     end
 
     def test_if_instructions
@@ -19,22 +20,31 @@ module Risc
       produced = produce_body
       assert_equal Mom::FalseConstant , produced.next(2).constant.class
     end
+    def test_isnotzero
+      produced = produce_body
+      assert_equal IsNotZero , produced.next(4).class
+      assert produced.next(4).label.name.start_with?("false_label")
+    end
+    def test_false_label
+      produced = produce_body
+      assert_equal Label , produced.next(12).class
+    end
     def test_false_check
       produced = produce_body
-      assert_equal produced.next(10) , produced.next(3).label
+      assert_equal produced.next(12) , produced.next(4).label
     end
     def test_nil_load
       produced = produce_body
-      assert_equal Mom::NilConstant , produced.next(4).constant.class
+      assert_equal Mom::NilConstant , produced.next(5).constant.class
     end
     def test_nil_check
       produced = produce_body
-      assert_equal produced.next(10) , produced.next(5).label
+      assert_equal Label , produced.next(4).label.class
+      assert_equal produced.next(12) , produced.next(4).label
     end
-
     def test_true_label
       produced = produce_body
-      assert produced.next(6).name.start_with?("true_label")
+      assert produced.next(8).name.start_with?("true_label")
     end
 
   end
diff --git a/test/mom/test_while.rb b/test/mom/test_while.rb
index 868cb2ec..821143cd 100644
--- a/test/mom/test_while.rb
+++ b/test/mom/test_while.rb
@@ -7,8 +7,9 @@ module Risc
     def setup
       super
       @input = "while(@a) ; arg = 5 end"
-      @expect = [Label, SlotToReg, SlotToReg, LoadConstant, IsSame, LoadConstant ,
-                 IsSame, LoadConstant, SlotToReg, RegToSlot, Unconditional, Label]
+      @expect = [Label, SlotToReg, SlotToReg, LoadConstant, OperatorInstruction ,
+                 IsNotZero, LoadConstant, OperatorInstruction, IsNotZero, LoadConstant ,
+                 SlotToReg, RegToSlot, Unconditional, Label]
     end
 
     def test_while_instructions
@@ -21,25 +22,25 @@ module Risc
     end
     def test_false_check
       produced = produce_body
-      assert_equal produced.next(11) , produced.next(4).label
+      assert_equal produced.next(13) , produced.next(5).label
     end
     def test_nil_load
       produced = produce_body
-      assert_equal Mom::NilConstant , produced.next(5).constant.class
+      assert_equal Mom::NilConstant , produced.next(6).constant.class
     end
     def test_nil_check
       produced = produce_body
-      assert_equal produced.next(11) , produced.next(6).label
+      assert_equal produced.next(13) , produced.next(8).label
     end
 
     def test_merge_label
       produced = produce_body
-      assert produced.next(11).name.start_with?("merge_label")
+      assert produced.next(13).name.start_with?("merge_label")
     end
 
     def test_back_jump # should jump back to condition label
       produced = produce_body
-      assert_equal produced , produced.next(10).label
+      assert_equal produced , produced.next(12).label
     end
   end
 end