fix interpreter syscall and rename return reg
returned int for puts was same name as implicit return int
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@ -270,7 +270,7 @@ module Risc
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else
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else
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raise "un-implemented syscall #{name}"
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raise "un-implemented syscall #{name}"
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end
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end
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set_register( :syscall_1 , ret_value ) # syscalls return into syscall_1
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set_register( std_reg(:syscall_1) , ret_value ) # syscalls return into syscall_1
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true
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true
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end
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end
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@ -43,7 +43,7 @@ module SlotMachine
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# This instance is filled with os return value
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# This instance is filled with os return value
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def self.restore_message(builder)
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def self.restore_message(builder)
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r8 = Risc::RegisterValue.new( :saved_message , :Message).set_compiler(builder.compiler)
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r8 = Risc::RegisterValue.new( :saved_message , :Message).set_compiler(builder.compiler)
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tmp = Risc::RegisterValue.new( :integer_tmp , :Integer).set_compiler(builder.compiler)
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tmp = Risc::RegisterValue.new( :restore_integer_return , :Integer).set_compiler(builder.compiler)
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builder.build do
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builder.build do
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tmp << Risc.syscall_reg(1)
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tmp << Risc.syscall_reg(1)
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message << r8
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message << r8
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@ -25,7 +25,7 @@ module Risc
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SlotToReg, Transfer, Syscall, NilClass,] #55
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SlotToReg, Transfer, Syscall, NilClass,] #55
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assert_equal "Hello again" , @interpreter.stdout
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assert_equal "Hello again" , @interpreter.stdout
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assert_equal Integer , get_return.class
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assert_equal Integer , get_return.class
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assert_equal 11 , get_return.to_string #bytes written
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assert_equal 11 , get_return #bytes written
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end
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end
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def test_call
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def test_call
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cal = main_ticks(11)
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cal = main_ticks(11)
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@ -44,12 +44,12 @@ module Risc
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done = main_ticks(25)
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done = main_ticks(25)
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assert_equal Syscall , done.class
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assert_equal Syscall , done.class
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assert_equal "Hello again" , @interpreter.stdout
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assert_equal "Hello again" , @interpreter.stdout
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assert_equal 11 , @interpreter.get_register(:syscall_1)
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assert_equal 11 , @interpreter.get_register(@interpreter.std_reg(:syscall_1))
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end
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end
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def test_move_sys_return
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def test_move_sys_return
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assert_transfer(26, :r0 ,:r1)
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assert_transfer(26, :r0 ,:r1)
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assert_equal 11 , @interpreter.get_register(:integer_tmp)
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assert_equal 11 , @interpreter.get_register(@interpreter.std_reg(:syscall_1))
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end
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end
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def test_restore_message
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def test_restore_message
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assert_transfer(27, :r14 ,:r13)
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assert_transfer(27, :r14 ,:r13)
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@ -28,10 +28,10 @@ module SlotMachine
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assert_transfer s + 5 , "id_factory_.next_object" , :syscall_2
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assert_transfer s + 5 , "id_factory_.next_object" , :syscall_2
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assert_transfer s + 6 , :message , :saved_message
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assert_transfer s + 6 , :message , :saved_message
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assert_syscall s + 7 , :putstring
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assert_syscall s + 7 , :putstring
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assert_transfer s + 8 , :syscall_1 , :integer_tmp
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assert_transfer s + 8 , :syscall_1 , :restore_integer_return
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assert_transfer s + 9 , :saved_message , :message
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assert_transfer s + 9 , :saved_message , :message
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assert_slot_to_reg s + 10 ,:message , 5 , "message.return_value"
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assert_slot_to_reg s + 10 ,:message , 5 , "message.return_value"
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assert_reg_to_slot s + 11 , :integer_tmp , "message.return_value" , 2
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assert_reg_to_slot s + 11 , :restore_integer_return , "message.return_value" , 2
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assert_slot_to_reg s + 12 ,:message , 5 , "message.return_value"
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assert_slot_to_reg s + 12 ,:message , 5 , "message.return_value"
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assert_reg_to_slot s + 13 , "message.return_value" , :message , 5
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assert_reg_to_slot s + 13 , "message.return_value" , :message , 5
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assert_branch s + 14 , "return_label"
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assert_branch s + 14 , "return_label"
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