fix inits registers

surprisingly easy. shorter code and more readable tests
This commit is contained in:
Torsten 2020-03-10 17:21:49 +02:00
parent 7d8ef8ef64
commit cf5a3c0102
2 changed files with 21 additions and 27 deletions

View File

@ -13,29 +13,24 @@ module SlotMachine
main = Parfait.object_space.get_method!(:Space, :main) main = Parfait.object_space.get_method!(:Space, :main)
# Set up the first message, but advance one, so main has somewhere to return to # Set up the first message, but advance one, so main has somewhere to return to
builder.build do builder.build do
factory! << Parfait.object_space.get_factory_for(:Message) factory = load_object Parfait.object_space.get_factory_for(:Message)
message << factory[:next_object] message << factory[:next_object]
next_message! << message[:next_message] factory[:next_object] << message[:next_message]
factory[:next_object] << next_message
end end
builder.reset_names
# Set up the call to main, with space as receiver # Set up the call to main, with space as receiver
SlotMachine::MessageSetup.new(main).build_with( builder ) SlotMachine::MessageSetup.new(main).build_with( builder )
builder.build do builder.build do
message << message[:next_message] message << message[:next_message]
space? << Parfait.object_space space = load_object Parfait.object_space
message[:receiver] << space message[:receiver] << space
end end
# set up return address and jump to main # set up return address and jump to main
exit_label = Risc.label(compiler.source , "#{compiler.receiver_type.object_class.name}.#{compiler.source.name}" ) exit_label = Risc.label(compiler.source , "#{compiler.receiver_type.object_class.name}.#{compiler.source.name}" )
ret_tmp = compiler.use_reg(:Label).set_builder(builder)
builder.build do builder.build do
ret_tmp << exit_label message[:return_address] << load_object(exit_label)
message[:return_address] << ret_tmp
add_code Risc.function_call( "__init__ issue call" , main) add_code Risc.function_call( "__init__ issue call" , main)
add_code exit_label add_code exit_label
end end
compiler.reset_regs
Macro.exit_sequence(builder) # exit will use mains return_value as exit_code Macro.exit_sequence(builder) # exit will use mains return_value as exit_code
return compiler return compiler
end end

View File

@ -19,26 +19,25 @@ module SlotMachine
assert_equal 19 , @method.to_risc.risc_instructions.length assert_equal 19 , @method.to_risc.risc_instructions.length
end end
def test_all def test_all
assert_load risc(1) , Parfait::Factory assert_load 1 , Parfait::Factory , "id_factory_"
assert_slot_to_reg risc(2) , :r1 , 2 , :r0 assert_slot_to_reg 2 , "id_factory_" , 2 , :message
assert_slot_to_reg risc(3),:r0 , 1 , :r2 assert_slot_to_reg 3 ,:message , 1 , "message.next_message"
assert_reg_to_slot risc(4) , :r2 , :r1 , 2 assert_reg_to_slot 4 , "message.next_message" , "id_factory_" , 2
assert_load risc(5) , Parfait::CallableMethod assert_load 5 , Parfait::CallableMethod , "id_callablemethod_"
assert_slot_to_reg risc(6),:r0 , 1 , :r2 assert_slot_to_reg 6 ,:message , 1 , "message.next_message"
assert_reg_to_slot risc(7) , :r1 , :r2 , 7 assert_reg_to_slot 7 , "id_callablemethod_" , "message.next_message" , 7
assert_slot_to_reg risc(8),:r0 , 1 , :r0 assert_slot_to_reg 8 ,:message , 1 , :message
assert_load risc(9) , Parfait::Space assert_load 9 , Parfait::Space , "id_space_"
assert_reg_to_slot risc(10) , :r3 , :r0 , 2 assert_reg_to_slot 10 , "id_space_" , :message , 2
assert_load risc(11) , Risc::Label assert_load 11 , Risc::Label , "id_label_"
assert_reg_to_slot risc(12) , :r4 , :r0 , 4 assert_reg_to_slot 12 , "id_label_" , :message , 4
assert_equal Risc::FunctionCall, risc(13).class assert_equal Risc::FunctionCall, risc(13).class
assert_equal :main, risc(13).method.name assert_equal :main, risc(13).method.name
assert_label risc(14) , "Object.__init__" assert_label 14 , "Object.__init__"
assert_transfer risc(15) , :r0 , :r8 assert_transfer 15 , :message , :saved_message
assert_slot_to_reg risc(16),:r0 , 5 , :r0 assert_slot_to_reg 16 ,:message , 5 , :message
assert_slot_to_reg risc(17),:r0 , 2 , :r0 assert_slot_to_reg 17 ,:message , 2 , "message.data_1"
assert_equal Risc::Syscall, risc(18).class assert_syscall 18, :exit
assert_equal :exit, risc(18).name
end end
end end
end end