fix the exit sequence

was returning wrong register (1, not 0) also saving the message for test, which changes order as the return value destroys the message
2018-06-19 19:52:06 +03:00
parent 5f7683efcf
commit ce79617875
26 changed files with 57 additions and 65 deletions
--- a/test/risc/interpreter/calling/test_div10.rb
+++ b/test/risc/interpreter/calling/test_div10.rb
@ -28,8 +28,8 @@ module Risc
             RegToSlot, SlotToReg, SlotToReg, SlotToReg, FunctionReturn,
             SlotToReg, SlotToReg, RegToSlot, Branch, SlotToReg,
             SlotToReg, RegToSlot, SlotToReg, SlotToReg, RegToSlot,
-             SlotToReg, SlotToReg, SlotToReg, FunctionReturn, SlotToReg,
-             SlotToReg, Branch, Transfer, Syscall, NilClass]
+             SlotToReg, SlotToReg, SlotToReg, FunctionReturn, Transfer,
+             SlotToReg, Branch, SlotToReg, Syscall, NilClass]
       assert_equal 2 , get_return
    end