reinserted arm for now, until dependecy is cleaned up. fixed tests

lib/arm/arm_machine.rb

@@ -0,0 +1,103 @@
+module Arm
+  class ArmMachine < Register::RegisterMachine
+    # The constants are here for readablility, the code uses access functions below
+    RETURN_REG = :r0
+    TYPE_REG = :r1
+    RECEIVER_REG = :r2
+    SYSCALL_REG = :r7
+    
+    def return_register
+      RETURN_REG
+    end
+    def type_register
+      TYPE_REG
+    end
+    def receiver_register
+      RECEIVER_REG
+    end
+
+    def function_call into , call
+      raise "Not CallSite #{call.inspect}" unless call.is_a? Virtual::CallSite
+      raise "Not linked #{call.inspect}" unless call.function
+      into.add_code  call(  call.function  )
+      raise "No return type for #{call.function.name}" unless call.function.return_type
+      call.function.return_type
+    end
+
+    def main_start context
+      entry = Virtual::Block.new("main_entry",nil,nil)
+      entry.add_code mov(  :fp ,  0 )
+      entry.add_code call( context.function )
+      entry
+    end
+    def main_exit context
+      exit = Virtual::Block.new("main_exit",nil,nil)
+      syscall(exit , 1)
+      exit
+    end
+    def function_entry block, f_name
+        block.add_code  push( [:lr] )
+        block
+    end
+    def function_exit entry , f_name
+      entry.add_code   pop(  [:pc] )
+      entry
+    end
+
+    # assumes string in standard receiver reg (r2) and moves them down for the syscall
+    def write_stdout function #, string
+      # TODO save and restore r0
+      function.mov( :r0 ,  1 ) # 1 == stdout
+      function.mov( :r1 , receiver_register )
+      function.mov( receiver_register , :r3 )
+      syscall( function.insertion_point , 4 ) # 4 == write
+    end
+
+    # stop, do not return
+    def exit function #, string
+      syscall( function.insertion_point , 1 ) # 1 == exit
+    end
+
+    
+    # the number (a Virtual::integer) is (itself) divided by 10, ie overwritten by the result
+    #  and the remainder is overwritten (ie an out argument)
+    # not really a function, more a macro, 
+    def div10 function, number , remainder
+      # Note about division: devision is MUCH more expensive than one would have thought
+      # And coding it is a bit of a mind leap: it's all about finding a a result that gets the 
+      #  remainder smaller than an int. i'll post some links sometime. This is from the arm manual
+      tmp = function.new_local
+      function.instance_eval do 
+        sub( remainder ,  number ,  10 )
+        sub( number ,  number ,  number ,  shift_lsr: 2)
+        add( number ,  number ,  number ,  shift_lsr: 4)
+        add( number ,  number ,  number ,  shift_lsr: 8)
+        add( number ,  number ,  number ,  shift_lsr: 16)
+        mov( number ,   number , shift_lsr: 3)
+        add( tmp ,  number ,  number ,  shift_lsl: 2)
+        sub( remainder ,  remainder ,  tmp , shift_lsl: 1 , update_status: 1)
+        add( number ,  number,   1 , condition_code: :pl )
+        add( remainder ,  remainder ,   10 , condition_code: :mi )
+      end
+    end
+
+    def syscall block , num
+      # This is very arm specific, syscall number is passed in r7, other arguments like a c call ie 0 and up
+      sys = Virtual::Integer.new( Virtual::RegisterReference.new(SYSCALL_REG) )
+      ret = Virtual::Integer.new( Virtual::RegisterReference.new(RETURN_REG) )
+      block.add_code  mov(  sys , num )
+      block.add_code  swi(  0 )
+      #todo should write type into r1 according to syscall
+      ret
+    end
+
+  end
+end
+
+require_relative "stack_instruction"
+require_relative "logic_instruction"
+require_relative "move_instruction"
+require_relative "compare_instruction"
+require_relative "memory_instruction"
+require_relative "call_instruction"
+require_relative "constants"

lib/arm/assembler.rb

@@ -0,0 +1,99 @@
+require 'arm/nodes'
+require 'vm/block'
+require 'stream_reader'
+require 'stringio'
+require "arm/string_literal"
+
+module Arm
+  
+  # Assembler is the the top-level of the code hierachy, except it is not derived from code
+  # instead a Assembler is a list of blocks (and string constants)
+  
+  # All code is created in blocks (see there) and there are two styles for that, for forward of backward
+  # referencing. Read function block and add_block and Block.set
+  
+  
+  class Assembler
+
+    def initialize
+      @blocks = []
+      @string_table = {}
+    end
+
+    attr_reader  :blocks 
+
+    # Assembling to string will return a binary string of the whole program, ie all blocks and the 
+    # strings they use
+    # As a memory reference this would be callable, but more likely you will hand it over to 
+    # an ObjectWriter as the .text section and then link it. And then execute it :-)
+    def assemble_to_string
+      #put the strings at the end of the assembled code.
+      # adding them will fix their position and make them assemble after
+      @string_table.values.each do |data|
+        add_block data
+      end
+      io = StringIO.new
+      assemble(io)
+      io.string
+    end
+
+    # Add a string to the string table. Strings are global and constant. So only one copy of each 
+    # string exists
+    # Internally StringConstants are created and stored and during assembly written after the blocks
+    def add_string str
+      code = @string_table[str]
+      return code if code
+      data = Virtual::StringConstant.new(str)
+      @string_table[str] = data
+    end
+
+    # Length of all blocks. Does not take strings into account as they are added after all blocks.
+    # This is used to determine where a block when it is added after creation (see add_block)
+    def length
+      @blocks.inject(0) {| sum  , item | sum + item.length}
+    end
+
+    # This is how you add a forward declared block. This is called automatically when you 
+    # call block with ruby block, but has to be done manually if not
+    def add_block block
+      block.at self.length
+      @blocks << block
+    end
+
+    # return the block of the given name
+    # or raise an exception, as this is meant to be called when the block is available 
+    def get_block name
+      name = name.to_sym
+      block = @blocks.find {|b| b.name == name}
+      raise "No block found for #{name} (in #{blocks.collect{|b|b.name}.join(':')})" unless block
+      block
+    end
+    # this is used to create blocks. 
+    # All functions that have no args are interpreted as block names
+    # and if a block is provided, it is evaluated in the (ruby)blocks scope and the block added to the 
+    # program immediately. 
+    # If no block is provided (forward declaration), you must call code on it later 
+    def method_missing(meth, *args, &block)
+      if args.length == 0
+        code = Block.new(meth.to_s , self )
+        if block_given?
+          add_block code
+          code.instance_eval(&block)
+        end
+        return code
+      else
+        super
+      end
+    end
+    
+
+    private
+    
+    def assemble(io)
+      @blocks.each do |obj|
+        obj.assemble io
+      end
+    end
+  end
+end
+

lib/arm/call_instruction.rb

@@ -0,0 +1,70 @@
+require_relative "nodes"
+
+module Arm
+  # There are only three call instructions in arm branch (b), call (bl) and syscall (swi)
+  
+  # A branch could be called a jump as it has no notion of returning
+  
+  # The pc is put into the link register to make a return possible
+  # a return is affected by moving the stored link register into the pc, effectively a branch
+  
+  # swi (SoftWareInterrupt) or system call is how we call the kernel.
+  # in Arm the register layout is different and so we have to place the syscall code into register 7
+  # Registers 0-6 hold the call values as for a normal c call
+  
+  class CallInstruction < ::Register::CallInstruction
+    include Arm::Constants
+    
+    # arm intrucioons are pretty sensible, and always 4 bytes (thumb not supported)
+    def length
+      4
+    end
+
+    def initialize(first, attributes)
+      super(first , attributes)
+      @attributes[:update_status] = 0
+      @attributes[:condition_code] = :al if @attributes[:condition_code] == nil
+    end
+    
+    def assemble(io, assembler)
+      case @attributes[:opcode]
+      when :b, :call
+        arg = @first
+        #puts "BLAB #{arg.inspect}"
+        if( arg.is_a? Fixnum ) #HACK to not have to change the code just now
+          arg = Virtual::IntegerConstant.new( arg )
+        end
+        if arg.is_a?(Virtual::Block) or arg.is_a?(Virtual::CompiledMethod)
+          diff = arg.position  - 8
+          diff -= self.position
+          arg = Virtual::IntegerConstant.new(diff)
+        end
+        if (arg.is_a?(Virtual::IntegerConstant))
+          jmp_val = arg.integer >> 2
+          packed = [jmp_val].pack('l')
+          # signed 32-bit, condense to 24-bit
+          # TODO add check that the value fits into 24 bits
+          io << packed[0,3]
+        else
+          raise "else not coded arg =#{arg}: #{inspect}"
+        end
+        io.write_uint8 op_bit_code | (COND_CODES[@attributes[:condition_code]] << 4)
+      when :swi
+        arg = @first
+        if( arg.is_a? Fixnum ) #HACK to not have to change the code just now
+          arg = Virtual::IntegerConstant.new( arg )
+        end
+        if (arg.is_a?(Virtual::IntegerConstant))
+          packed = [arg.integer].pack('L')[0,3]
+          io << packed
+          io.write_uint8 0b1111 | (COND_CODES[@attributes[:condition_code]] << 4)
+        else
+          raise "invalid operand argument expected literal not #{arg} #{inspect}"
+        end
+      else
+        raise "Should not be the case #{inspect}"
+      end
+    end
+    
+  end#class
+end

lib/arm/compare_instruction.rb

@@ -0,0 +1,95 @@
+module Arm
+  class CompareInstruction < Register::CompareInstruction
+    include Arm::Constants
+
+    def initialize(left , right , attributes)
+      super(left , right,  attributes) 
+      @attributes[:condition_code] = :al if @attributes[:condition_code] == nil
+      @operand = 0
+      @immediate = 0      
+      @attributes[:update_status] = 1
+      @rn = left
+      @rd = :r0
+    end
+    # arm instructions are pretty sensible, and always 4 bytes (thumb not supported)
+    def length
+      4
+    end
+
+    def assemble(io, assembler)
+      # don't overwrite instance variables, to make assembly repeatable
+      rn = @rn
+      operand = @operand
+      immediate = @immediate
+
+      arg = @right
+      if arg.is_a?(Virtual::ObjectConstant)
+        # do pc relative addressing with the difference to the instuction
+        # 8 is for the funny pipeline adjustment (ie oc pointing to fetch and not execute)
+        arg = Virtual::IntegerConstant.new( arg.position - self.position - 8 )
+        rn = :pc
+      end
+      if( arg.is_a? Fixnum ) #HACK to not have to change the code just now
+        arg = Register::RegisterReference.new( arg )
+      end
+      if (arg.is_a?(Virtual::IntegerConstant))
+        if (arg.integer.fits_u8?)
+          # no shifting needed
+          operand = arg.integer
+          immediate = 1
+        elsif (op_with_rot = calculate_u8_with_rr(arg))
+          operand = op_with_rot
+          immediate = 1
+          raise "hmm"
+        else
+          raise "cannot fit numeric literal argument in operand #{arg.inspect}"
+        end
+      elsif (arg.is_a?(Symbol) or arg.is_a?(::Register::RegisterReference))
+        operand = arg
+        immediate = 0
+      elsif (arg.is_a?(Arm::Shift))
+        rm_ref = arg.argument
+        immediate = 0
+        shift_op = {'lsl' => 0b000, 'lsr' => 0b010, 'asr' => 0b100,
+                    'ror' => 0b110, 'rrx' => 0b110}[arg.type]
+        if (arg.type == 'ror' and arg.value.nil?)
+          # ror #0 == rrx
+          raise "cannot rotate by zero #{arg} #{inspect}"
+        end
+    
+        arg1 = arg.value
+        if (arg1.is_a?(Virtual::IntegerConstant))
+          if (arg1.value >= 32)
+            raise "cannot shift by more than 31 #{arg1} #{inspect}"
+          end
+          shift_imm = arg1.value
+        elsif (arg1.is_a?(Arm::Register))
+          shift_op val |= 0x1;
+          shift_imm = arg1.number << 1
+        elsif (arg.type == 'rrx')
+          shift_imm = 0
+        end
+        operand = rm_ref | (shift_op << 4) | (shift_imm << 4+3)
+      else
+        raise "invalid operand argument #{arg.inspect} , #{inspect}"
+      end
+      instuction_class = 0b00 # OPC_DATA_PROCESSING
+      val = (operand.is_a?(Symbol) or operand.is_a?(::Register::RegisterReference)) ? reg_code(operand) : operand 
+      val = 0 if val == nil
+      val = shift(val , 0)
+      raise inspect unless reg_code(@rd)
+      val |= shift(reg_code(@rd) ,            12)     
+      val |= shift(reg_code(rn) ,            12+4)   
+      val |= shift(@attributes[:update_status] , 12+4+4)#20 
+      val |= shift(op_bit_code ,        12+4+4  +1)
+      val |= shift(immediate ,                  12+4+4  +1+4) 
+      val |= shift(instuction_class ,   12+4+4  +1+4+1) 
+      val |= shift(cond_bit_code ,      12+4+4  +1+4+1+2)
+      io.write_uint32 val
+    end
+    def shift val , by
+      raise "Not integer #{val}:#{val.class} #{inspect}" unless val.is_a? Fixnum
+      val << by
+    end
+  end
+end

lib/arm/constants.rb

@@ -0,0 +1,117 @@
+module Arm
+
+  module Constants
+    OPCODES = {
+      :adc => 0b0101, :add => 0b0100,
+      :and => 0b0000, :bic => 0b1110,
+      :eor => 0b0001, :orr => 0b1100,
+      :rsb => 0b0011, :rsc => 0b0111,
+      :sbc => 0b0110, :sub => 0b0010,
+
+      # for these Rn is sbz (should be zero)
+      :mov => 0b1101,
+      :mvn => 0b1111,
+      # for these Rd is sbz and S=1
+      :cmn => 0b1011,
+      :cmp => 0b1010,
+      :teq => 0b1001,
+      :tst => 0b1000,
+
+      :b => 0b1010,
+      :call=> 0b1011
+    }
+    #return the bit patter that the cpu uses for the current instruction @attributes[:opcode]
+    def op_bit_code
+      bit_code = OPCODES[opcode] 
+      bit_code or raise "no code found for #{opcode} #{inspect}"
+    end
+
+    #codition codes can be applied to many instructions and thus save branches
+    # :al => always   , :eq => equal  and so on
+    # eq mov if equal :moveq r1 r2 (also exists as function) will only execute if the last operation was 0
+    COND_CODES = {
+      :al => 0b1110, :eq => 0b0000,
+      :ne => 0b0001, :cs => 0b0010,
+      :mi => 0b0100, :hi => 0b1000,
+      :cc => 0b0011, :pl => 0b0101,
+      :ls => 0b1001, :vc => 0b0111,
+      :lt => 0b1011, :le => 0b1101,
+      :ge => 0b1010, :gt => 0b1100,
+      :vs => 0b0110
+    }
+    #return the bit pattern for the @attributes[:condition_code] variable, which signals the conditional code
+    def cond_bit_code
+      COND_CODES[@attributes[:condition_code]] or throw "no code found for #{@attributes[:condition_code]}"
+    end
+    
+    REGISTERS = { 'r0' => 0, 'r1' => 1, 'r2' => 2, 'r3' => 3, 'r4' => 4, 'r5' => 5,
+                  'r6' => 6, 'r7' => 7, 'r8' => 8, 'r9' => 9, 'r10' => 10, 'r11' => 11,
+                  'r12' => 12, 'r13' => 13, 'r14' => 14, 'r15' => 15, 'a1' => 0, 'a2' => 1,
+                  'a3' => 2, 'a4' => 3, 'v1' => 4, 'v2' => 5, 'v3' => 6, 'v4' => 7, 'v5' => 8,
+                  'v6' => 9, 'rfp' => 9, 'sl' => 10, 'fp' => 11, 'ip' => 12, 'sp' => 13,
+                  'lr' => 14, 'pc' => 15 }
+    def reg r_name
+      code = reg_code r_name
+      raise "no such register #{r_name}" unless code
+      Arm::Register.new(r_name.to_sym , code )
+    end
+    def reg_code r_name
+      raise "double r #{r_name}" if( :rr1 == r_name) 
+      if r_name.is_a? ::Register::RegisterReference
+        r_name = r_name.symbol
+      end
+      if r_name.is_a? Fixnum
+        r_name = "r#{r_name}"
+      end
+      r = REGISTERS[r_name.to_s]
+      raise "no reg #{r_name}" if r == nil
+      r
+    end
+
+   def calculate_u8_with_rr(arg)
+     parts = arg.value.to_s(2).rjust(32,'0').scan(/^(0*)(.+?)0*$/).flatten
+     pre_zeros = parts[0].length
+     imm_len = parts[1].length
+     if ((pre_zeros+imm_len) % 2 == 1)
+       u8_imm = (parts[1]+'0').to_i(2)
+       imm_len += 1
+     else
+       u8_imm = parts[1].to_i(2)
+     end
+     if (u8_imm.fits_u8?)
+       # can do!
+       rot_imm = (pre_zeros+imm_len) / 2
+       if (rot_imm > 15)
+         return nil
+       end
+       return u8_imm | (rot_imm << 8)
+     else
+       return nil
+     end
+   end
+   
+   #slighly wrong place for this code, but since the module gets included in instructions anyway . . .
+   # implement the barrel shifter on the operand (which is set up before as an integer)
+   def shift_handling
+     op = 0
+     #codes that one can shift, first two probably most common.
+     # l (in lsr) means logical, ie unsigned, a (in asr) is arithmetic, ie signed
+     {'lsl' => 0b000, 'lsr' => 0b010, 'asr' => 0b100, 'ror' => 0b110, 'rrx' => 0b110}.each do |short, bin|
+       long = "shift_#{short}".to_sym
+       if shif = @attributes[long]
+         shif = shif.integer if (shif.is_a?(Virtual::IntegerConstant))
+         if (shif.is_a?(Virtual::Integer))
+           raise "should not be supported, check code #{inspect}"
+           bin |= 0x1;
+           shift = shif.register << 1
+         end
+         raise "0 < shift <= 32  #{shif} #{inspect}"  if (shif >= 32) or( shif < 0)
+         op |=   shift(bin  , 4 )
+         op |=   shift(shif , 4+3)
+         break
+       end
+     end
+     return op
+   end
+  end
+end

lib/arm/logic_instruction.rb

@@ -0,0 +1,74 @@
+module Arm
+
+  class LogicInstruction < Register::LogicInstruction
+    include Arm::Constants
+
+    def initialize(result , left , right , attributes = {})
+      super(result ,left , right , attributes)
+      @attributes[:update_status] = 0 if @attributes[:update_status] == nil
+      @attributes[:condition_code] = :al if @attributes[:condition_code] == nil
+      @operand = 0
+
+      raise "Left arg must be given #{inspect}" unless @left
+      @immediate = 0      
+    end
+    
+    # arm intrucioons are pretty sensible, and always 4 bytes (thumb not supported)
+    def length
+      4
+    end
+
+    def assemble(io, assembler)
+      # don't overwrite instance variables, to make assembly repeatable
+      left = @left
+      operand = @operand
+      immediate = @immediate
+
+      right = @right
+      if @left.is_a?(Virtual::ObjectConstant)
+        # do pc relative addressing with the difference to the instuction
+        # 8 is for the funny pipeline adjustment (ie pointing to fetch and not execute)
+        right = @left.position - self.position - 8 
+        left = :pc
+      end
+      # automatic wrapping, for machine internal code and testing
+      if( right.is_a? Fixnum )
+        right = Virtual::IntegerConstant.new( right )
+      end
+      if (right.is_a?(Virtual::IntegerConstant))
+        if true #TODO (right.integer.fits_u8?)
+          # no shifting needed
+          operand = right.integer
+          immediate = 1
+        elsif (op_with_rot = calculate_u8_with_rr(right))
+          operand = op_with_rot
+          immediate = 1
+#          raise "hmm"
+        else
+          raise "cannot fit numeric literal argument in operand #{right.inspect}"
+        end
+      elsif (right.is_a?(Symbol) or right.is_a?(::Register::RegisterReference))
+        operand = reg_code(right)    #integer means the register the integer is in (otherwise constant)
+        immediate = 0                # ie not immediate is register
+      else
+        raise "invalid operand argument #{right.inspect} , #{inspect}"
+      end
+      op =  shift_handling
+      instuction_class = 0b00 # OPC_DATA_PROCESSING
+      val = shift(operand , 0)
+      val |= shift(op , 0) # any barral action, is already shifted
+      val |= shift(reg_code(@result) ,            12)     
+      val |= shift(reg_code(left) ,            12+4)   
+      val |= shift(@attributes[:update_status] , 12+4+4)#20 
+      val |= shift(op_bit_code ,        12+4+4  +1)
+      val |= shift(immediate ,                  12+4+4  +1+4) 
+      val |= shift(instuction_class ,   12+4+4  +1+4+1) 
+      val |= shift(cond_bit_code ,      12+4+4  +1+4+1+2)
+      io.write_uint32 val
+    end
+    def shift val , by
+      raise "Not integer #{val}:#{val.class} #{inspect}" unless val.is_a? Fixnum
+      val << by
+    end
+  end
+end

lib/arm/memory_instruction.rb

@@ -0,0 +1,107 @@
+require_relative "nodes"
+
+module Arm
+  # ADDRESSING MODE 2
+  # Implemented: immediate offset with offset=0
+  class MemoryInstruction < ::Register::MemoryInstruction
+    include Arm::Constants
+
+    def initialize(result , left , right = nil , attributes = {})
+      super(result , left , right , attributes)
+      @attributes[:update_status] = 0 if @attributes[:update_status] == nil
+      @attributes[:condition_code] = :al if @attributes[:condition_code] == nil
+      @operand = 0
+      raise "alert" if right.is_a? Virtual::Block
+      @pre_post_index = 0 #P flag
+      @add_offset = 0 #U flag
+      @is_load = opcode.to_s[0] == "l" ? 1 : 0 #L (load) flag
+    end
+
+    # arm intructions are pretty sensible, and always 4 bytes (thumb not supported)
+    def length
+      4
+    end
+                  
+    def assemble(io , assembler )
+      # don't overwrite instance variables, to make assembly repeatable
+      rn = @rn
+      operand = @operand
+      add_offset = @add_offset
+      arg = @left
+      arg = arg.symbol if( arg.is_a? ::Register::RegisterReference )
+      #str / ldr are _serious instructions. With BIG possibilities not half are implemented
+      if (arg.is_a?(Symbol)) #symbol is register
+        rn = arg
+        if @right
+          operand = @right
+          #TODO better test, this operand integer (register) does not work. but sleep first
+          operand = operand.symbol if operand.is_a? ::Register::RegisterReference
+          unless( operand.is_a? Symbol)
+            #puts "operand #{operand.inspect}"
+            if (operand < 0)
+              add_offset = 0
+              #TODO test/check/understand
+              operand *= -1
+            else
+              add_offset = 1
+            end
+            if (@operand.abs > 4095)
+              raise "reference offset too large/small (max 4095) #{arg} #{inspect}"
+            end
+          end
+        end
+      elsif (arg.is_a?(Virtual::ObjectConstant) ) #use pc relative
+        rn = :pc
+        operand = arg.position - self.position  - 8 #stringtable is after code
+        add_offset = 1
+        if (operand.abs > 4095)
+          raise "reference offset too large/small (max 4095) #{arg} #{inspect}"
+        end
+      elsif( arg.is_a?(Virtual::IntegerConstant) )
+        #TODO untested brach, probably not working
+        raise "is this working ??  #{arg} #{inspect}"
+        @pre_post_index = 1
+        @rn = pc
+        @use_addrtable_reloc = true
+        @addrtable_reloc_target = arg
+      else
+        raise "invalid operand argument #{arg.inspect} #{inspect}"
+      end
+      #not sure about these 2 constants. They produce the correct output for str r0 , r1
+      # but i can't help thinking that that is because they are not used in that instruction and
+      # so it doesn't matter. Will see
+      add_offset = 1
+      # TODO to be continued
+      add_offset = 0 if @attributes[:add_offset]
+      @pre_post_index = 1
+      @pre_post_index = 0 if @attributes[:flaggie]
+      w = 0 #W flag
+      byte_access = opcode.to_s[-1] == "b" ? 1 : 0 #B (byte) flag
+      instuction_class =  0b01 # OPC_MEMORY_ACCESS
+      if operand.is_a?(Symbol)
+        val = reg_code(operand) 
+        @pre_post_index = 0
+        i = 1  # not quite sure about this, but it gives the output of as. read read read.
+      else
+        i = 0 #I flag (third bit)
+        val = operand
+      end
+      val = shift(val , 0 ) # for the test
+      val |= shift(reg_code(@result) ,        12 )  
+      val |= shift(reg_code(rn) ,        12+4) #16  
+      val |= shift(@is_load ,        12+4  +4)
+      val |= shift(w ,              12+4  +4+1)
+      val |= shift(byte_access ,    12+4  +4+1+1)
+      val |= shift(add_offset ,    12+4  +4+1+1+1)
+      val |= shift(@pre_post_index, 12+4  +4+1+1+1+1)#24
+      val |= shift(i ,              12+4  +4+1+1+1+1  +1)
+      val |= shift(instuction_class,12+4  +4+1+1+1+1  +1+1)  
+      val |= shift(cond_bit_code ,  12+4  +4+1+1+1+1  +1+1+2)
+      io.write_uint32 val
+    end
+    def shift val , by
+      raise "Not integer #{val}:#{val.class} #{inspect}" unless val.is_a? Fixnum
+      val << by
+    end
+  end
+end

lib/arm/move_instruction.rb

@@ -0,0 +1,79 @@
+module Arm
+
+  class MoveInstruction < Register::MoveInstruction
+    include Arm::Constants
+
+    def initialize(to , from , attributes) 
+      super(to , from , attributes)
+      @attributes[:update_status] = 0 if @attributes[:update_status] == nil
+      @attributes[:condition_code] = :al if @attributes[:condition_code] == nil
+      @attributes[:opcode] = attributes[:opcode]
+      @operand = 0
+
+      @immediate = 0      
+      @rn = :r0 # register zero = zero bit pattern
+#   NO-OP -> pass   raise inspect if  to.is_a?(Virtual::Value) and 
+ #                       from.is_a?(Virtual::Value) and 
+  #                      !@attributes[:shift_lsr] and
+   #                     to.symbol == from.symbol
+      raise "uups " if @to.symbol == :rr1
+    end
+    
+    # arm intrucions are pretty sensible, and always 4 bytes (thumb not supported)
+    def length
+      4
+    end
+
+    def assemble(io, assembler)
+      # don't overwrite instance variables, to make assembly repeatable
+      rn = @rn
+      operand = @operand
+      immediate = @immediate
+
+      right = @from
+      if right.is_a?(Virtual::ObjectConstant)
+        # do pc relative addressing with the difference to the instuction
+        # 8 is for the funny pipeline adjustment (ie oc pointing to fetch and not execute)
+        right = Virtual::IntegerConstant.new( right.position - self.position - 8 )
+        rn = :pc
+      end
+      if( right.is_a? Fixnum )
+        right = Virtual::IntegerConstant.new( right )
+      end
+      if (right.is_a?(Virtual::IntegerConstant))
+        if (right.integer.fits_u8?)
+          # no shifting needed
+          operand = right.integer
+          immediate = 1
+        elsif (op_with_rot = calculate_u8_with_rr(right))
+          operand = op_with_rot
+          immediate = 1
+          raise "hmm"
+        else
+          raise "cannot fit numeric literal argument in operand #{right.inspect}"
+        end
+      elsif (right.is_a?(Symbol) or right.is_a?(Virtual::Integer))
+        operand = reg_code(right)    #integer means the register the integer is in (otherwise constant)
+        immediate = 0                # ie not immediate is register
+      else
+        raise "invalid operand argument #{right.inspect} , #{inspect}"
+      end
+      op =  shift_handling
+      instuction_class = 0b00 # OPC_DATA_PROCESSING
+      val = shift(operand , 0)
+      val |= shift(op , 0) # any barral action, is already shifted
+      val |= shift(reg_code(@to) ,            12)     
+      val |= shift(reg_code(rn) ,            12+4)   
+      val |= shift(@attributes[:update_status] , 12+4+4)#20 
+      val |= shift(op_bit_code ,        12+4+4  +1)
+      val |= shift(immediate ,                  12+4+4  +1+4) 
+      val |= shift(instuction_class ,   12+4+4  +1+4+1) 
+      val |= shift(cond_bit_code ,      12+4+4  +1+4+1+2)
+      io.write_uint32 val
+    end
+    def shift val , by
+      raise "Not integer #{val}:#{val.class} in #{inspect}" unless val.is_a? Fixnum
+      val << by
+    end
+  end
+end

lib/arm/nodes.rb

@@ -0,0 +1,37 @@
+module Arm
+
+  class Shift 
+    attr_accessor :type, :value, :argument
+  end
+
+  # Registers have off course a name (r1-16 for arm)
+  # but also refer to an address. In other words they can be an operand for instructions.
+  # Arm has addressing modes abound, and so can add to a register before actually using it
+  # If can actually shift or indeed shift what it adds, but not implemented
+  class Register 
+    attr_accessor :name , :offset , :bits
+    def initialize name , bits
+      @name = name
+      @bits = bits
+      @offset = 0 
+    end
+    
+    # this is for the dsl, so we can write pretty code like r1 + 4
+    # when we want to access the next word (4) after r1
+    def + number
+      @offset = number
+      self
+    end
+  end
+
+  # maybe not used at all as code_gen::instruction raises if used.
+  # instead now using Arrays
+  class RegisterList 
+    attr_accessor :registers
+    def initialize regs
+      @registers = regs
+      regs.each{ |reg| raise  "not a reg #{sym} , #{reg}" unless reg.is_a?(Arm::Register) }
+    end
+  end
+
+end

lib/arm/stack_instruction.rb

@@ -0,0 +1,65 @@
+require_relative "constants"
+
+module Arm
+  # ADDRESSING MODE 4
+  class StackInstruction < Register::StackInstruction
+    include Arm::Constants
+
+    # arm intrucioons are pretty sensible, and always 4 bytes (thumb not supported)
+    def length
+      4
+    end
+
+    def initialize(first , attributes)
+      super(first , attributes) 
+      @attributes[:update_status] = 0 if @attributes[:update_status] == nil
+      @attributes[:condition_code] = :al if @attributes[:condition_code] == nil
+      @attributes[:opcode] = attributes[:opcode]
+      @operand = 0
+
+      @attributes[:update_status]= 0
+      @rn = :r0 # register zero = zero bit pattern
+      # downward growing, decrement before memory access
+      # official ARM style stack as used by gas
+    end
+                  
+    def assemble(io, assembler)
+      # don't overwrite instance variables, to make assembly repeatable
+      operand = @operand
+      
+      if (@first.is_a?(Array))
+        operand = 0
+        @first.each do |r|
+          raise "nil register in push, index #{r}- #{inspect}" if r.nil?
+          operand |= (1 << reg_code(r))
+        end
+      else
+        raise "invalid operand argument #{inspect}"
+      end
+      write_base = 1
+      if (opcode == :push)
+        pre_post_index = 1
+        up_down = 0
+        is_pop = 0
+      else  #pop
+        pre_post_index = 0
+        up_down = 1
+        is_pop = 1
+      end
+      instuction_class = 0b10 # OPC_STACK
+      cond = @attributes[:condition_code].is_a?(Symbol) ?  COND_CODES[@attributes[:condition_code]]   : @attributes[:condition_code]
+      @rn = :sp # sp register
+      #assemble of old
+      val = operand
+      val |= (reg_code(@rn) <<             16)
+      val |= (is_pop <<              16+4) #20
+      val |= (write_base <<          16+4+ 1) 
+      val |= (@attributes[:update_status] <<  16+4+ 1+1) 
+      val |= (up_down <<             16+4+ 1+1+1)
+      val |= (pre_post_index <<      16+4+ 1+1+1+1)#24
+      val |= (instuction_class <<    16+4+ 1+1+1+1 +2) 
+      val |= (cond <<                16+4+ 1+1+1+1 +2+2)
+      io.write_uint32 val
+    end
+  end
+end

lib/register/instruction.rb

@@ -111,7 +111,7 @@ module Register
     def initialize result , left , right , options = {}
       @result = result
       @left = left
-      @right = right.is_a?(Fixnum) ? IntegerConstant.new(right) : right
+      @right = right.is_a?(Fixnum) ? Virtual::IntegerConstant.new(right) : right
       super(options)
     end
     attr_accessor :result , :left ,  :right
@@ -149,7 +149,7 @@ module Register
   class MoveInstruction < Instruction
     def initialize to , from , options = {}
       @to = to
-      @from = from.is_a?(Fixnum) ? IntegerConstant.new(from) : from
+      @from = from.is_a?(Fixnum) ? Virtual::IntegerConstant.new(from) : from
       raise "move must have from set #{inspect}" unless from
       super(options)
     end

lib/register/register_machine.rb

@@ -111,7 +111,7 @@ module Register
         options = {} if options == nil
         options.merge defaults
         options[:opcode] = inst
-        first = Register::Integer.new(first) if first.is_a? Symbol
+        first = Register::RegisterReference.new(first) if first.is_a? Symbol
         clazz.new(first , options)
       end
     end
@@ -122,8 +122,8 @@ module Register
       create_method(inst) do |left ,right , options = nil|
         options = {} if options == nil
         options.merge defaults
-        left = Register::Integer.new(left) if left.is_a? Symbol
+        left = Register::RegisterReference.new(left) if left.is_a? Symbol
-        right = Register::Integer.new(right) if right.is_a? Symbol
+        right = Register::RegisterReference.new(right) if right.is_a? Symbol
         options[:opcode] = inst
         clazz.new(left , right ,options)
       end
@@ -136,9 +136,9 @@ module Register
         options = {} if options == nil
         options.merge defaults
         options[:opcode] = inst
-        result = Register::Integer.new(result) if result.is_a? Symbol
+        result = Register::RegisterReference.new(result) if result.is_a? Symbol
-        left = Register::Integer.new(left) if left.is_a? Symbol
+        left = Register::RegisterReference.new(left) if left.is_a? Symbol
-        right = Register::Integer.new(right) if right.is_a? Symbol
+        right = Register::RegisterReference.new(right) if right.is_a? Symbol
         clazz.new(result, left , right ,options)
       end
     end

test/arm/arm-helper.rb

@@ -0,0 +1,29 @@
+require_relative '../helper'
+
+# try  to test that the generation of basic instructions works
+# one instruction at a time, reverse testing from objdump --demangle -Sfghxp
+# tests are named as per assembler code, ie test_mov testing mov instruction
+#  adc add and bic eor orr rsb rsc sbc sub mov mvn cmn cmp teq tst b call bx swi strb
+
+module ArmHelper 
+  # need Assembler and a block (see those classes) 
+  def setup
+    @machine = Arm::ArmMachine.new
+  end
+
+  # code is what the generator spits out, at least one instruction worth (.first)
+  # the op code is wat was witten as assembler in the first place and the binary result
+  # is reversed and in 4 bytes as ruby can only do 31 bits and so we can't test with just one int (?)
+  def assert_code code , op , should
+    assert_equal op ,  code.opcode
+    io = StringIO.new
+    code.assemble(io,nil)
+    binary = io.string
+    assert_equal 4 , binary.length , "code length wrong for #{code.inspect}"
+    index = 0
+    binary.each_byte do |byte |
+      assert_equal should[index] , byte , "byte #{index} 0x#{should[index].to_s(16)} != 0x#{byte.to_s(16)}"
+      index += 1
+    end
+  end
+end

test/arm/test_all.rb

@@ -0,0 +1,6 @@
+require_relative "test_stack"
+require_relative "test_control"
+require_relative "test_logic"
+require_relative "test_move"
+require_relative "test_memory"
+require_relative "test_compare"

test/arm/test_compare.rb

@@ -0,0 +1,22 @@
+require_relative 'arm-helper'
+
+class TestArmAsm < MiniTest::Test
+  include ArmHelper
+
+  def test_cmn
+    code = @machine.cmn	 :r1 , :r2
+    assert_code code , :cmn , [0x02,0x00,0x71,0xe1] #e1 71 00 02
+  end
+  def test_cmp
+    code = @machine.cmp	 :r1 , :r2
+    assert_code code , :cmp , [0x02,0x00,0x51,0xe1] #e1 51 00 02
+  end
+  def test_teq
+    code = @machine.teq  :r1 , :r2
+    assert_code code , :teq , [0x02,0x00,0x31,0xe1] #e1 31 00 02
+  end
+  def test_tst
+    code = @machine.tst  :r1 , :r2 
+    assert_code code , :tst , [0x02,0x00,0x11,0xe1] #e1 11 00 02
+  end
+end

test/arm/test_control.rb

@@ -0,0 +1,21 @@
+require_relative 'arm-helper'
+
+class TestControl < MiniTest::Test
+  include ArmHelper
+
+  def test_b
+    # the address is what an assembler calculates (a signed number for the amount of instructions), 
+    # ie the relative (to pc) address -8 (pipeline) /4 so save space
+    # so the cpu adds the value*4 and starts loading that (load, decode, execute)
+    code = @machine.b	 -4  #this jumps to the next instruction
+    assert_code code , :b , [0xff,0xff,0xff,0xea] #ea ff ff fe
+  end
+  def test_call #see comment above. bx not implemented (as it means into thumb, and no thumb here)
+    code = @machine.call	 -4 ,{} #this jumps to the next instruction
+    assert_code code , :call, [0xff,0xff,0xff,0xeb] #ea ff ff fe
+  end
+  def test_swi
+    code = @machine.swi	 0x05 
+    assert_code code , :swi , [0x05,0x00,0x00,0xef]#ef 00 00 05
+  end
+end

test/arm/test_logic.rb

@@ -0,0 +1,54 @@
+require_relative 'arm-helper'
+
+class TestLogic < MiniTest::Test
+  include ArmHelper
+
+  def test_adc
+    code = @machine.adc	 :r1,  :r3, :r5
+    assert_code code , :adc , [0x05,0x10,0xa3,0xe0] #e0 a3 10 05
+  end
+  def test_add
+    code = @machine.add	 :r1 , :r1, :r3
+    assert_code code , :add , [0x03,0x10,0x81,0xe0] #e0 81 10 03
+  end
+  def test_add_lst
+    code = @machine.add( :r1 , :r2 , :r3 ,  shift_lsr: 8)
+    assert_code code , :add , [0x23,0x14,0x82,0xe0] #e0 82 14 23
+  end
+  def test_and # inst eval doesn't really work with and
+    code = @machine.and(  :r1 , :r2 , :r3)
+    assert_code code , :and , [0x03,0x10,0x02,0xe0] #e0 01 10 03
+  end
+  def test_bic
+    code = @machine.bic	 :r2 , :r2 , :r3
+    assert_code code , :bic , [0x03,0x20,0xc2,0xe1] #e3 c2 20 44
+  end
+  def test_eor
+    code = @machine.eor	 :r2 , :r2 , :r3
+    assert_code code , :eor , [0x03,0x20,0x22,0xe0] #e0 22 20 03
+  end
+  def test_rsb
+    code = @machine.rsb	 :r1 ,  :r2 ,  :r3
+    assert_code code , :rsb , [0x03,0x10,0x62,0xe0]#e0 62 10 03
+  end
+  def test_rsc
+    code = @machine.rsc	 :r2 ,  :r3 ,  :r4
+    assert_code code , :rsc , [0x04,0x20,0xe3,0xe0]#e0 e3 20 04
+  end
+  def test_sbc
+    code = @machine.sbc	 :r3,  :r4 ,  :r5
+    assert_code code , :sbc , [0x05,0x30,0xc4,0xe0]#e0 c4 30 05
+  end
+  def test_sub
+    code = @machine.sub  :r2, :r0, 1
+    assert_code code, :sub ,  [0x01,0x20,0x40,0xe2] #e2 40 20 01 
+  end
+  def test_subs
+    code = @machine.sub  :r2, :r2, 1 , update_status: 1
+    assert_code code, :sub ,  [0x01,0x20,0x52,0xe2] #e2 52 20 01
+  end
+  def test_orr
+    code = @machine.orr	 :r2 , :r2 , :r3
+    assert_code code , :orr , [0x03,0x20,0x82,0xe1] #e1 82 20 03
+  end
+end

test/arm/test_memory.rb

@@ -0,0 +1,37 @@
+require_relative 'arm-helper'
+
+class TestMemory < MiniTest::Test
+  include ArmHelper
+
+  def test_ldr
+    code = @machine.ldr  :r0, :r0
+    assert_code code, :ldr ,  [0x00,0x00,0x90,0xe5] #e5 90 00 00
+  end
+  def test_ldr_const_offset
+    code = @machine.ldr  :r0, :r0 ,  4
+    assert_code code, :ldr ,  [0x04,0x00,0x90,0xe5] #e5 90 00 04
+  end
+  def test_ldr_reg_offset
+    code = @machine.ldr  :r0, :r1 , :r2
+    assert_code code, :ldr ,  [0x02,0x00,0x91,0xe6] #e6 91 00 02
+  end  
+  def test_ldrb
+    code = @machine.ldrb  :r0, :r0
+    assert_code code, :ldrb ,  [0x00,0x00,0xd0,0xe5] #e5 d0 00 00
+  end
+
+  def test_str
+    code = @machine.str  :r0, :r1
+    assert_code code, :str ,  [0x00,0x00,0x81,0xe5] #e5 81 00 00
+  end
+
+  def test_strb_add
+    code = @machine.strb  :r0, :r1 , 1 , flaggie: 1
+    assert_code code, :strb ,  [0x01,0x00,0xc1,0xe4] #e4 c1 00 01
+  end
+
+  def test_strb
+    code = @machine.strb  :r0, :r0
+    assert_code code, :strb ,  [0x00,0x00,0xc0,0xe5] #e5 c0 00 00
+  end
+end

test/arm/test_move.rb

@@ -0,0 +1,14 @@
+require_relative 'arm-helper'
+
+class TestMoves < MiniTest::Test
+  include ArmHelper
+
+  def test_mov
+    code = @machine.mov  :r0,  5
+    assert_code code , :mov , [0x05,0x00,0xa0,0xe3] #e3 a0 10 05
+  end
+  def test_mvn
+    code = @machine.mvn  :r1,  5
+    assert_code code , :mvn , [0x05,0x10,0xe0,0xe3] #e3 e0 10 05
+  end
+end

test/arm/test_stack.rb

@@ -0,0 +1,31 @@
+require_relative 'arm-helper'
+
+class TestStack < MiniTest::Test
+  include ArmHelper
+
+  def test_push
+    code = @machine.push [:lr] 
+    assert_code code , :push ,  [0x00,0x40,0x2d,0xe9] #e9 2d 40 00
+  end
+  def test_push_three
+    code = @machine.push [:r0,:r1,:lr] 
+    assert_code code , :push ,  [0x03,0x40,0x2d,0xe9] #e9 2d 40 03
+  end
+  def test_push_no_link
+    code = @machine.push [:r0,:r1,:r2 ,:r3,:r4,:r5] 
+    assert_code code , :push ,  [0x3f,0x00,0x2d,0xe9] #e9 2d 00 3f
+  end
+  def test_pop
+    code = @machine.pop [:pc] 
+    assert_code code , :pop , [0x00,0x80,0xbd,0xe8] #e8 bd 80 00
+  end
+  def test_pop_three
+    code = @machine.pop [:r0,:r1,:pc] 
+    assert_code code , :pop , [0x03,0x80,0xbd,0xe8] #e8 bd 80 03
+  end
+  def test_pop_no_pc
+    code = @machine.pop [:r0,:r1,:r2 ,:r3,:r4,:r5] 
+    assert_code code , :pop , [0x3f,0x00,0xbd,0xe8] #e8 bd 00 3f
+  end
+  
+end