removes ArgNode which just served to make long names (unused)

This commit is contained in:
Torsten Ruger 2014-04-21 17:35:38 +03:00
parent fc3f5d5402
commit c87967c95d
7 changed files with 28 additions and 31 deletions

View File

@ -33,12 +33,12 @@ class Asm::Arm::CodeGenerator
args.each { |arg|
if (arg.is_a?(Array))
if (arg[0] == :reg)
node.args << Asm::RegisterArgNode.new(arg[1])
node.args << Asm::RegisterNode.new(arg[1])
end
elsif (arg.is_a?(Integer))
node.args << Asm::NumLiteralArgNode.new(arg)
node.args << Asm::NumLiteralNode.new(arg)
elsif (arg.is_a?(Symbol))
node.args << Asm::LabelRefArgNode.new(arg.to_s)
node.args << Asm::LabelRefNode.new(arg.to_s)
elsif (arg.is_a?(Asm::Arm::GeneratorLabel) or arg.is_a?(Asm::Arm::GeneratorExternLabel))
node.args << arg
else

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@ -126,14 +126,14 @@ module Asm
builder.write io, as
when :b, :bl
arg = args[0]
if (arg.is_a?(Asm::NumLiteralArgNode))
if (arg.is_a?(Asm::NumLiteralNode))
jmp_val = arg.value >> 2
packed = [jmp_val].pack('l')
# signed 32-bit, condense to 24-bit
# TODO add check that the value fits into 24 bits
io << packed[0,3]
elsif (arg.is_a?(Asm::LabelObject) or arg.is_a?(Asm::LabelRefArgNode))
arg = @ast_asm.object_for_label(arg.label, self) if arg.is_a?(Asm::LabelRefArgNode)
elsif (arg.is_a?(Asm::LabelObject) or arg.is_a?(Asm::LabelRefNode))
arg = @ast_asm.object_for_label(arg.label, self) if arg.is_a?(Asm::LabelRefNode)
as.add_relocation(io.tell, arg, Asm::Arm::R_ARM_PC24, RelocHandler)
#write 0 "for now" and let relocation happen
io << "\x00\x00\x00"
@ -147,7 +147,7 @@ module Asm
(COND_BITS[@cond] << 16+4+8)
when :swi
arg = args[0]
if (arg.is_a?(Asm::NumLiteralArgNode))
if (arg.is_a?(Asm::NumLiteralNode))
packed = [arg.value].pack('L')[0,3]
io << packed
io.write_uint8 0b1111 | (COND_BITS[@cond] << 4)

View File

@ -2,7 +2,7 @@ module Asm
module Arm
module InstructionTools
def reg_ref(arg)
if (not arg.is_a?(Asm::RegisterArgNode))
if (not arg.is_a?(Asm::RegisterNode))
raise Asm::AssemblyError.new('argument must be a register', arg)
end

View File

@ -33,10 +33,10 @@ module Asm
@pre_post_index = 0
@w = 0
@operand = 0
if (arg.is_a?(Asm::RegisterArgNode))
if (arg.is_a?(Asm::RegisterNode))
@rn = reg_ref(arg)
if (false ) #argr.op and argr.right.is_a?(Asm::NumLiteralArgNode))
if (false ) #argr.op and argr.right.is_a?(Asm::NumLiteralNode))
# this if was buggy even before
# but as mentioned here we'd have to implement the options
@ -55,7 +55,7 @@ module Asm
else
# raise Asm::AssemblyError.new(Asm::ERRSTR_INVALID_ARG, arg)
end
elsif (arg.is_a?(Asm::LabelRefArgNode) or arg.is_a?(Asm::NumLiteralArgNode))
elsif (arg.is_a?(Asm::LabelRefNode) or arg.is_a?(Asm::NumLiteralNode))
@pre_post_index = 1
@rn = 15 # pc
@use_addrtable_reloc = true
@ -78,10 +78,10 @@ module Asm
(inst_class << 12+4+4+1+1+1+1+1+1) | (cond << 12+4+4+1+1+1+1+1+1+2)
if (@use_addrtable_reloc)
# closest_addrtable = Asm::Arm.closest_addrtable(as)
if (@addrtable_reloc_target.is_a?(Asm::LabelRefArgNode))
if (@addrtable_reloc_target.is_a?(Asm::LabelRefNode))
obj = ast_asm.object_for_label(@addrtable_reloc_target.label, inst)
ref_label = closest_addrtable.add_label(obj)
elsif (@addrtable_reloc_target.is_a?(Asm::NumLiteralArgNode))
elsif (@addrtable_reloc_target.is_a?(Asm::NumLiteralNode))
ref_label = closest_addrtable.add_const(@addrtable_reloc_target.value)
end
as.add_relocation io.tell, ref_label, Asm::Arm::R_ARM_PC12,

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@ -45,7 +45,7 @@ module Asm
# Build representation for source value
def build_operand(arg)
if (arg.is_a?(Asm::NumLiteralArgNode))
if (arg.is_a?(Asm::NumLiteralNode))
if (arg.value.fits_u8?)
# no shifting needed
@operand = arg.value
@ -56,7 +56,7 @@ module Asm
else
raise Asm::AssemblyError.new(Asm::ERRSTR_NUMERIC_TOO_LARGE, arg)
end
elsif (arg.is_a?(Asm::RegisterArgNode))
elsif (arg.is_a?(Asm::RegisterNode))
@operand = reg_ref(arg)
@i = 0
elsif (arg.is_a?(Asm::ShiftNode))
@ -70,12 +70,12 @@ module Asm
end
arg1 = arg.value
if (arg1.is_a?(Asm::NumLiteralArgNode))
if (arg1.is_a?(Asm::NumLiteralNode))
if (arg1.value >= 32)
raise Asm::AssemblyError.new('cannot shift by more than 31', arg1)
end
shift_imm = arg1.value
elsif (arg1.is_a?(Asm::RegisterArgNode))
elsif (arg1.is_a?(Asm::RegisterNode))
shift_op |= 0x1;
shift_imm = reg_ref(arg1) << 1
elsif (arg.type == 'rrx')

View File

@ -7,9 +7,6 @@ module Asm
attr_accessor :opcode, :args
end
class ArgNode < Node
end
class ShiftNode < Node
attr_accessor :type, :value, :argument
end
@ -20,7 +17,7 @@ module Asm
alias_method :argument=, :left=
end
class RegisterArgNode < ArgNode
class RegisterNode < Node
attr_accessor :name
def initialize name
@name = name
@ -29,21 +26,21 @@ module Asm
#maybe not used at all as code_gen::instruction raises if used.
# instead now using Arrays
class RegisterListArgNode < ArgNode
class RegisterListNode < Node
attr_accessor :registers
def initialize regs
@registers = regs.collect{ |sym , reg| (sym == :reg) ? reg : "not a reg #{sym} , #{reg}" }
end
end
class NumLiteralArgNode < ArgNode
class NumLiteralNode < Node
attr_accessor :value
def initialize val
@value = val
end
end
class LabelRefArgNode < ArgNode
class LabelRefNode < Node
attr_accessor :label, :label_object
def initialize label , object = nil
@label = label

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@ -1,8 +1,8 @@
require_relative 'str_scanner'
require_relative 'nodes'
class NumEquivAddrArgNode < NumLiteralArgNode
class NumEquivAddrNode < NumLiteralNode
end
class LabelEquivAddrArgNode < LabelRefArgNode
class LabelEquivAddrNode < LabelRefNode
end
class ToplevelNode < Node
attr_accessor :children
@ -154,7 +154,7 @@ module Asm
))
def parse_register(s)
if (m = s.scan_str(REGISTER_REGEXP))
RegisterArgNode.new(s) { |n|
RegisterNode.new(s) { |n|
n.name = m
}
end
@ -162,7 +162,7 @@ module Asm
def parse_register_list(s)
if (m = s.scan(/\{/))
node = RegisterListArgNode.new(s) do |n|
node = RegisterListNode.new(s) do |n|
n.registers = []
end
loop do
@ -185,7 +185,7 @@ module Asm
def parse_num_literal(s)
if (m = s.scan(/(=?)#(-?(?:0x)?[0-9A-Fa-f]+)/))
(m[0] == '=' ? NumEquivAddrArgNode : NumLiteralArgNode).new(s) { |n|
(m[0] == '=' ? NumEquivAddrNode : NumLiteralNode).new(s) { |n|
n.value = Integer(m[1])
}
end
@ -193,7 +193,7 @@ module Asm
def parse_label_ref(s)
if (m = s.scan(/(=?)(\/*\w+)/))
(m[0] == '=' ? LabelEquivAddrArgNode : LabelRefArgNode).new(s) { |n|
(m[0] == '=' ? LabelEquivAddrNode : LabelRefNode).new(s) { |n|
n.label = m[1]
}
end
@ -203,7 +203,7 @@ module Asm
if (m = s.scan(/\[/))
arg = parse_arg(s)
if (arg and s.scan(/\]/))
ReferenceArgNode.new(s) do |n|
ReferenceNode.new(s) do |n|
n.argument = arg
end
end