diff --git a/lib/arm/attributed.rb b/lib/arm/attributed.rb
index 9a7dfa8e..09cba099 100644
--- a/lib/arm/attributed.rb
+++ b/lib/arm/attributed.rb
@@ -23,6 +23,14 @@ module Arm
       val << by
     end
 
+    def condition_code
+      shift(cond_bit_code , 28 )
+    end
+
+    def instruction_code
+      shift(instuction_class ,   26)
+    end
+
     def byte_length
       4
     end
diff --git a/lib/arm/instructions/logic_instruction.rb b/lib/arm/instructions/logic_instruction.rb
index ac401d9a..21bd4203 100644
--- a/lib/arm/instructions/logic_instruction.rb
+++ b/lib/arm/instructions/logic_instruction.rb
@@ -46,8 +46,8 @@ module Arm
       val |= shift(@attributes[:update_status] , 12 + 4 + 4)#20
       val |= shift(op_bit_code ,       12 + 4 + 4  + 1)
       val |= shift(immediate ,         12 + 4 + 4  + 1 + 4)
-      val |= shift(instuction_class ,  12 + 4 + 4  + 1 + 4 + 1)
-      val |= shift(cond_bit_code ,     12 + 4 + 4  + 1 + 4 + 1 + 2)
+      val |= instruction_code
+      val |= condition_code
       io.write_uint32 val
       assemble_extra
     end
diff --git a/lib/arm/instructions/memory_instruction.rb b/lib/arm/instructions/memory_instruction.rb
index f6628942..64765492 100644
--- a/lib/arm/instructions/memory_instruction.rb
+++ b/lib/arm/instructions/memory_instruction.rb
@@ -55,7 +55,6 @@ module Arm
       #not sure about these 2 constants. They produce the correct output for str r0 , r1
       # but i can't help thinking that that is because they are not used in that instruction and
       # so it doesn't matter. Will see
-      instuction_class =  0b01 # OPC_MEMORY_ACCESS
       if (operand.is_a?(Symbol) or operand.is_a?(::Register::RegisterValue))
         val = reg_code(operand)
         @pre_post_index = 0
@@ -79,11 +78,14 @@ module Arm
       val |= shift(add_offset ,     12 + 4  + 4 + 1 + 1 + 1)
       val |= shift(@pre_post_index, 12 + 4  + 4 + 1 + 1 + 1 + 1)#24
       val |= shift(i ,              12 + 4  + 4 + 1 + 1 + 1 + 1  + 1)
-      val |= shift(instuction_class,12 + 4  + 4 + 1 + 1 + 1 + 1  + 1 + 1)
-      val |= shift(cond_bit_code ,  12 + 4  + 4 + 1 + 1 + 1 + 1  + 1 + 1 + 2)
+      val |= instruction_code
+      val |= condition_code
       io.write_uint32 val
     end
 
+    def instuction_class
+      0b01 # OPC_MEMORY_ACCESS
+    end
     def add_offset
       @attributes[:add_offset] ? 0 : 1
     end
diff --git a/lib/arm/instructions/move_instruction.rb b/lib/arm/instructions/move_instruction.rb
index 127f4d55..1cfd1aed 100644
--- a/lib/arm/instructions/move_instruction.rb
+++ b/lib/arm/instructions/move_instruction.rb
@@ -36,7 +36,7 @@ module Arm
     # don't overwrite instance variables, to make assembly repeatable
     def assemble(io)
       rn , operand , right , immediate = @rn ,  @operand ,  @from , 1
-      
+
       case right
       when Numeric
         operand = numeric_operand(right)
@@ -54,8 +54,8 @@ module Arm
       val |= shift(@attributes[:update_status] , 12 + 4 + 4)#20
       val |= shift(op_bit_code ,        12 + 4 + 4  + 1)
       val |= shift(immediate ,          12 + 4 + 4  + 1 + 4)
-      val |= shift(instuction_class ,   12 + 4 + 4  + 1 + 4 + 1)
-      val |= shift(cond_bit_code ,      12 + 4 + 4  + 1 + 4 + 1 + 2)
+      val |= instruction_code
+      val |= condition_code
       io.write_uint32 val
       # by now we have the extra add so assemble that
       @extra.assemble(io) if(@extra) #puts "Assemble extra at #{val.to_s(16)}"
diff --git a/lib/arm/instructions/stack_instruction.rb b/lib/arm/instructions/stack_instruction.rb
index 29c062c3..1771dbaf 100644
--- a/lib/arm/instructions/stack_instruction.rb
+++ b/lib/arm/instructions/stack_instruction.rb
@@ -30,7 +30,7 @@ module Arm
       val = val | (@attributes[:update_status] <<  16 + 4 + 1 + 1)
       val = val | (up_down <<             16 + 4 + 1 + 1 + 1)
       val = val | (pre_post_index <<      16 + 4 + 1 + 1 + 1 + 1)#24
-      val = val | (instuction_class <<    16 + 4 + 1 + 1 + 1 + 1 + 2)
+      val = val | instruction_code
       val = val | (cond <<                16 + 4 + 1 + 1 + 1 + 1 + 2 + 2)
       io.write_uint32 val
     end