parent
047a36178f
commit
b294208025
@ -40,32 +40,31 @@ module Mom
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def to_risc(compiler)
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#puts "RISC #{self}"
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const = @right.to_register(compiler , original_source)
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const_reg = @right.to_register(compiler , original_source)
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left_slots = @left.slots
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case @left.known_object
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when Symbol
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sym_to_risc(compiler , const)
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sym_to_risc(compiler , const_reg)
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when Parfait::CacheEntry
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left = compiler.use_reg( :CacheEntry )
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const << Risc.load_constant(original_source, @left.known_object , left)
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const << Risc.reg_to_slot(original_source, const.register , left, left_slots.first)
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compiler.add_code Risc.load_constant(original_source, @left.known_object , left)
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compiler.add_code Risc.reg_to_slot(original_source, const.register , left, left_slots.first)
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else
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raise "We have left #{@left.known_object}"
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end
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compiler.reset_regs
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return const
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end
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def sym_to_risc(compiler , const)
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def sym_to_risc(compiler , const_reg)
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left_slots = @left.slots.dup
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raise "Not Message #{object}" unless @left.known_object == :message
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left = Risc.message_reg
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slot = left_slots.shift
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while( !left_slots.empty? )
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left = left.resolve_and_add( slot , const , compiler)
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left = left.resolve_and_add( slot , compiler)
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slot = left_slots.shift
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end
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const << Risc.reg_to_slot(original_source, const.register , left, slot)
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compiler.add_code Risc.reg_to_slot(original_source, const_reg , left, slot)
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end
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end
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@ -5,34 +5,35 @@ module Mom
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def setup
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Parfait.boot!
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@load = SlotLoad.new( [:message, :caller] , [:message,:type] )
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load = SlotLoad.new( [:message, :caller] , [:message,:type] )
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@compiler = Risc::FakeCompiler.new
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@instruction = @load.to_risc(@compiler)
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load.to_risc(@compiler)
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@instructions = @compiler.instructions
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end
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def test_ins_class
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assert_equal Risc::SlotToReg , @instruction.class
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assert_equal Risc::SlotToReg , @instructions[0].class
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end
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def test_ins_next_class
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assert_equal Risc::RegToSlot , @instruction.next.class
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assert_equal Risc::RegToSlot , @instructions[1].class
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end
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def test_ins_arr
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assert_equal :r0 , @instruction.array.symbol
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assert_equal :r0 , @instructions[0].array.symbol
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end
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def test_ins_reg
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assert_equal :r1 , @instruction.register.symbol
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assert_equal :r1 , @instructions[0].register.symbol
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end
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def test_ins_index
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assert_equal 0 , @instruction.index
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assert_equal 0 , @instructions[0].index
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end
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def test_ins_next_reg
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assert_equal :r1 , @instruction.next.register.symbol
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assert_equal :r1 , @instructions[1].register.symbol
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end
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def test_ins_next_arr
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assert_equal :r0 , @instruction.next.array.symbol
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assert_equal :r0 , @instructions[1].array.symbol
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end
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def test_ins_next_index
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assert_equal 6 , @instruction.next.index
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assert_equal 6 , @instructions[1].index
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end
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end
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end
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@ -5,47 +5,48 @@ module Mom
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def setup
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Parfait.boot!
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@load = SlotLoad.new( [:message, :caller, :type] , [:message, :caller , :type] )
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@compiler = Risc::FakeCompiler.new
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@instruction = @load.to_risc(@compiler)
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load = SlotLoad.new( [:message, :caller, :type] , [:message, :caller , :type] )
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load.to_risc(@compiler)
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@instructions = @compiler.instructions
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end
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def test_ins_next_class
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assert_equal Risc::SlotToReg , @instruction.next(1).class
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assert_equal Risc::SlotToReg , @instruction.next(2).class
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assert_equal Risc::SlotToReg , @instructions[1].class
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assert_equal Risc::SlotToReg , @instructions[2].class
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end
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def test_ins_next_next_class
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assert_equal Risc::RegToSlot , @instruction.next(3).class
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assert_equal Risc::RegToSlot , @instructions[3].class
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end
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def test_ins_next_reg
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assert_equal :r1 , @instruction.next.register.symbol
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assert_equal :r1 , @instructions[1].register.symbol
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end
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def test_ins_next_arr
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assert_equal :r1 , @instruction.next.array.symbol
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assert_equal :r1 , @instructions[1].array.symbol
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end
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def test_ins_next_index
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assert_equal 0 , @instruction.next.index
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assert_equal 0 , @instructions[1].index
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end
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def test_ins_next_2_reg
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assert_equal :r1 , @instruction.next(2).register.symbol
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assert_equal :r1 , @instructions[2].register.symbol
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end
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def test_ins_next_2_arr
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assert_equal :r0 , @instruction.next(2).array.symbol
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assert_equal :r0 , @instructions[2].array.symbol
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end
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def test_ins_next_2_index
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assert_equal 6 , @instruction.next(2).index
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assert_equal 6 , @instructions[2].index
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end
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def test_ins_next_3_reg
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assert_equal :r1 , @instruction.next(3).register.symbol
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assert_equal :r1 , @instructions[3].register.symbol
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end
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def test_ins_next_3_arr
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assert_equal :r1 , @instruction.next(3).array.symbol
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assert_equal :r1 , @instructions[3].array.symbol
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end
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def test_ins_next_3_index
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assert_equal 0 , @instruction.next(3).index
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assert_equal 0 , @instructions[3].index
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end
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end
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end
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@ -1,5 +1,15 @@
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module Risc
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class FakeCompiler
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attr_reader :instructions
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def initialize
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@instructions = []
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end
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def add_code(c)
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@instructions << c
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end
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def current
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@instructions.last
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end
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def slot_type(slot,type)
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type.type_for(slot)
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end
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