rename unit and sint to human readable forms

This commit is contained in:
Torsten Ruger
2016-12-31 18:45:22 +02:00
parent 5f3744d6af
commit b094bcc64f
10 changed files with 66 additions and 66 deletions

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@ -67,7 +67,7 @@ module Arm
# signed 32-bit, condense to 24-bit
# TODO add check that the value fits into 24 bits
io << packed[0,3]
io.write_uint8 op_bit_code | (COND_CODES[@attributes[:condition_code]] << 4)
io.write_unsigned_int_8 op_bit_code | (COND_CODES[@attributes[:condition_code]] << 4)
end
def handle_swi(io)
@ -75,7 +75,7 @@ module Arm
raise "expected literal not #{arg} #{inspect}" unless (arg.is_a?(Numeric))
packed = [arg].pack('L')[0,3]
io << packed
io.write_uint8 0b1111 | (COND_CODES[@attributes[:condition_code]] << 4)
io.write_unsigned_int_8 0b1111 | (COND_CODES[@attributes[:condition_code]] << 4)
end
def to_s

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@ -43,7 +43,7 @@ module Arm
val |= shift(immediate , 12 + 4 + 4 + 1 + 4)
val |= instruction_code
val |= condition_code
io.write_uint32 val
io.write_unsigned_int_32 val
end
def instuction_class

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@ -48,7 +48,7 @@ module Arm
val |= shift(immediate , 12 + 4 + 4 + 1 + 4)
val |= instruction_code
val |= condition_code
io.write_uint32 val
io.write_unsigned_int_32 val
assemble_extra(io)
end

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@ -62,7 +62,7 @@ module Arm
val |= shift(1, 24) #pre_post index , not used
val |= instruction_code
val |= condition_code
io.write_uint32 val
io.write_unsigned_int_32 val
end
def get_operand
return @operand unless @right

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@ -56,7 +56,7 @@ module Arm
val |= shift(immediate , 12 + 4 + 4 + 1 + 4)
val |= instruction_code
val |= condition_code
io.write_uint32 val
io.write_unsigned_int_32 val
# by now we have the extra add so assemble that
@extra.assemble(io) if(@extra) #puts "Assemble extra at #{val.to_s(16)}"
end

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@ -32,7 +32,7 @@ module Arm
val = val | (pre_post_index << 16 + 4 + 1 + 1 + 1 + 1)#24
val = val | instruction_code
val = val | (cond << 16 + 4 + 1 + 1 + 1 + 1 + 2 + 2)
io.write_uint32 val
io.write_unsigned_int_32 val
end
def cond