rename register to risc

seems to fit the layer much better as we really have a very reduced
instruction set
This commit is contained in:
Torsten Ruger
2017-01-19 09:02:29 +02:00
parent da5823a1a0
commit aa79e41d1c
127 changed files with 348 additions and 346 deletions

View File

@ -0,0 +1,23 @@
require_relative "../helper"
require "risc/interpreter"
module Risc
module Ticker
include AST::Sexp
include InterpreterHelpers
def setup
Risc.machine.boot
do_clean_compile
Vm.compile_ast( @input )
Collector.collect_space
@interpreter = Interpreter.new
@interpreter.start Risc.machine.init
end
# must be after boot, but before main compile, to define method
def do_clean_compile
end
end
end