rename register to risc

seems to fit the layer much better as we really have a very reduced
instruction set

lib/vm/method_compiler/assignment.rb

@@ -42,7 +42,7 @@ module Vm
     def assignment_value(statement)
       reset_regs # statements reset registers, ie have all at their disposal
       value = process(statement.value)
-      raise "Not register #{v}" unless value.is_a?(Register::RegisterValue)
+      raise "Not register #{v}" unless value.is_a?(Risc::RiscValue)
       value
     end
     # ensure the name given is not space and raise exception otherwise

lib/vm/method_compiler/basic_values.rb

@@ -5,7 +5,7 @@ module Vm
 
     # Constant expressions can by definition be evaluated at compile time.
     # But that does not solve their storage, ie they need to be accessible at runtime from _somewhere_
-    # So expressions move the data into a Register.
+    # So expressions move the data into a Risc.
     # All expressions return registers
 
     # But in the future (in the one that holds great things) we optimize those unneccesay moves away
@@ -38,7 +38,7 @@ module Vm
     def on_StringExpression expression
       value = Parfait.new_word expression.value.to_sym
       reg = use_reg :Word
-      Register.machine.constants << value
+      Risc.machine.constants << value
       add_load_constant( expression, value , reg )
       return reg
     end

lib/vm/method_compiler/call_site.rb

@@ -19,7 +19,7 @@ module Vm
       set_arguments(method , statement.arguments)
       ret = use_reg( :Object ) #FIXME real return type
 
-      Register.issue_call( self , method )
+      Risc.issue_call( self , method )
 
       # the effect of the method is that the NewMessage Return slot will be filled, return it
       # but move it into a register too
@@ -30,7 +30,7 @@ module Vm
     private
 
     def load_new_message(statement)
-      new_message = Register.resolve_to_register(:new_message)
+      new_message = Risc.resolve_to_register(:new_message)
       add_slot_to_reg(statement, :message , :next_message , new_message )
       new_message
     end
@@ -87,7 +87,7 @@ module Vm
       reset_regs
       i = i + 1             # disregarding type field
       val = process( arg)   # processing should return the register with the value
-      raise "Not register #{val}" unless val.is_a?(Register::RegisterValue)
+      raise "Not register #{val}" unless val.is_a?(Risc::RiscValue)
       #FIXME definately needs some tests
       raise "TypeMismatch calling with #{val.type} , instead of #{arg_type.type_at(i)}" if val.type != arg_type.type_at(i)
       list_reg = use_reg(:NamedList , arguments )

lib/vm/method_compiler/if_statement.rb

@@ -20,8 +20,8 @@ module Vm
     def compile_if_condition( statement )
       reset_regs
       process(statement.condition)
-      branch_class = Object.const_get "Register::Is#{statement.branch_type.capitalize}"
-      true_block = Register.label(statement, "if_true")
+      branch_class = Object.const_get "Risc::Is#{statement.branch_type.capitalize}"
+      true_block = Risc.label(statement, "if_true")
       add_code branch_class.new( statement.condition , true_block )
       return true_block
     end
@@ -33,8 +33,8 @@ module Vm
     def compile_if_false( statement )
       reset_regs
       process(statement.if_false) if statement.if_false.statements
-      merge = Register.label(statement , "if_merge")
-      add_code Register::Branch.new(statement.if_false, merge )
+      merge = Risc.label(statement , "if_merge")
+      add_code Risc::Branch.new(statement.if_false, merge )
       merge
     end
   end

lib/vm/method_compiler/name_expression.rb

@@ -51,7 +51,7 @@ module Vm
 
       def load_special_message(statement)
         reg = use_reg :Message
-        add_transfer( "#{statement} load message", Register.message_reg , reg )
+        add_transfer( "#{statement} load message", Risc.message_reg , reg )
         return reg
       end
   end #module

lib/vm/method_compiler/operator_expression.rb

@@ -6,9 +6,9 @@ module Vm
       # left and right must be expressions. Expressions return a register when compiled
       left_reg = process(statement.left_expression)
       right_reg = process(statement.right_expression)
-      raise "Not register #{left_reg}" unless left_reg.is_a?(Register::RegisterValue)
-      raise "Not register #{right_reg}" unless right_reg.is_a?(Register::RegisterValue)
-      add_code Register::OperatorInstruction.new(statement,statement.operator,left_reg,right_reg)
+      raise "Not register #{left_reg}" unless left_reg.is_a?(Risc::RiscValue)
+      raise "Not register #{right_reg}" unless right_reg.is_a?(Risc::RiscValue)
+      add_code Risc::OperatorInstruction.new(statement,statement.operator,left_reg,right_reg)
       return left_reg # though this has wrong value attached
     end
   end

lib/vm/method_compiler/while_statement.rb

@@ -13,7 +13,7 @@ module Vm
 
       compile_while_condition( statement )
 
-      branch_class = Object.const_get "Register::Is#{statement.branch_type.capitalize}"
+      branch_class = Object.const_get "Risc::Is#{statement.branch_type.capitalize}"
       # this is where the while ends and both branches meet
       add_code branch_class.new( statement.condition , start )
 
@@ -22,13 +22,13 @@ module Vm
     private
 
     def compile_while_preamble( statement )
-      condition_label = Register.label(statement.condition , "condition_label")
+      condition_label = Risc.label(statement.condition , "condition_label")
       # unconditionally branch to the condition upon entering the loop
-      add_code Register::Branch.new(statement.condition , condition_label)
+      add_code Risc::Branch.new(statement.condition , condition_label)
       condition_label
     end
     def compile_while_body( statement )
-      start = Register.label(statement , "while_start" )
+      start = Risc.label(statement , "while_start" )
       add_code start
       reset_regs
       process(statement.statements)