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rename register to risc

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seems to fit the layer much better as we really have a very reduced
instruction set
This commit is contained in:
Torsten Ruger
2017-01-19 09:02:29 +02:00
parent da5823a1a0
commit aa79e41d1c
127 changed files with 348 additions and 346 deletions
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8
lib/arm/arm_machine.rb
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@ -55,7 +55,7 @@ module Arm
def self.class_for clazz
my_module = self.class.name.split("::").first
clazz_name = clazz.name.split("::").last
if(my_module != Register )
if(my_module != Risc )
module_class = eval("#{my_module}::#{clazz_name}") rescue nil
clazz = module_class if module_class
end
@ -63,11 +63,11 @@ module Arm
end
#defining the instruction (opcode, symbol) as an given class.
# the class is a Register::Instruction derived base class and to create machine specific function
# the class is a Risc::Instruction derived base class and to create machine specific function
# an actual machine must create derived classes (from this base class)
# These instruction classes must follow a naming pattern and take a hash in the contructor
# Example, a mov() opcode instantiates a Register::MoveInstruction
# for an Arm machine, a class Arm::MoveInstruction < Register::MoveInstruction exists, and it
# Example, a mov() opcode instantiates a Risc::MoveInstruction
# for an Arm machine, a class Arm::MoveInstruction < Risc::MoveInstruction exists, and it
# will be used to define the mov on an arm machine.
# This methods picks up that derived class and calls a define_instruction methods that can
# be overriden in subclasses

6
lib/arm/constants.rb
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@ -56,11 +56,11 @@ module Arm
def reg r_name
code = reg_code r_name
raise "no such register #{r_name}" unless code
Arm::Register.new(r_name.to_sym , code )
Arm::Risc.new(r_name.to_sym , code )
end
def reg_code r_name
raise "double r #{r_name}" if( :rr1 == r_name)
if r_name.is_a? ::Register::RegisterValue
if r_name.is_a? ::Risc::RiscValue
r_name = r_name.symbol
end
if r_name.is_a? Fixnum
@ -93,7 +93,7 @@ module Arm
end
end
Register::RegisterValue.class_eval do
Risc::RiscValue.class_eval do
def reg_no
@symbol.to_s[1 .. -1].to_i
end

6
lib/arm/instructions/call_instruction.rb
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@ -8,8 +8,8 @@ module Arm
# swi (SoftWareInterrupt) or system call is how we call the kernel.
# in Arm the register layout is different and so we have to place the syscall code into register 7
# Registers 0-6 hold the call values as for a normal c call
class CallInstruction < Register::Branch
# Riscs 0-6 hold the call values as for a normal c call
class CallInstruction < Risc::Branch
include Constants
include Attributed
@ -44,7 +44,7 @@ module Arm
def handle_call(io)
case @first
when Register::Label
when Risc::Label
# relative addressing for jumps/calls
# but because of the arm "theoretical" 3- stage pipeline,
# we have to subtract 2 words (fetch/decode)

12
lib/arm/instructions/compare_instruction.rb
View File

@ -1,5 +1,5 @@
module Arm
class CompareInstruction < Register::Instruction
class CompareInstruction < Risc::Instruction
include Constants
include Attributed
@ -20,19 +20,19 @@ module Arm
rn , operand , immediate= @rn , @operand , 1
arg = @right
operand = Register::RegisterValue.new( arg , :Integer) if( arg.is_a? Symbol )
operand = Risc::RiscValue.new( arg , :Integer) if( arg.is_a? Symbol )
case operand
when Numeric
operand = arg
raise "numeric literal operand to large #{arg.inspect}" unless (arg.fits_u8?)
when Symbol , ::Register::RegisterValue
when Symbol , ::Risc::RiscValue
immediate = 0
when Arm::Shift
handle_shift
else
raise "invalid operand argument #{arg.inspect} , #{inspect}"
end
val = (operand.is_a?(Symbol) or operand.is_a?(::Register::RegisterValue)) ? reg_code(operand) : operand
val = (operand.is_a?(Symbol) or operand.is_a?(::Risc::RiscValue)) ? reg_code(operand) : operand
val = 0 if val == nil
val = shift(val , 0)
raise inspect unless reg_code(@rd)
@ -64,12 +64,12 @@ module Arm
# end
#
# arg1 = arg.value
# if (arg1.is_a?(Register::IntegerConstant))
# if (arg1.is_a?(Risc::IntegerConstant))
# if (arg1.value >= 32)
# raise "cannot shift by more than 31 #{arg1} #{inspect}"
# end
# shift_imm = arg1.value
# elsif (arg1.is_a?(Arm::Register))
# elsif (arg1.is_a?(Arm::Risc))
# shift_op val |= 0x1;
# shift_imm = arg1.number << 1
# elsif (arg.type == 'rrx')

10
lib/arm/instructions/logic_instruction.rb
View File

@ -1,5 +1,5 @@
module Arm
class LogicInstruction < Register::Instruction
class LogicInstruction < Risc::Instruction
include Constants
include Attributed
@ -26,7 +26,7 @@ module Arm
if (right.is_a?(Numeric))
operand = handle_numeric(right)
elsif (right.is_a?(Symbol) or right.is_a?(::Register::RegisterValue))
elsif (right.is_a?(Symbol) or right.is_a?(::Risc::RiscValue))
operand = reg_code(right) #integer means the register the integer is in (otherwise constant)
immediate = 0 # ie not immediate is register
else
@ -73,7 +73,7 @@ module Arm
unless @extra
@extra = 1
#puts "RELINK L at #{self.position.to_s(16)}"
raise ::Register::LinkException.new("cannot fit numeric literal argument in operand #{right.inspect}")
raise ::Risc::LinkException.new("cannot fit numeric literal argument in operand #{right.inspect}")
end
# now we can do the actual breaking of instruction, by splitting the operand
operand = calculate_u8_with_rr( right & 0xFFFFFF00 )
@ -87,8 +87,8 @@ module Arm
# don't overwrite instance variables, to make assembly repeatable
# this also loads constants, which are issued as pc relative adds
def determine_operands
if( @left.is_a?(Parfait::Object) or @left.is_a?(Register::Label) or
(@left.is_a?(Symbol) and !Register::RegisterValue.look_like_reg(@left)))
if( @left.is_a?(Parfait::Object) or @left.is_a?(Risc::Label) or
(@left.is_a?(Symbol) and !Risc::RiscValue.look_like_reg(@left)))
# do pc relative addressing with the difference to the instuction
# 8 is for the funny pipeline adjustment (ie pointing to fetch and not execute)
right = Positioned.position(@left) - Positioned.position(self) - 8

12
lib/arm/instructions/memory_instruction.rb
View File

@ -2,7 +2,7 @@ module Arm
# ADDRESSING MODE 2
# Implemented: immediate offset with offset=0
class MemoryInstruction < Register::Instruction
class MemoryInstruction < Risc::Instruction
include Constants
include Attributed
@ -15,7 +15,7 @@ module Arm
@attributes[:update_status] = 1 if @attributes[:update_status] == nil
@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
@operand = 0
raise "alert" if right.is_a? Register::Label
raise "alert" if right.is_a? Risc::Label
@add_offset = @attributes[:add_offset] ? 0 : 1 #U flag
@is_load = opcode.to_s[0] == "l" ? 1 : 0 #L (load) flag
end
@ -25,8 +25,8 @@ module Arm
#TODO better test, this operand integer (register) does not work.
def assemble(io)
arg = @left
arg = arg.symbol if( arg.is_a? ::Register::RegisterValue )
is_reg = arg.is_a?(::Register::RegisterValue)
arg = arg.symbol if( arg.is_a? ::Risc::RiscValue )
is_reg = arg.is_a?(::Risc::RiscValue)
is_reg = (arg.to_s[0] == "r") if( arg.is_a?(Symbol) and not is_reg)
raise "invalid operand argument #{arg.inspect} #{inspect}" unless (is_reg )
@ -35,7 +35,7 @@ module Arm
#not sure about these 2 constants. They produce the correct output for str r0 , r1
# but i can't help thinking that that is because they are not used in that instruction and
# so it doesn't matter. Will see
if (operand.is_a?(Symbol) or operand.is_a?(::Register::RegisterValue))
if (operand.is_a?(Symbol) or operand.is_a?(::Risc::RiscValue))
val = reg_code(operand)
i = 1 # not quite sure about this, but it gives the output of as. read read read.
else
@ -67,7 +67,7 @@ module Arm
def get_operand
return @operand unless @right
operand = @right
operand = operand.symbol if operand.is_a? ::Register::RegisterValue
operand = operand.symbol if operand.is_a? ::Risc::RiscValue
unless( operand.is_a? Symbol)
# TODO test/check/understand: has no effect in current tests
# add_offset = (operand < 0) ? 0 : 1

10
lib/arm/instructions/move_instruction.rb
View File

@ -1,13 +1,13 @@
module Arm
class MoveInstruction < Register::Instruction
class MoveInstruction < Risc::Instruction
include Constants
include Attributed
def initialize to , from , options = {}
super(nil)
@attributes = options
if( from.is_a?(Symbol) and Register::RegisterValue.look_like_reg(from) )
from = Register::RegisterValue.new(from , :Integer)
if( from.is_a?(Symbol) and Risc::RiscValue.look_like_reg(from) )
from = Risc::RiscValue.new(from , :Integer)
end
@from = from
@to = to
@ -40,7 +40,7 @@ module Arm
case right
when Numeric
operand = numeric_operand(right)
when Register::RegisterValue
when Risc::RiscValue
operand = reg_code(right)
immediate = 0 # ie not immediate is register
else
@ -72,7 +72,7 @@ module Arm
raise "No negatives implemented #{right} " if right < 0
unless @extra
@extra = 1 # puts "RELINK M at #{self.position.to_s(16)}"
raise ::Register::LinkException.new("cannot fit numeric literal argument in operand #{right.inspect}")
raise ::Risc::LinkException.new("cannot fit numeric literal argument in operand #{right.inspect}")
end
# now we can do the actual breaking of instruction, by splitting the operand
operand = calculate_u8_with_rr( right & 0xFFFFFF00 )

2
lib/arm/instructions/stack_instruction.rb
View File

@ -1,7 +1,7 @@
module Arm
# ADDRESSING MODE 4
class StackInstruction < Register::Instruction
class StackInstruction < Risc::Instruction
include Constants
include Attributed

12
lib/arm/machine_code.rb
View File

@ -2,7 +2,7 @@ module Arm
class MachineCode
def function_call into , call
raise "Not CallSite #{call.inspect}" unless call.is_a? Register::CallSite
raise "Not CallSite #{call.inspect}" unless call.is_a? Risc::CallSite
raise "Not linked #{call.inspect}" unless call.function
into.add_code call( call.function )
raise "No return type for #{call.function.name}" unless call.function.return_type
@ -10,13 +10,13 @@ module Arm
end
def main_start context
entry = Register::Block.new("main_entry",nil,nil)
entry = Risc::Block.new("main_entry",nil,nil)
entry.add_code mov( :fp , 0 )
entry.add_code call( context.function )
entry
end
def main_exit context
exit = Register::Block.new("main_exit",nil,nil)
exit = Risc::Block.new("main_exit",nil,nil)
syscall(exit , 1)
exit
end
@ -44,7 +44,7 @@ module Arm
end
# the number (a Register::integer) is (itself) divided by 10, ie overwritten by the result
# the number (a Risc::integer) is (itself) divided by 10, ie overwritten by the result
# and the remainder is overwritten (ie an out argument)
# not really a function, more a macro,
def div10 function, number , remainder
@ -69,8 +69,8 @@ module Arm
def syscall block , num
# This is very arm specific, syscall number is passed in r7,
# other arguments like a c call ie 0 and up
sys = Register::Integer.new( Register::RegisterValue.new(SYSCALL_REG) )
ret = Register::Integer.new( Register::RegisterValue.new(RETURN_REG) )
sys = Risc::Integer.new( Risc::RiscValue.new(SYSCALL_REG) )
ret = Risc::Integer.new( Risc::RiscValue.new(RETURN_REG) )
block.add_code mov( sys , num )
block.add_code swi( 0 )
#todo should write type into r1 according to syscall

10
lib/arm/translator.rb
View File

@ -19,7 +19,7 @@ module Arm
# in bytes, so *4
# if an instruction is passed in we get the index with index function
def arm_index index
index = index.index if index.is_a?(Register::Instruction)
index = index.index if index.is_a?(Risc::Instruction)
raise "index error 0" if index == 0
index * 4
end
@ -31,8 +31,8 @@ module Arm
ArmMachine.str( :lr , code.register , arm_index(code) )
end
def translate_RegisterTransfer( code )
# Register machine convention is from => to
def translate_RiscTransfer( code )
# Risc machine convention is from => to
# But arm has the receiver/result as the first
ArmMachine.mov( code.to , code.from)
end
@ -77,7 +77,7 @@ module Arm
def translate_LoadConstant code
constant = code.constant
if constant.is_a?(Parfait::Object) or constant.is_a?(Symbol) or constant.is_a?(Register::Label)
if constant.is_a?(Parfait::Object) or constant.is_a?(Symbol) or constant.is_a?(Risc::Label)
return ArmMachine.add( code.register , constant )
else
return ArmMachine.mov( code.register , constant )
@ -146,7 +146,7 @@ module Arm
end
def exit int_code
codes = ArmMachine.ldr( :r0 , :r0 , arm_index(Register.resolve_to_index(:Message , :return_value)) )
codes = ArmMachine.ldr( :r0 , :r0 , arm_index(Risc.resolve_to_index(:Message , :return_value)) )
syscall int_code , codes
end