remove the :int shorthand
This commit is contained in:
parent
696886cc94
commit
a2173645b3
@ -44,7 +44,7 @@ module Arm
|
|||||||
end
|
end
|
||||||
|
|
||||||
|
|
||||||
# the number (a Risc::integer) is (itself) divided by 10, ie overwritten by the result
|
# the number (a Risc::Integer) is (itself) divided by 10, ie overwritten by the result
|
||||||
# and the remainder is overwritten (ie an out argument)
|
# and the remainder is overwritten (ie an out argument)
|
||||||
# not really a function, more a macro,
|
# not really a function, more a macro,
|
||||||
def div10( function, number , remainder )
|
def div10( function, number , remainder )
|
||||||
|
@ -25,7 +25,7 @@ module Mom
|
|||||||
# Instead we need a DynamicJump instruction that explicitly takes a register as
|
# Instead we need a DynamicJump instruction that explicitly takes a register as
|
||||||
# a target (not a label)
|
# a target (not a label)
|
||||||
def to_risc(compiler)
|
def to_risc(compiler)
|
||||||
reg = compiler.use_reg( :int )
|
reg = compiler.use_reg( :Object )
|
||||||
call = Risc.load_constant( self , @cache_entry , reg )
|
call = Risc.load_constant( self , @cache_entry , reg )
|
||||||
method_index = Risc.resolve_to_index(:cache_entry , :cached_method)
|
method_index = Risc.resolve_to_index(:cache_entry , :cached_method)
|
||||||
call << Risc::SlotToReg.new( self , reg ,method_index, reg)
|
call << Risc::SlotToReg.new( self , reg ,method_index, reg)
|
||||||
|
@ -22,7 +22,7 @@ module Mom
|
|||||||
def to_risc(compiler)
|
def to_risc(compiler)
|
||||||
return_move = SlotLoad.new( [:message , :caller,:return_value] , [:message , :return_value],self)
|
return_move = SlotLoad.new( [:message , :caller,:return_value] , [:message , :return_value],self)
|
||||||
moves = return_move.to_risc(compiler)
|
moves = return_move.to_risc(compiler)
|
||||||
return_address = compiler.use_reg(:int)
|
return_address = compiler.use_reg(:Object)
|
||||||
compiler.reset_regs
|
compiler.reset_regs
|
||||||
caller_index = Risc.resolve_to_index(:message , :caller)
|
caller_index = Risc.resolve_to_index(:message , :caller)
|
||||||
return_index = Risc.resolve_to_index(:message , :return_address)
|
return_index = Risc.resolve_to_index(:message , :return_address)
|
||||||
|
@ -20,7 +20,7 @@ module Mom
|
|||||||
# For returning, we add a label after the call, and load it's address into the
|
# For returning, we add a label after the call, and load it's address into the
|
||||||
# return_address of the next_message, for the ReturnSequence to pick it up.
|
# return_address of the next_message, for the ReturnSequence to pick it up.
|
||||||
def to_risc(compiler)
|
def to_risc(compiler)
|
||||||
jump_address = compiler.use_reg(:int)
|
jump_address = compiler.use_reg(:Object)
|
||||||
return_label = Risc::Label.new(self,"continue_#{object_id}")
|
return_label = Risc::Label.new(self,"continue_#{object_id}")
|
||||||
save_return = SlotLoad.new([:message,:next_message,:return_address],[return_label],self)
|
save_return = SlotLoad.new([:message,:next_message,:return_address],[return_label],self)
|
||||||
moves = save_return.to_risc(compiler)
|
moves = save_return.to_risc(compiler)
|
||||||
|
@ -43,13 +43,13 @@ module Mom
|
|||||||
left_index = Risc.resolve_to_index(@left.known_object , left_slots.first)
|
left_index = Risc.resolve_to_index(@left.known_object , left_slots.first)
|
||||||
if left_slots.length > 1
|
if left_slots.length > 1
|
||||||
# swap the existing target (with a new reg) and update the index
|
# swap the existing target (with a new reg) and update the index
|
||||||
new_left = compiler.use_reg( :int )
|
new_left = compiler.use_reg( :Object )
|
||||||
const << Risc::SlotToReg.new( original_source , left ,left_index, new_left)
|
const << Risc::SlotToReg.new( original_source , left ,left_index, new_left)
|
||||||
left = new_left
|
left = new_left
|
||||||
left_index = SlotLoad.resolve_to_index(left_slots[0] , left_slots[1] ,compiler)
|
left_index = SlotLoad.resolve_to_index(left_slots[0] , left_slots[1] ,compiler)
|
||||||
if left_slots.length > 2
|
if left_slots.length > 2
|
||||||
#same again, once more updating target
|
#same again, once more updating target
|
||||||
new_left = compiler.use_reg( :int )
|
new_left = compiler.use_reg( :Object )
|
||||||
const << Risc::SlotToReg.new( original_source , left ,left_index, new_left)
|
const << Risc::SlotToReg.new( original_source , left ,left_index, new_left)
|
||||||
left = new_left
|
left = new_left
|
||||||
left_index = SlotLoad.resolve_to_index(left_slots[1] , left_slots[2] ,compiler)
|
left_index = SlotLoad.resolve_to_index(left_slots[1] , left_slots[2] ,compiler)
|
||||||
@ -57,7 +57,7 @@ module Mom
|
|||||||
raise "more slots not implemented #{left_slots}" if left_slots.length > 3
|
raise "more slots not implemented #{left_slots}" if left_slots.length > 3
|
||||||
end
|
end
|
||||||
when Parfait::CacheEntry
|
when Parfait::CacheEntry
|
||||||
left = compiler.use_reg( :int )
|
left = compiler.use_reg( :Object )
|
||||||
const << Risc.load_constant(original_source, @left.known_object , left)
|
const << Risc.load_constant(original_source, @left.known_object , left)
|
||||||
left_index = Risc.resolve_to_index(:cache_entry , left_slots.first)
|
left_index = Risc.resolve_to_index(:cache_entry , left_slots.first)
|
||||||
else
|
else
|
||||||
@ -105,7 +105,7 @@ module Mom
|
|||||||
end
|
end
|
||||||
|
|
||||||
def to_register(compiler, instruction)
|
def to_register(compiler, instruction)
|
||||||
type = known_object.respond_to?(:ct_type) ? known_object.ct_type : :int
|
type = known_object.respond_to?(:ct_type) ? known_object.ct_type : :Object
|
||||||
right = compiler.use_reg( type )
|
right = compiler.use_reg( type )
|
||||||
case known_object
|
case known_object
|
||||||
when Constant
|
when Constant
|
||||||
|
@ -17,7 +17,7 @@ module Risc
|
|||||||
|
|
||||||
def +( context )
|
def +( context )
|
||||||
source = "plus"
|
source = "plus"
|
||||||
compiler = compiler_for(:Integer,:+ ,{other: :int})
|
compiler = compiler_for(:Integer,:+ ,{other: :Integer})
|
||||||
me , other = self_and_int_arg(compiler,source + "1")
|
me , other = self_and_int_arg(compiler,source + "1")
|
||||||
# reduce me and other to integers
|
# reduce me and other to integers
|
||||||
compiler.add_slot_to_reg( source + "2" , me , 2 , me)
|
compiler.add_slot_to_reg( source + "2" , me , 2 , me)
|
||||||
|
Loading…
x
Reference in New Issue
Block a user