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named the first intruction constructor argument

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This commit is contained in:
Torsten Ruger
2014-05-15 19:41:51 +03:00
parent b4c79d218f
commit a0f0d08e81
13 changed files with 78 additions and 77 deletions
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32
lib/arm/arm_machine.rb
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@ -11,46 +11,46 @@ module Arm
class ArmMachine < Vm::CMachine
def integer_less_or_equal block , left , right
block.add_code cmp(:left => left , :right => right )
block.add_code cmp( left , :right => right )
Vm::Bool.new
end
def integer_plus block , result , left , right
block.add_code add(:left => result , :right => left , :extra => right )
block.add_code add( result , :right => left , :extra => right )
result
end
def integer_minus block , result , left , right
block.add_code sub(:left => result , :right => left , :extra => right )
block.add_code sub( result , :right => left , :extra => right )
result
end
def integer_load block , left , right
block.add_code mov( :left => left , :right => right )
block.add_code mov( left , :right => right )
left
end
def integer_move block , left , right
block.add_code mov( :left => left , :right => right )
block.add_code mov( left , :right => right )
left
end
def string_load block , str_lit , reg
block.add_code add( :left => "r#{reg}".to_sym , :extra => str_lit ) #right is pc, implicit
block.add_code add( "r#{reg}".to_sym , :extra => str_lit ) #right is pc, implicit
#second arg is a hack to get the stringlength without coding
block.add_code mov( :left => "r#{reg+1}".to_sym , :right => str_lit.length )
block.add_code mov( "r#{reg+1}".to_sym , :right => str_lit.length )
str_lit
end
def function_call into , call
raise "Not CallSite #{call.inspect}" unless call.is_a? Vm::CallSite
raise "Not linked #{call.inspect}" unless call.function
into.add_code call( :left => call.function )
into.add_code call( call.function )
call.function.return_type
end
def main_start entry
entry.add_code mov( :left => :fp , :right => 0 )
entry.add_code mov( :fp , :right => 0 )
end
def main_exit exit
syscall(exit , 1)
@ -61,14 +61,14 @@ module Arm
block
end
def function_exit entry , f_name
entry.add_code mov( :left => :pc , :right => :lr )
entry.add_code mov( :pc , :right => :lr )
end
# assumes string in r0 and r1 and moves them along for the syscall
def write_stdout block
block.add_code mov( :left => :r2 , :right => :r1 )
block.add_code mov( :left => :r1 , :right => :r0 )
block.add_code mov( :left => :r0 , :right => 1 ) # 1 == stdout
block.add_code mov( :r2 , :right => :r1 )
block.add_code mov( :r1 , :right => :r0 )
block.add_code mov( :r0 , :right => 1 ) # 1 == stdout
syscall( block , 4 )
end
@ -110,7 +110,7 @@ module Arm
# takes argument in r1
# returns quotient in r1, remainder in r2
# SUB r2, r1, #10 # keep (x-10) for later
block.add_code sub(:left => remainder , :right => number , :extra => 10 )
block.add_code sub( remainder , :right => number , :extra => 10 )
# SUB r1, r1, r1, lsr #2
# ADD r1, r1, r1, lsr #4
# ADD r1, r1, r1, lsr #8
@ -124,8 +124,8 @@ module Arm
end
def syscall block , num
block.add_code mov( :left => :r7 , :right => num )
block.add_code swi( :left => 0 )
block.add_code mov( :r7 , :right => num )
block.add_code swi( 0 , {})
Vm::Integer.new(0) #small todo, is this actually correct for all (that they return int)
end

8
lib/arm/call_instruction.rb
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@ -20,8 +20,8 @@ module Arm
4
end
def initialize(attributes)
super(attributes)
def initialize(left, attributes)
super(left , attributes)
@attributes[:update_status_flag] = 0
@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
end
@ -29,7 +29,7 @@ module Arm
def assemble(io)
case @attributes[:opcode]
when :b, :call
arg = @attributes[:left]
arg = @left
#puts "BLAB #{arg.inspect}"
if( arg.is_a? Fixnum ) #HACK to not have to change the code just now
arg = Vm::IntegerConstant.new( arg )
@ -49,7 +49,7 @@ module Arm
end
io.write_uint8 op_bit_code | (COND_CODES[@attributes[:condition_code]] << 4)
when :swi
arg = @attributes[:left]
arg = @left
if( arg.is_a? Fixnum ) #HACK to not have to change the code just now
arg = Vm::IntegerConstant.new( arg )
end

6
lib/arm/compare_instruction.rb
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@ -5,13 +5,13 @@ module Arm
include Arm::Constants
include LogicHelper
def initialize(attributes)
super(attributes)
def initialize(left , attributes)
super(left , attributes)
@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
@operand = 0
@i = 0
@attributes[:update_status_flag] = 1
@rn = attributes[:left]
@rn = left
@rd = :r0
end
def build

6
lib/arm/logic_instruction.rb
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@ -6,15 +6,15 @@ module Arm
include Arm::Constants
include LogicHelper
def initialize(attributes)
super(attributes)
def initialize(left , attributes)
super(left , attributes)
@attributes[:update_status_flag] = 0 if @attributes[:update_status_flag] == nil
@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
@operand = 0
@rn = nil
@i = 0
@rd = @attributes[:left]
@rd = @left
end
attr_accessor :i, :rn, :rd
# Build representation for source value

8
lib/arm/memory_instruction.rb
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@ -6,8 +6,8 @@ module Arm
class MemoryInstruction < Vm::MemoryInstruction
include Arm::Constants
def initialize(attributes)
super(attributes)
def initialize(left , attributes)
super(left , attributes)
@attributes[:update_status_flag] = 0 if @attributes[:update_status_flag] == nil
@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
@operand = 0
@ -28,11 +28,11 @@ module Arm
# Build representation for target address
def build
if( @is_load )
@rd = @attributes[:left]
@rd = @left
arg = @attributes[:right]
else #store
@rd = @attributes[:right]
arg = @attributes[:left]
arg = @left
end
#str / ldr are _serious instructions. With BIG possibilities not half are implemented
if (arg.is_a?(Symbol)) #symbol is register

6
lib/arm/move_instruction.rb
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@ -6,15 +6,15 @@ module Arm
include Arm::Constants
include LogicHelper
def initialize(attributes)
super(attributes)
def initialize(left , attributes)
super(left , attributes)
@attributes[:update_status_flag] = 0 if @attributes[:update_status_flag] == nil
@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
@attributes[:opcode] = attributes[:opcode]
@operand = 0
@i = 0
@rd = @attributes[:left]
@rd = @left
@rn = :r0 # register zero = zero bit pattern
end

6
lib/arm/stack_instruction.rb
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@ -11,8 +11,8 @@ module Arm
4
end
def initialize(attributes)
super(attributes)
def initialize(left , attributes)
super(left , attributes)
@attributes[:update_status_flag] = 0 if @attributes[:update_status_flag] == nil
@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
@attributes[:opcode] = attributes[:opcode]
@ -55,7 +55,7 @@ module Arm
private
# Build representation for source value
def build
regs = @attributes[:regs]
regs = @left
if (regs.is_a?(Array))
@operand = 0
regs.each do |reg |

2
lib/vm/block.rb
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@ -66,7 +66,7 @@ module Vm
# sugar to create instructions easily. Any method with one arg is sent to the machine and the result
# (hopefully an instruction) added as code
def method_missing(meth, *args, &block)
if args.length == 1
if args.length == 2
add_code CMachine.instance.send(meth , *args)
else
super

4
lib/vm/c_machine.rb
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@ -81,11 +81,11 @@ module Vm
# defaults gets merged into the instructions options hash, ie passed on to the (machine specific)
# Instruction constructor and as such can be used to influence that classes behaviour
def define_instruction(inst , clazz , defaults = {} )
create_method(inst) do |options|
create_method(inst) do |left , options|
options = {} if options == nil
options.merge defaults
options[:opcode] = inst
clazz.new(options)
clazz.new(left , options)
end
end

5
lib/vm/instruction.rb
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@ -25,7 +25,8 @@ module Vm
# Make hash attributes to object attributes
include Support::HashAttributes
def initialize options
def initialize left , options
@left = left
@attributes = options
end
end
@ -43,7 +44,7 @@ module Vm
class MoveInstruction < Instruction
end
class CallInstruction < Instruction
def initialize options
def initialize left , options
super
opcode = @attributes[:opcode].to_s
if opcode.length == 3 and opcode[0] == "b"